tc74vhct367af/afn/aft 2008-12-01 1 toshiba cmos digital integrat ed ci rcuit silicon monolithic tc74vhct367af,tc74vhct367 afn,tc74vhct367aft hex bus buffer tc74vhct367af/afn/aft non-inverted, 3-state outputs the tc74vhct367a is advanced high speed cmos hex bus buffers fabricated with silicon gate c 2 mos technology. they achieve the high speed op eration similar to equivalent bipolar schottky ttl while main taining the cmos low power dissipation. they contain six buffers ;four buffers are controlled by an enable input ( 1g ), and the other two buffers are controlled by another enable input ( 2g ). the outputs of each buffer group are enabled when 1g and/or 2g inputs are held low; if held high, these outputs are in a high impedance state. the tc74vhct367a is a non- inverting output type. input protection and output circu it ensure that 0 to 5.5 v can be applied to the input and output (note) pins without regard to the supply voltage. these structur e prevents device destruction due to mismatched supply and in put/output voltages such as battery back up, hot board insertion, etc. note: output in off-state features ? high speed: t pd = 4.7 ns (typ.) at v cc = 5 v ? low power dissipation: i cc = 4 a (max) at ta = 25c ? compatible with ttl inputs: v il = 0.8 v (max) v ih = 2.0 v (min) ? power down protection is provid ed on all inputs and outputs. ? balanced propagation delays: t plh t phl ? low noise: v olp = 0.8 v (max) ? pin and function compatible with the 74 series (74ac/hc/f/als/ls etc.) 367 type. note: xxxfn (jedec sop) is not available in japan. tc74vhct367af TC74VHCT367AFN tc74vhct367aft weight sop16-p-300-1.27a: 0.18 g (typ.) sol16-p-150-1.27: 0.13 g (typ.) tssop16-p-0044-0.65a: 0.06 g (typ.)
tc74vhct367af/afn/aft 2008-12-01 2 pin assignment iec logic symbol truth table inputs output g a y l l l l h h h x z x: don?t care z: high impedance absolute maximum ratings (note 1) characteristics symbol rating unit supply voltage range v cc ?0.5 to 7.0 v dc input voltage v in ?0.5 to 7.0 v ? 0.5 to 7.0 (note 2) dc output voltage v out ?0.5 to v cc + 0.5 (note 3) v input diode current i ik ?20 ma output diode current i ok 20 (note 4) ma dc output current i out 25 ma dc v cc /ground current i cc 50 ma power dissipation p d 180 mw storage temperature t stg ?65 to 150 c note 1: exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in ic performance or even destruction. using continuously under heavy loads (e.g. the app lication of high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temper ature/current/voltage, etc. ) are within the absolute maximum ratings and the operating ranges. please design the appropriate reliability upon reviewing the toshiba semiconductor reliability handbook (?handling precautions?/?derating concept and methods?) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). note 2: output in off-state note 3: high or low state. i out absolute maximum rating must be observed. note 4: v out < gnd, v out > v cc (1) (4) (2) 1a 3a 2a (10) (6) 4a (5) (9) (3) (7) en tc74vhct367a 1g 1y 3y 2y 4y (15) (14) (12) 5a 6a (13) (11) en 2g 5y 6y v cc 12 6y 5a 5y 11 10 9 16 1g 1 2 3 4 5 6 7 3a 3y gnd 1a 4a 8 6a 15 4y 2 g 2a 2y 14 1y 13 (top view) tc74vhct367a
tc74vhct367af/afn/aft 2008-12-01 3 operating ranges (note 1) characteristics symbol rating unit supply voltage v cc 4.5 to 5.5 v input voltage v in 0 to 5.5 v 0 to 5.5 (note 2) output voltage v out 0 to v cc (note 3) v operating temperature t opr ?40 to 85 c input rise and fall time dt/dv 0 to 20 ns/v note 1: the operating ranges must be maintai ned to ensure the normal op eration of the device. unused inputs must be tied to either v cc or gnd. note 2: output in off-state note 3: high or low state. electrical characteristics dc characteristics test condition ta = 25c ta = ?40 to 85c characteristics symbol v cc (v) min typ. max min max unit high-level input voltage v ih D 4.5 to 5.5 2.0 D D 2.0 D v low-level input voltage v il D 4.5 to 5.5 D D 0.8 D 0.8 v i oh = ?50 a 4.5 4.40 4.50 D 4.40 D high-level output voltage v oh v in = v ih or v il i oh = ? 8 ma 4.5 3.94 D D 3.80 D v i ol = 50 a 4.5 D 0.0 0.10 D 0.10 low-level output voltage v ol v in = v ih or v il i ol = 8 ma 4.5 D D 0.36 D 0.44 v 3-state output off-state current i oz v in = v ih or v il v out = v cc or gnd 5.5 D D 0.25 D 2.50 a input leakage current i in v in = 5.5 v or gnd 0 to 5.5 D D 0.1 D 1.0 a i cc v in = v cc or gnd 5.5 D D 4.0 D 40.0 a quiescent supply current i cct per input: v in = 3.4 v other input: v cc or gnd 5.5 D D 1.35 D 1.50 ma output leakage current i opd v out = 5.5 v 0 D D +0.5 D +5.0 a
tc74vhct367af/afn/aft 2008-12-01 4 ac characteristics (input: t r = t f = 3 ns) test condition ta = 25c ta = ?40 to 85c characteristics symbol v cc (v) c l (pf) min typ. max min max unit 15 D 4.7 7.4 1.0 8.5 propagation delay time t plh t phl D 5.0 0.5 50 D 5.2 8.4 1.0 9.5 ns 15 D 4.9 10.4 1.0 12.0 3-state output enable time t pzl t pzh r l = 1k : 5.0 0.5 50 D 5.4 11.4 1.0 13.0 ns 3-state output disable time t plz t phz r l = 1k : 5.0 0.5 50 D 6.3 11.4 1.0 13.0 ns output to output skew t oslh t oshl (note 1) 5.0 0.5 50 D D 1.0 D 1.0 ns input capacitance c in D D 4 10 D 10 pf output capacitance c out D D 6 D D D pf power dissipation capacitance c pd (note 2) D 16 D D D pf note 1: parameter guaranteed by design. t oslh = |t plhm ? t plhn |, t oshl = |t phlm ? t phln | note 2: c pd is defined as the value of the internal equivalent capacitance which is ca lculated from the operating current consumption without load. average operating current can be obtained by the equation: i cc (opr) = c pd v cc f in + i cc / 6 (per bit) noise characteristics (input: t r = t f = 3 ns) test condition ta = 25c characteristics symbol v cc (v) typ. limit unit quiet output maximum dynamic v ol v olp c l = 50 pf 5.0 0.6 0.8 v quiet output minimum dynamic v ol v olv c l = 50 pf 5.0 ?0.6 ? 0.8 v minimum high level dynamic input voltage v ihd c l = 50 pf 5.0 D 2.0 v maximum low level dynamic input voltage v ild c l = 50 pf 5.0 D 0.8 v
tc74vhct367af/afn/aft 2008-12-01 5 package dimensions weight: 0.18 g (typ.)
tc74vhct367af/afn/aft 2008-12-01 6 package dimensions (note) note: this package is not available in japan. weight: 0.13 g (typ.)
tc74vhct367af/afn/aft 2008-12-01 7 package dimensions weight: 0.06 g (typ.)
tc74vhct367af/afn/aft 2008-12-01 8 restrictions on product use ? toshiba corporation, and its subsidiaries and affiliates (collect ively ?toshiba?), reserve the right to make changes to the in formation in this document, and related hardware, software a nd systems (collectively ?product?) without notice. ? this document and any information herein may not be reproduc ed without prior written permission from toshiba. even with toshiba?s written permission, reproduc tion is permissible only if reproduction is without alteration/omission. ? though toshiba works continually to improve product?s quality and reliability, product can malfunction or fail. customers are responsible for complying with safety standards and for prov iding adequate designs and safeguards for their hardware, software and systems which minimize risk and avoid situat ions in which a malfunction or failure of product could cause loss of human life, b odily injury or damage to property, including data loss or corruption. before creating and producing des igns and using, customers must also refer to and comply with (a) the latest versions of all re levant toshiba information, including without limitation, this d ocument, the specifications, the data sheets and applic ation notes for product and the precautions and conditions set forth in the ?tosh iba semiconductor reliability handbook? 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