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rev. 4772a?audr?10/03 features high dynamic range for am and fm integrated agc for fm high intercept point 3rd-order for fm fm amplifier adjustable to various cable impedances high intercept point 2nd-order for am low-noise output voltage low-power consumption electrostatic sensitive device. observe precautions for handling. description the u4254bm-m is an integrated low-noise am/fm antenna impedance matching cir- cuit in bicmos technology. the device is designed specifically for car applications and is suitable for windshield and roof antennas. figure 1. block diagram fm agc fmin agc vs amin amout vref1 fmout fmgain gnd1 i agc agcadj gnd2 vref2 vref 1 2 4 3 5 7 8 10 14 12 13 15 amout1 11 am low-noise am/fm antenna impedance matching ic u4254bm-m
2 u4254bm-m 4772a?audr?10/03 pin configuration figure 2. pinning so16 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 fmgain agc vref2 nc gnd2 amin fmin gnd1 vs agcadj vref1 amout1 amout nc nc fmout pin description pin symbol function 1 fmin fm input 2 gnd1 ground for fm part 3 fmgain fm gain adjustment 4agcagc output 5 vref2 reference voltage 2 output 6 nc not connected 7 gnd2 ground for am part 8 amin am input 9 nc not connected 10 amout am output 11 amout1 am output 12 vref1 reference voltage 1 output 13 agcadj adjustment fm wide-band agc threshold 14 vs supply voltage 15 fmout fm output 16 nc not connected
3 u4254bm-m 4772a?audr?10/03 pin description fmin fmin, a bipolar transitor?s base is the input of the fm amplifier. a resistor or a coil is connected between fmin and vref2. if a coil is used, the noise performance is excellent. figure 3. internal circuit at pin fmin gnd1 to avoid cross-talk between am and fm signals, the circuit has two separate ground pins. gnd1 is the ground for the fm part. fmgain the dc current of the fm amplifier transistor is adjusted by an external resistor which is connected between fmgain and gnd1. to influence the ac gain of the amplifier, a resistor is connected in series to a capacitor between fmgain and gnd1. the capaci- tor has to shorten frequencies of 100 mhz. figure 4. internal circuit at pin fmgain agc dc current flows into the agc pin at high fm antenna input signals. this current has to be amplified via the current gain of an exte rnal pnp transistor that feeds a pin diode. this diode dampens the antenna?s input signal and protects the amplifier input against overload. the maximum current which flows in the agc pin is approximately 1 ma. in low-end applications, the agc function is not necessary and the external components can therefore be omitted. esd 1 fmin esd 3 fmgain
4 u4254bm-m 4772a?audr?10/03 figure 5. internal circuit at pin agc agcadj the threshold of the agc can be adjusted by varying the dc current at pin agcadj. if pin agcadj is connected directly to gnd1, the threshold is set to 96 dbv at the fm amplifier output. if a resistor is connected between agcadj and gnd1, the threshold is shifted to higher values with increasing resistances. if agcadj is open, the threshold is set to 106 dbv. figure 6. internal circuit at pin agcadj fmout the fm amplifier output is an open collector of a bipolar rf transistor. it should be con- nected to v s via a coil. figure 7. internal circuit at pin fmout esd 4 v s agc esd 13 65 k ? agcadj esd 15 fmout
5 u4254bm-m 4772a?audr?10/03 amin the am input has an internal bias voltage. the dc voltage at this pin is v ref1/2 . the input resistance is about 470 k . the input capacitance is less than 10 pf. figure 8. internal circuit at pin amin amout, amout1 the buffered am amplifier consists of a complementary pair of cmos source followers. the transistor gates are connected to amin. the pin amout is the nmos transistor's source, pin amout1 is the pmos transistor's source. due to the two different dc levels of these pins, they have to be connected t ogether via an external capacitor of about 100 nf. by means of this technique an excellent dynamic range can be achieved. figure 9. internal circuit at pins amout1 and amout vref1 vref1 is the stabilized voltage for the am amplifier and the agc block. to achieve excellent noise performance at lw frequencies, it is recommended that this pin be con- nected to ground via an external capacitor of about 1 f. esd 8 470 k ? vref1/2 amin amout1 esd esd amout 11 10
6 u4254bm-m 4772a?audr?10/03 figure 10. internal circuit at pin vref1 vref2 for the dc biasing of the fm amplifier, a second voltage reference circuit is integrated. since the collector current is temperature independent, the output voltage has a nega- tive temperature coefficient of about -1 mv/k. to stabilize this voltage, an external capacitor to ground of a few nf is recommended. figure 11. internal circuit at pin vref2 gnd2 gnd2 is the ground for the am amplifier. esd 12 vs gnd1 vref1 esd 5 gnd1 vref2
7 u4254bm-m 4772a?audr?10/03 functional description the u4254bm-m is an integrated am/fm antenna impedance matching circuit. it com- pensates cable losses between the antenna (for example windshield, roof or bumper antennas) and the car radio which is usually placed far away from the antenna. the fm amplifier provides excellent noise performance. external components are used to adjust the gain and the input-output matching impedance. therefore, it is possible to adjust the amplifier to various cabl e impedances (usually 50, 75 or 150 ). to protect the amplifier against input overload, an automatic gain control (agc) is included on the chip. the agc observes the ac voltage at the fm amplifier output, rectifies this signal, and delivers dc current to dampen the input antenna signal via an external pin diode. the threshold for the agc is adjustable. simple and temperature-compensated biasing is possible due to the integrated voltage reference v ref2 . the am part consists of a buffer amplifier. the voltage gain of this stage is approxi- mately one. the input resistance is 470 k , the input capacitance less than 10 pf. the output resistance is 125 . an excellent dynamic range is achieved due to the comple- mentary cmos source follower stage. absolute maximum ratings stresses beyond those listed under ?absolute maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability . reference point is ground (pins 2 and 7) parameters symbol value unit supply voltage v s 8.8 v power dissipation, p tot at t amb = 85 cp tot 460 mw junction temperature t j 150 c ambient temperature t amb -40 to +85 c storage temperature t stg -50 to +150 c electrostatic handling (hbm at esd s.5.1) v esd 1000 v thermal resistance parameters symbol value unit junction ambient r thja 140 k/w
8 u4254bm-m 4772a?audr?10/03 electrical characteristics v s = 8 v, t amb = 25 c, unless otherwise specified (see figure 12 on page 9). parameters test conditions pin symbol min. typ. max. unit supply voltage 14 v s 7.288.8v supply currents 14 i s 4ma reference voltage 1 output (i 12 =0) 12 v ref1 5.5 v reference voltage 2 output (i 5 =0) 5 v ref2 2.6 v temperature dependence of vref2 5 v ref2 / t-1mv/k am amplifier input resistance 8 r amin 470 k input capacitance 8 c amin 10 pf output resistance 10 r out 125 voltage gain 8, 10 a 0.85 output noise voltage (rms value) s1 switched to 2 b=6khz 150 khz to 300 khz 500 khz to 6.5 khz 10 v n1 v n2 -2 -6 dbv dbv 2nd harmonic s2 switched to 1 f amin =500khz output voltage = 110 dbv 10 -65 dbc fm amplifier supply current limit i agc , i agcadj =0a 15 i 15 33 35 ma input resistance f = 100 mhz 1 r fmin 50 output resistance f = 100 mhz 15 r fmout 50 power gain f = 100 mhz 1, 15 g 5 db output noise voltage f = 100 mhz b = 120 khz 15 v n 0dbv 3rd-order output intercept f = 100 mhz 15 132 dbv agc agc input voltage threshold f = 100 mhz s2 switched to 1; agc threshold dc current is 10 a at pin 4 15 v th1 96 dbv agc input voltage threshold f = 100 mhz, s2 switched to 2; agc threshold dc current is 10 a at pin 4 15 v th2 106 dbv agc output current agc active i agc 1.2 ma
9 u4254bm-m 4772a?audr?10/03 figure 12. test circuit 2 1 2.2 f s1 v s 150 ? 2.2 nf 2.2 nf 51 ? 22 ? 2.2 nf 2.2 h amout 2.2 h 100 nf 2.2 nf fmout 2.2 nf 1 nf 15 pf amin + s2 12 18 9 16 5 k ? i 4 fmin 100 nf v s i 3 i 14 i 15
10 u4254bm-m 4772a?audr?10/03 figure 13. fm intermodulation distortion 90 95 100 105 mhz input dbv 103 dbv 90 95 100 105 mhz output dbv 108 dbv 58 dbv gain = 5 db agc not active 90 95 100 105 mhz input dbv 118 dbv 90 95 100 105 mhz dbv 100 dbv 50 dbv output agc active
11 u4254bm-m 4772a?audr?10/03 figure 14. test circuit for am large signal behavior figure 15. am harmonic distortion dut 1 nf f = 500 khz v 0 50 ? lpf amout 115 dbv analyzer f cutoff = 500 khz 100 nf 5 k ? 75 dbv amin r in = 50 ? 100 nf amout1 50 ? 0.5 1.0 1.5 v amout (dbv) 115 dbv 50 70 110 90 55 dbv 45 dbv f (mhz)
12 u4254bm-m 4772a?audr?10/03 figure 16. application circuit f m a g c a m f m i n a g c a m i n a m o u t 1 v r e f 1 f m o u t f m g a i n f m g n d i a g c a g c a d j a m g n d v r e f 2 v r e f a n t e n n a a m f m p r o t e c t i o n c i r c u i t o u t p u t v s p i n v s = 8 . 2 v 1 k ? b c 5 5 8 2 2 ? 2 . 2 h r 1 2 . 2 n f 1 0 0 n f 2 0 0 n f b a 6 7 9 2 . 2 n f 3 9 p f 2 . 2 h 2 . 2 n f 2 . 2 n f 5 1 0 ? 1 f + 2 . 2 n f v s v 1 n f r 2 1 0 0 n f a m o u t r 1 a n d r 2 d e p e n d o n u s e d f m c a b l e i m p e d a n c e f m c a b l e i m p e d a n c e r 1 ( ? ) 5 0 7 5 1 0 0 1 2 5 1 5 0 1 5 0 2 7 0 3 9 0 4 7 0 6 2 0 2 2 3 3 5 1 8 6 1 6 0 r 2 ( ? )
13 u4254bm-m 4772a?audr?10/03 package information ordering information extended type number package remarks u4254bm-mfp so16 ? u4254bm-mpg3 so16 taping corresponding, ice-286-3 technical drawings according to din specifications package so16 dimensions in mm 10.0 9.85 8.89 0.4 1.27 1.4 0.25 0.10 5.2 4.8 3.7 3.8 6.15 5.85 0.2 16 9 18
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