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fujitsu microelectronics data sheet copyright?2003-2008 fujitsu microelect ronics limited all rights reserved 2008.10 for the information for microcontroller supports, see the following web site. http://edevice.fujitsu.com/micom/en-support/ 8-bit proprietary microcontroller cmos f 2 mc-8l mb89480 series mb89485/485l/p485/p485l/pv480 description the mb89480 series has been developed as a general-purpose version of the f 2 mc*-8l family consisting of proprietary 8-bit single-chip microcontrollers. in addition to a compact instruction set, the microcontrolle r contains a variety of peripheral functions such as 21- bit timebase timer, watch prescaler, pwc timer, pwm timer, 8/16-bit timer/counter, 6-bit ppg, lcd controller/ driver, external interrupt 1 (edge), external interrupt 2 (level), 10-bit a/d converter, uart/sio, buzzer, watchdog timer reset. the mb89480 series is designed suitable for lcd remote co ntroller as well as in a wide range of applications for consumer product. *: f 2 mc is the abbreviation of fu jitsu flexible microcontroller. features ? package used lqfp package and sh-dip package for mb89p485/p485l, mb89485/485l mdip package and mqfp package for mb89pv480 high speed operating ca pability at low voltage minimum execution time: 0.32 s at 12.5 mhz (continued) ds07-12559-2e
mb89480 series 2 ds07-12559-2e (continued) f 2 mc-8l family cpu core six timers pwc timer (also usable as an interval timer) pwm timer 8/16-bit timer/counter x 2 21-bit timebase timer watch prescaler programmable pulse generator 6-bit ppg with program-selectable pulse width and period external interrupt edge detection (selectable edge) : 4 channels low level interrupt (wake-up function) : 8 channels a/d converter (4 channels) 10-bit successive approximation type uart/sio synchronous/asynchronous data transfer capability lcd controller/driver max 31 segments output x 4 commons booster for lcd driving (selected by mask option) buzzer 7 frequencies are selectable by software low-power consumption mode stop mode (oscillation st ops so as to minimize the current consumption.) sleep mode (cpu stops so as to reduce the current consumption to approx. 1/3 of normal.) watch mode (everything except the watch prescaler stops so as to reduce the power comsumption to an extremely low level.) sub-clock mode watchdog timer reset i/o ports: max 42 channels multiplication and division instructions 16-bit arithmetic operations test and branch instructions bit manipulation instructions, etc. instruction set optimized for controllers
mb89480 series ds07-12559-2e 3 product lineup (continued) part number parameter mb89485l mb89485 mb89p485l mb89p485 mb89pv480 classification mass production products (mask rom product) otp piggy-back rom size 16k x 8-bit (internal rom) 16k x 8-bit (internal prom with read protection) * 2 32k x 8-bit (external rom)* 1 ram size 512 x 8-bit 1k 8-bit cpu functions number of instructions : 136 instruction bit length : 8 bits instruction length : 1 to 3 bytes data bit length : 1, 8, 16 bits minimum execution time : 0.32 s at 12.5 mhz minimum interrupt processing time : 2.88 s at 12.5 mhz ports i/o ports (cmos) : 11 pins n-channel open drain i/o ports : 28 pins output ports (n-channel open drain) : 2 pins input port : 1 pin total : 42 pins 21-bit timebase timer interrupt period (0.66 ms, 2.6 ms, 21.0 ms, 335.5 ms) at 12.5 mhz. watchdog timer reset period (167.8 ms to 335.5 ms) at 12.5 mhz. pulse width count timer 1 channel. 8-bit one-shot timer operation (supports underflow output, operating clock period: 1, 4, 32 t inst , external). 8-bit reload timer operation (supports square wave output, operating clock period: 1, 4, 32 t inst , external). 8-bit pulse width measurement operation (supports continuous measurement, h width, l width, rising edge to rising edge, falling edge to falling e dge measurement and both edge measurement). pwm timer 8-bit reload timer operation (supports square wave output, operating clock period: 1, 4, 32 t inst , external). 8-bit resolution pwm operation. 6- bit programmable pulse generator can generate square pulse with programmable period. 8/16-bit timer/counter 11, 12 can be operated either as a 2-channel 8-bit timer/counter (timer 11 and timer 12, each with its own independent operating clock cycle), or as one 16-bit timer/counter. in timer 11 or 16-bit timer/counter operation, event counter operation (external clock-triggered) and square wave output capability. 8/16-bit timer/counter 21, 22 can be operated either as a 2-channel 8-bit timer/counter (timer 21 and timer 22, each with its own independent operating clock cycle), or as one 16-bit timer/counter. in timer 21 or 16-bit timer/counter operation, event counter operation (external clock-triggered) and square wave output capability. external interrupt 4 independent channels (selectable edge, interrupt vector, request flag). 8 channels (low level interrupt).
mb89480 series 4 ds07-12559-2e (continued) note : 1 t inst = one instruction cycle (execution time) which can be selected as 1/4, 1/8, 1/16, or 1/64 of main clock. package and corres ponding products o : availabe x : not available part number parameter mb89485l mb89485 mb89p485l mb89p485 mb89pv480 a/d converter 10-bit resolution 4 channels. a/d conversion function (conversion time: 60 t inst ). supports repeated activation by internal clock. lcd controller/driver common output : 4 (max) segment output : 31 (max) (selected resistor ladder) : 26 (max) (selected booster) bias power supply pins : 4 lcd display ram size : 31 4 bits dividing resistor/booster : selected by mask option uart/sio synchronous/asynchronous data transfer capability. (max baud rate: 97.656 kbps at 12.5 mhz). (7 and 8 bits with parity bit; 8 and 9 bits without parity bit). buzzer output 7 frequencies are selectable by software. standby mode sleep mode, stop mo de, watch mode, sub-clock mode. process cmos operating voltage 2.2 v to 3.6 v 2.2 v to 5.5 v 2.7 v to 3.6 v 3.5 v to 5.5 v 2.7 v to 5.5 v *1 : use mbm27c256a as the external rom. *2 : read protection feature is selected by part number, detail please refer to mask options. part number package mb89485/485l mb89p485/p485l mb89pv480 dip-64p-m01 o o x fpt-64p-m23 o o x mdp-64c-p02 x x o mqp-64c-p01 x x o
mb89480 series ds07-12559-2e 5 differences among products 1. memory size before evaluating using the piggyback product, verify its differences from the product that will actually be used. take particular care on the following point: the stack area is set at the upper limit of the ram. 2. current consumption for the mb89pv480, the current consumed by the eprom mounted in the piggy-back socket is needed to be included. when operating at low speed, the current consumed by the one-time prom product is greater than that for the mask rom product. however, the current consumption is roughly the same in sleep and stop mode. for more information, see ? electrical characteristics?. 3. oscillation stabilization time after power-on reset for mb89pv480, mb89p485l and mb8948 5l, there is no power- on stabilization time after power-on reset. for mb89p485, there is power-on st abilization time afte r power-on reset. for mb89485, the po wer-on stabilization ti me can be selected. for more information, please refer to ? mask option?.
mb89480 series 6 ds07-12559-2e pin assignment (continued) com0 seg1 seg2 seg3 seg4 seg5 seg6 seg7 p40/seg8 p41/seg9 p42/seg10 p43/seg11 p44/seg12 p45/seg13 p46/seg14 p47/seg15 p50/seg16 p51/seg17 p52/seg18 p53/seg19 p54/seg20 p55/seg21 p56/seg22 p57 p10/seg23/int10 p11/seg24/int11 p12/seg25/int12 p13/seg26/int13 x0a x1a c * 2 vss vcc com1 p30/com2 p31/com3 v3 p27/v2/ec1 p26/v1/to1 v0/seg0 p25/c0/ec2 * 1 p24/c1/to2 * 1 p23/si p22/so p21/sck p20/pwm p00/int20 p01/int21 p02/int22 p03/int23 * 1 p04/int24 * 1 p05/int25 /pwc p06/int26 /ppg p07/int27 /buz avss avcc p17/seg30/an3 * 1 p16/seg29/an2 * 1 p15/seg28/an1 * 1 p14/seg27/an0 * 1 rst mode x1 x0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 (dip-64p-m01) (mdp-64c-p02) *1: if booster is selected, ec2 and to2 will be redirected to p03/int23 and p04/int24 respectively. segment output of p17/seg30/an3 - p14/seg27/an0 will be disabled. *2: for product other than mb89p485, pin 31 is nc pin. *3: pin assignment on package top. n.c.: as connected internally, do not use. pin no. pin symbol pin no. pin symbol pin no. pin symbol pin no. pin symbol 65 a15 73 a1 81 o6 89 a8 66 a12 74 a0 82 o7 90 a13 67 a7 75 o1 83 o8 91 a14 68 a6 76 o2 84 ce 92 v cc 69 a5 77 o3 85 a10 70 a4 78 v ss 86 oe 71 a3 79 o4 87 a11 72 a2 80 o5 88 a9 (top view) a15 a12 a7 a6 a5 a4 a3 a2 a1 a0 o1 o2 o3 v ss v cc a14 a13 a8 a9 a11 oe a10 ce o8 o7 o6 o5 o4 65 66 67 68 69 70 71 72 73 74 75 76 77 78 92 91 90 89 88 87 86 85 84 83 82 81 80 79 * 3
mb89480 series ds07-12559-2e 7 (continued) (fpt-64p-m23) *1: if booster is selected, ec2 and to2 will be redirected to p03/int23 and p04/int24 respectively. segment output of p17/seg30/an3 - p14/seg27/an0 will be disabled. *2: for product other than mb89p485, pin 23 is nc pin. p40/seg8 p41/seg9 p42/seg10 p43/seg11 p44/seg12 p45/seg13 p46/seg14 p47/seg15 p50/seg16 p51/seg17 p52/seg18 p53/seg19 p54/seg20 p55/seg21 p56/seg22 p57 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 p10/seg23/int10 p11/seg24/int11 p12/seg25/int12 p13/seg26/int13 x0a x1a * 2 c vss x0 x1 mode rst * 1 p14/seg27/an0 * 1 p15/seg28/an1 * 1 p16/seg29/an2 * 1 p17/seg30/an3 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 p25/c0/ec2 * 1 p24/c1/to2 * 1 p23/si p22/so p21/sck p20/pwm p00/int20 p01/int21 p02/int22 p03/int23 * 1 p04/int24 * 1 p05/int25 /pwc p06/int26 /ppg p07/int27 /buz avss avcc 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 seg7 seg6 seg5 seg4 seg3 seg2 seg1 com0 vcc com1 p30/com2 p31/com3 v3 p27/v2/ec1 p26/v1/to1 v0/seg0 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 (top view)
mb89480 series 8 ds07-12559-2e (continued) seg7 p40/seg8 p41/seg9 p42/seg10 p43/seg11 p44/seg12 p45/seg13 p46/seg14 p47/seg15 p50/seg16 p51/seg17 p52/seg18 p53/seg19 p54/seg20 p55/seg21 p56/seg22 p57 p10/seg23/int10 p11/seg24/int11 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 seg6 seg5 seg4 seg3 seg2 seg1 com0 vcc com1 p30/com2 p31/com3 v3 p27/v2/ec1 64 63 62 61 60 59 58 57 56 55 54 53 52 p12/seg25/int12 p13/seg26/int13 x0a x1a *2 c vss x0 x1 mode rst *1 p14/seg27/an0 *1 p15/seg28/an1 *1 p16/seg29/an2 20 21 22 23 24 25 26 27 28 29 30 31 32 85 86 87 88 89 90 91 92 93 77 76 75 74 73 72 71 70 69 94 95 96 65 66 67 68 84 83 82 81 80 79 78 (top view) (mqp-64c-p01) *1: if booster is selected, ec2 and to 2 will be redirected to p03/int23 and p04/int24 respectively. segment output of p17/seg30/an3 - p14/seg27/an0 will be disabled. *2: pin 24 is nc pin. pin assignment on package top n.c.: as connected internally, do not use. pin no. pin symbol pin no. pin symbol pin no. pin symbol pin no. pin symbol 65 n.c. 73 a2 81 n.c. 89 oe 66 v pp 74 a1 82 o4 90 n.c. 67 a12 75 a0 83 o5 91 a11 68 a7 76 n.c. 84 o6 92 a9 69 a6 77 o1 85 o7 93 a8 70 a5 78 o2 86 o8 94 a13 71 a4 79 o3 87 ce 95 a14 72 a3 80 v ss 88 a10 96 v cc p26/v1/to1 v0/seg0 p25/c0/ec2 * 1 p24/c1/to2 * 1 p23/si p22/so p21/sck p20/pwm p00/int20 p01/int21 p02/int22 p03/int23 * 1 p04/int24 * 1 p05/int25 /pwc p06/int26 /ppg p07/int27 /buz avss avcc p17/seg30/an3 * 1
mb89480 series ds07-12559-2e 9 pin description (continued) pin number pin name i/o circuit type function sh-dip* 1 mdip* 4 mqfp* 2 qfp* 3 33 26 25 x0 a connection pins for a cryst al or other oscillator. an external clock can be connected to x0. in this case, leave x1 open. 34 27 26 x1 29 22 21 x0a a connection pins for a cryst al or other oscillator. an external clock can be connected to x0a. in this case, leave x1a open. 30 23 22 x1a 35 28 27 mode b input pin for setting the memory access mode. connect directly to v ss . 36 29 28 rst c reset i/o pin. the pin is an n-ch open-drain type with pull- up resistor and a hysteresis input. the pin outputs an ?l? level when an internal reset request is present. inputting an ?l? level initializes internal circuits. 50 to 48 43 to 41 42 to 40 p00/int20 to p02/int22 d general-purpose cmos i/o port. a hysteresis input. the pin is shared with external interrupt 2 input. 47 40 39 p03/int23 d general-purpose cmos i/o port. a hysteresis input. the pin is shared with external interrupt 2 input, and shared with 8/16-bit timer/counter 21, 22 input when booster is selected. 46 39 38 p04/int24 d general-purpose cmos i/o port. a hysteresis input. the pin is shared with external interrupt 2 input, and shared with 8/16-bit timer/counter 21, 22 output when booster is selected. 45 38 37 p05/int25 / pwc d general-purpose cmos i/o port. a hysteresis input. the pin is shared with external interrupt 2 input, and pwc input. 44 37 36 p06/int26 / ppg d general-purpose cmos i/o port. a hysteresis input. the pin is shared with external interrupt 2 input, and 6-bit ppg output. 43 36 35 p07/int27 / buz d general-purpose cmos i/o port. a hysteresis input. the pin is shared with external interrupt 2 input and buzzer output. 25 to 28 18 to 21 17 to 20 p10/seg23/ int10 to p13/ seg26/int13 f/k general-purpose n-ch open-drain i/o port. a hysteresis input. the pin is shared with external interrupt 1 input and lcd segment output.
mb89480 series 10 ds07-12559-2e (continued) pin number pin name i/o circuit type function sh-dip* 1 mdip* 4 mqfp* 2 qfp* 3 37 to 40 30 to 33 29 to 32 p14/seg27/ an0 to p17/ seg30/an3 g/k general-purpose n-ch open-drain i/o port. an analog input. the pin is shared with a/d converter input and lcd segment output. lcd segment output will be disabled when booster is selected. 51 44 43 p20/pwm e general-purpose cmos i/o port. the pin is shared with pwm output. 52 45 44 p21/sck e general-purpose cmos i/o port. the pin is shared with uart/sio clock i/o. 53 46 45 p22/so e general-purpose cmos i/o port. the pin is shared with uart/sio data output. 54 47 46 p23/si d general-purpose cmos i/o port. the pin is shared with uart/sio data input. 55 48 47 p24/c1/to2 h general-purpose cmos i/o port. the pin is shared with 8/16-bit timer 21, 22 output (it is redirected to p04/int24 when booster is selected), and as a capacitor connecting pin when booster is selected. 56 49 48 p25/c0/ec2 f general-purpose cmos i/o port. a hysteresis input. the pin is shared with 8/16-bit timer 21, 22 input (it is redirected to p03/int23 when booster is selected), and as a capacitor connecting pin when booster is selected. 58 51 50 p26/v1/to1 h general-purpose cmos i/o port. the pin is shared with 8/16-bit timer 11, 12 output, and lcd power driving pin. 59 52 51 p27/v2/ec1 f general-purpose cmos i/o port. a hysteresis input. the pin is shared with 8/16-bit timer 11, 12 input, and lcd power driving pin. 62 55 54 p30/com2 i / k general-purpose n-ch open-drain output port. the pin is shared with the lcd common output. 61 54 53 p31/com3 i / k general-purpose n-ch open-drain output port. the pin is shared with the lcd common output. 9 to 16 2 to 9 1 to 8 p40/seg8 to p47/seg15 h / k general-purpose n-ch open-drain i/o port. the pin is shared with lcd segment output. 17 to 23 10 to 16 9 to 15 p50/seg16 to p56/seg22 h / k general-purpose n-ch open-drain i/o port. the pin is shared with lcd segment output. 24 17 16 p57 j general-purpose cmos input port.
mb89480 series ds07-12559-2e 11 (continued) *1: dip-64p-m01 *2: mqp-64c-p01 *3: fpt-64p-m23 *4: mdp-64c-p02 pin number pin name i/o circuit type function sh-dip* 1 mdip* 4 mqfp* 2 qfp* 3 2 to 8 59 to 64, 1 58 to 64 seg1 to seg7 k lcd segment output-only pins. 1, 63 58, 56 57, 55 com0 to com1 k lcd common output-only pins. 60 53 52 v3 ? lcd driving power supply pin. 57 50 49 v0/seg0 ? / k lcd driving power supply pin when booster is selected. lcd segment output when booster is not selected. 31 24 23 c ? when mb89p485 is used, connect an external 0.1 f capacitor between this pin and the ground. n.c. pin when mb89485/485l, mb89p485l or mb89pv480 is used. 64 57 56 v cc ? power supply pin (+3 v or +5 v). 32 25 24 v ss ? power supply pin (gnd). 41 34 33 av cc ? a/d converter power supply pin. 42 35 34 av ss ? a/d converter power supply pin. use at the same voltage level as v ss .
mb89480 series 12 ds07-12559-2e external eprom socket (mb89pv480 only) *1: mdp-64c-p02 *2: mqp-64c-p01 pin number pin name i/o function mdip* 1 mqfp* 2 91 90 66 87 85 88 89 67 68 69 70 71 72 73 74 95 94 67 91 88 92 93 68 69 70 71 72 73 74 75 a14 a13 a12 a11 a10 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0 o address output pins. 83 82 81 80 79 77 76 75 86 85 84 83 82 79 78 77 o8 o7 o6 o5 o4 o3 o2 o1 i data input pins. 65 76 81 90 65 76 81 90 n.c. ? internally connected pins. always leave open. 65 66 v pp o ?h? level output pin. 78 80 v ss o power supply pin (gnd). 84 87 ce o chip enable pin for the eprom. outputs ?h? in standby mode. 86 89 oe o output enable pin for the eprom. always outputs ?l?. 92 96 v cc o power supply pin for the eprom.
mb89480 series ds07-12559-2e 13 i/o circuit type (continued) type circuit remarks a main/sub-clock circuit oscillation feedback resistance is approx. 500 k ? for main clock circuit and 5 m ? for sub-clock circuit. b hysteresis input the pull-down resistor (not available in mb89p485/p485l) approx. 50 k ? c the pull-up resistor (p-channel) approx. 50 k ? hysteresis input d cmos output cmos input hysteresis input selectable pull-up resistor approx. 50 k ? e cmos output cmos input selectable pull-up resistor approx. 50 k ? x1 (x1a) x0 (x0a) n-ch p-ch p-ch n-ch stop mode control signal n-ch r p-ch n-ch r p-ch n-ch r port resource pull-up resistor register p-ch p-ch n-ch r port pull-up resistor register p-ch
mb89480 series 14 ds07-12559-2e (continued) type circuit remarks f n-ch open-drain output cmos input hysteresis input g n-ch open-drain output cmos input analog input h n-ch open-drain output cmos input i n-ch open-drain output j cmos input k lcd segment output n-ch port resources n-ch port analog input n-ch port n-ch port n-ch p-ch p-ch n-ch
mb89480 series ds07-12559-2e 15 handling devices 1. preventing latch-up latch-up may occur on cmos ic if voltage higher than v cc or lower than v ss is applied to input and output pins other than medium- to high-voltage pins or if higher than the voltage which shows on ?1. absolute maximum ratings? in electrical characteristics is applied between v cc and v ss . when latch-up occurs, power supply current increa ses rapidly and might thermally damage elements. when using, take great care not to exceed the absolute maximum ratings. also, take care to prevent the analog power supply (av cc ) and analog input from exceeding the digital power supply (v cc ) when the analog system power supply is turned on and off. 2. treatment of unused input pins leaving unused input pins open could cause malfunctions. they should be connected to a pull-up or pull-down resistor. 3. treatment of power supply pins on microcontrollers with a/dconverter connect to be av cc = v cc and av ss = v ss even if the a/d converter is not in use. 4. treatment of n.c. pins be sure to leave (internally connected) n.c. pins open. 5. power supply voltage fluctuations although v cc power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage could cause malfunctions, even if it occurs within the rated range. stabilizing voltage supp lied to the ic is therefore important. as stabiliz ation guidelines, it is recommend ed to control power so that v cc ripple fluctuations (p-p value) will be less than 10% of the standard v cc value at the commercial frequency (50 to 60 hz) and the transient fluctuation rate will be less th an 0.1 v/ms at the time of a momentary fluc tuation such as when power is switched. 6. precautions when using an external clock even when an external clock is used , oscillation stabilization time is re quired for power-on reset and wake-up from stop mode. 7. notes on noise in the external reset pin (rst ) if the reset pulse applied to the external reset pin (rst ) does not meet the specifications, it may cause malfunc- tions. use caution so that the reset pulse less than the specifications will not be fed to the external reset pin (rst ).
mb89480 series 16 ds07-12559-2e programming otprom in mb89p485/p485l with serial programmer 1. programming the otprom with serial programmer all otp products can be programmed with serial programmer. 2. programming the otprom to program the otprom using fujitsu mcu programmer mb91919-001. inquiry : fujitsu microelectronics asia pte ltd. :tel (65)-2810770 fax (65)-2810220 3. programming adapter for otprom to program the otprom using fujitsu mcu programmer mb91919-001, use the programming adapter listed below. inquiry : fujitsu microelectronics asia pte ltd. : tel (65)-2810770 fax (65)-2810220 4. otprom content protection for product with otprom content protection featur e (mb89p485/p485l-103, mb89p485/p485l-104), ot- prom content can be read using serial programmer if the otprom content protection mechanism is not activated. one predefined area of the otprom (fffc h ) is assigned to be used for preventing the read access of otprom content. if the protection code "00 h " is written in th is address (fffc h ), the otprom content cannot be read by any serial programmer. note: the program written into the otprom cannot be verified once the otprom protection code is written ("00 h " in fffc h ). it is advised to write the otprom protection code at last. 5. programming yield all bits cannot be programmed at fujitsu shipping test to a blanked otprom microcomputer, due to its nature. for this reason, a programming yield of 100% cannot be assured at all times. package compatible socket adapter dip-64p-m01 mb91919-812 fpt-64p-m23 mb91919-813
mb89480 series ds07-12559-2e 17 programming otprom in mb89p485/p485l with parallel programmer 1. programming otprom with parallel programmer only products without protection feature (i.e. mb89p485/p485l-101 and mb89p485/p485l-102) can be pro- grammed with parallel programmer. product with protection feature (i.e. mb89p485/p485l-103 and mb89p485/p485l-104) cannot be programmed with parallel programmer. 2. rom writer adapters and recommended rom writers the following shows rom writer adapters and recommended rom writers. ando electric co., ltd. (parallel programmer) fujitsu microelectronics asia pte ltd. (serial programmer) inquiries : fujitsu microelectronics asia pte ltd. : tel (65)-2810770 writing data to the otprom using writer from minato electronics co., ltd. (1) set the otprom writer for the cu50-otp (device code: cdb6dc). (2) load the program data to the otprom writer. (3) write data using the otprom writer. 3. programming yield all bits cannot be programmed at fujitsu shipping test to a blanked otprom microcomputer, due to its nature. for this reason, a programming yield of 100% cannot be assured at all times. package name applicable adapter model recommended writer dip-64p-m01 mb91919-604 mb91919-001 fpt-64p-m23 mb91919-605
mb89480 series 18 ds07-12559-2e programming to the eprom with piggyback/evaluation device 1. eprom for use mbm27c256a-20tvm 2. memory space memory space in each mode is shown in the diagram below. 3. programming to the eprom (1) set the eprom programmer to the mbm27c256. (2) load program data into the eprom programmer at 0000 h to 7fff h . (3) program to 0000 h to 7fff h with the eprom programmer. address normal operating mode corresponding addresses on the eprom programmer 0000 h 7fff h 0000 h 0080 h 0480 h 8000 h ffff h i/o ram not available prom 32kb eprom 32kb
mb89480 series ds07-12559-2e 19 block diagram main clock clock controller sub-clock ram f 2 mc-8l cpu rom other pins vcc, vss, mode, c * 2 internal data bus 21-bit timebase uart/sio port 0 port 1 x0 x1 p07/int27 /buz p21/sck p22/so p23/si timer x0a x1a port 3 n-ch open-drain output port 2 buzzer output 4 lcd controller/driver 32 4-bit display ram (16 bytes) 8-bit pwm timer port 4 and port 5 * 4 n-ch open-drain i/o port p10/seg23/int10 to p13/seg26/int13 seg1 to seg7 7 com0 , com1 2 v3 v0/seg0 * 3 8 p30/com2 p31/com3 reset circuit (watchdog timer) rst external interrupt 1 (edge) 4 4 16 p56/seg22 to p54/seg20 oscillator oscillator watch prescaler 8/16-bit timer/counter 21,22 cmos i/o port * 4 port 2 * 4 8/16-bit timer/counter 11,12 booster 2 2 p20/pwm p24/c1/to2 * 1 p25/c0/ec2 * 1 p26/v1/to1 p27/v2/ec1 cmos i/o port external interrupt 2 (level) 8 8-bit p05/int25 /pwc pwc timer 6-bit ppg p06/int26 /ppg p04/int24 * 1 p02/int22 p03/int23 * 1 to p00/int20 10-bit a/d converter p14/seg27/an0 * 1 to p17/seg30/an3 * 1 avcc avss 4 *1: if booster is selected, ec2 and to 2 will be redirected to p03/int23 and p04/int24 respectively. segment output of p14/seg27/an0 to p17/seg30/an3 will be disabled. *2: for product other than mb89p485, c pin is nc pin. *3: if booster is selected, it serves as v0. if booster is not selected, it serves as seg0. *4: p20 to p23 are cmos i/o ports. p24 to p27 ar e n-ch open-drain i/o ports . p57 is input-only port. n-ch open-drain i/o port p57 3 p53/seg19 to p50/seg16 4 p47/seg15 to p44/seg12 4 p43/seg11 to p40/seg8 4
mb89480 series 20 ds07-12559-2e cpu core 1. memory space the microcontrollers of the mb89480 series offer a memory space of 64 kbytes for storing all of i/o, data, and program areas. the i/o area is located the lowest address. the data area is provided immediately above the i/o area. the data area can be divided into register, stack, and direct areas according to the application. the program area is located at exactly the opposite end, th at is, near the highest address. provide the tables of interrupt reset vectors and vector call instructions toward the highest address within the program area. the memory space of the mb89480 series is structured as illustrated below. memory space mb89p485/p485l general- purpose registers i/o ram rom 0000 h 0080 h 0100 h 0280 h ffff h 0200 h vacant mb89485/485l general- purpose registers i/o ram rom 0000 h 0080 h 0100 h 0280 h ffff h 0200 h vacant mb89pv480 general- purpose registers i/o ram 0000 h 0080 h 0100 h ffff h 0200 h 0480 h rom external (32kb) 8000 h vacant c000 h c000 h ffc0 h ffc0 h ffc0 h vector table (reset, interrupt, vector call instruction)
mb89480 series ds07-12559-2e 21 2. registers the f 2 mc-8l family has two types of registers; dedicated registers in the cpu and general-purpose registers in the memory. the following registers are provided: program counter (pc) : a 16-bit register for indicating instruction storage positions. accumulator (a) : a 16-bit temporary register for storing arithmetic operations, etc. when the instruction is an 8-bit data processing instruction, the lower byte is used. temporary accumulator (t) : a 16-bit register for performing arithmetic operations with the accumulator. when the instruction is an 8-bit data processing instruction, the lower byte is used. index register (ix) : a 16-bit register for index modification. extra pointer (ep) : a 16-bit pointer for indicating a memory address. stack pointer (sp) : a 16-bit register for indicating a stack area. program status (ps) : a 16-bit register for storing a register pointer, a condition code. the ps can further be divided into higher 8 bits for use as a register bank pointer (rp) and the lower 8 bits for use as a condition code register (ccr). (see the diagram below.) pc a t ix ep sp ps 16 bits : program counter : accumulator : temporary accumulator : index register : extra pointer : stack pointer : program status fffd h undefined undefined undefined undefined undefined i-flag = 0, il1, 0 = 11 other bits are undefined. initial value vacancy vacancy vacancy h i il1, 0 n z vc 54 rp ps 109876 3210 15 14 13 12 11 rp ccr structure of the program status register
mb89480 series 22 ds07-12559-2e the rp indicates the address of the register bank currently in use. the relationship between the pointer contents and the actual address is based on the conversion rule illustrated below. the ccr consists of bits indicating the results of arit hmetic operations and the contents of transfer data and bits for control of cpu operations at the time of an interrupt. h-flag : set to "1" when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. clear to "0" otherwise. this flag is fo r decimal adjustment instructions. i-flag : interrupt is allowed when this fl ag is set to "1". interrupt is prohibited when the flag is set to "0". clear to "0" when reset. il1, 0 : indicates the level of the interrupt currently allo wed. processes an interrupt only if its request level is higher than the value indicated by this bit. n-flag : set to "1" if the msb is set to "1" as the result of an arithmetic operation. clear to "0" otherwise. z-flag : set to "1" when an arithmetic operation results in "0". clear to "0" otherwise. v-flag : set to "1" if a signed numeric value overflows because of an arithmetic calculation. clear to "0" if the overflow does not occur. c-flag : set to "1" when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. clear to "0" otherwise. set to the shift-out value in the case of a shift instruction. il1 il0 interrupt level priority 00 1 high low = no interrupt 01 10 2 11 3 rule for conversion of actual addresses of the general-purpose register area ?0? a15 ?0? a14 ?0? a13 ?0? a12 ?0? a11 ?0? a10 ?0? a9 ?1? a8 r4 a7 r3 a6 r2 a5 r1 a4 r0 a3 b2 a2 b1 a1 b0 a0 lower op codes rp generated addresses
mb89480 series ds07-12559-2e 23 the following general-purpose registers are provided: general-purpose registers: an 8-bit register for storing data the general-purpose registers are 8 bits and located in the register banks of the memory. one bank contains eight registers. up to a total of 32 banks can be used on the mb89480 series. the bank currently in use is indicated by the register bank pointer (rp). register bank configuration this address = 0100 h + 8 (rp) memory area 32 banks r 0 r 1 r 2 r 3 r 4 r 5 r 6 r 7
mb89480 series 24 ds07-12559-2e i/o map (continued) address register name register description read/write initial value 00 h pdr0 port 0 data register r/w xxxxxxxx b 01 h ddr0 port 0 data direction register w* 00000000 b 02 h pdr1 port 1 data register r/w xxxxxxxx b 03 h ddr1 port 1 data direction register w* 00000000 b 04 h pdr2 port 2 data register r/w 00000000 b 05 h (reserved) 06 h ddr2 port 2 data direction register r/w 00000000 b 07 h sycc system clock control register r/w x-1mm100 b 08 h stbc standby control register r/w 00010xxx b 09 h wdtc watchdog timer c ontrol register w* 0---xxxx b 0a h tbtc timebase timer control register r/w 00---000 b 0b h wpcr watch prescaler control register r/w 00--0000 b 0c h pdr3 port 3 data register r/w ------11 b 0d h (reserved) 0e h rsfr reset flag register r xxxx---- b 0f h (reserved) 10 h pdr4 port 4 data register r/w 11111111 b 11 h (reserved) 12 h pdr5 port 5 data register r/w x1111111 b 13 h to 1f h (reserved) 20 h smc1 uart/sio mode control register 1 r/w 00000000 b 21 h smc2 uart/sio mode control register 2 r/w 00000000 b 22 h src uart/sio rate cont rol register r/w xxxxxxxx b 23 h ssd uart/sio status/data register r 00001--- b 24 h sidr/sodr uart/sio data register r/w xxxxxxxx b 25 h eic1 external interrupt 1 control register 1 r/w 00000000 b 26 h eic2 external interrupt 1 control register 2 r/w 00000000 b 27 h eie2 external interrupt 2 enable register r/w 00000000 b 28 h eif2 external interrupt 2 flag register r/w -------0 b 29 h to 2b h (reserved) 2c h adc1 a/d control register 1 r/w -0000000 b 2d h adc2 a/d control register 2 r/w -0000001 b 2e h addh a/d data register (upper byte) r ------xx b 2f h addl a/d data register (lower byte) r xxxxxxxx b 30 h aden a/d input enable register r/w 1111---- b 31 h pcr1 pwc control register 1 r/w 0-0--000 b 32 h pcr2 pwc control register 2 r/w 00000000 b 33 h plbr pwc reload buffer register r/w xxxxxxxx b
mb89480 series ds07-12559-2e 25 (continued) * : bit manipulation instruction cannot be used. ? read/write access symbols r/w : readable and writable r : read-only w : write-only initial value symbols 0 : the initial value of this bit is ?0?. 1 : the initial value of this bit is ?1?. x : the initial value of this bit is undefined. - : unused bit. m : the initial value of this bi t is determined by mask option. address register name register description read/write initial value 34 h cntr pwm timer control register r/w 0-000000 b 35 h comr pwm timer compare register w* xxxxxxxx b 36 h t22cr timer 22 control register r/w 000000x0 b 37 h t21cr timer 21 control register r/w 000000x0 b 38 h t22dr timer 22 data register r/w xxxxxxxx b 39 h t21dr timer 21 data register r/w xxxxxxxx b 3a h t12cr timer 12 control register r/w 000000x0 b 3b h t11cr timer 11 control register r/w 000000x0 b 3c h t12dr timer 12 data register r/w xxxxxxxx b 3d h t11dr timer 11 data register r/w xxxxxxxx b 3e h ppgc1 ppg control register 1 r/w 00000000 b 3f h ppgc2 ppg control register 2 r/w 0-000000 b 40 h buzr buzzer control register r/w -----000 b 41 h to 5d h (reserved) 5e h lcr1 lcd controller control register 1 r/w 00010000 b 5f h lcr2 lcd controller control register 2 r/w -0000000 b 60 h to 6f h vram lcd data ram r/w xxxxxxxx b 70 h purc0 port 0 pull up resistor control register r/w 11111111 b 71 h (reserved) 72 h purc2 port 2 pull up resistor control register r/w ----1111 b 73 h to 7a h (reserved) 7b h ilr1 interrupt level setting register 1 w* 11111111 b 7c h ilr2 interrupt level setting register 2 w* 11111111 b 7d h ilr3 interrupt level setting register 3 w* 11111111 b 7e h ilr4 interrupt level setting register 4 w* 11111111 b 7f h (reserved)
mb89480 series 26 ds07-12559-2e electrical characteristics 1. absolute maximum ratings (av ss = v ss = 0.0 v) precautions: permanent device damage may occur if the above ?absolute maximum ratings? are exceeded. functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. exposure to absolute maximum rating conditions for extended periods may affect device reliability. * : ? applicable to pins: p00 to p07, p20 to p23, an0 to an3 ? use within recommended operating conditions. ? use at dc voltage (current). ? the +b signal should always be applied with a limiting resistance placed between the +b signal and the microcontroller. ? the value of the limiting resistance should be set so that when the +b signal is applied the input current to the microcontroller pin does not exceed rated values, either instantaneously or for prolonged periods. parameter symbol value unit remarks min max power supply voltage v cc av cc v ss ? 0.3 v ss + 6.0 v mb89pv480, mb89p485, mb89485 av cc must not exceed v cc v cc av cc v ss ? 0.3 v ss + 4.0 v mb89p485l, mb89485l av cc must not exceed v cc lcd power supply voltage v0 to v3 v ss ? 0.3 v ss + 6.0 v input voltage v i v ss ? 0.3 v cc + 0.3 v p00 to p07, p10 to p17, p20 to p27, p40 to p47, p50 to p57 output voltage v o v ss ? 0.3 v cc + 0.3 v p00 to p07, p10 to p17, p20 to p27, p30 to p31, p40 to p47, p50 to p56 maximum clamp current i clamp ? 2.0 + 2.0 ma * total maximum clamp current |i clamp | ? 20 ma * ?l? level maximum output current i ol ? 15 ma ?l? level average output current i olav ? 4ma average value (operating current operating rate) ?l? level total maximum output current i ol ? 100 ma ?l? level total average output current i olav ? 40 ma average value (operating current operating rate) ?h? level maximum output current i oh ? ?15 ma ?h? level average output current i ohav ? ?4 ma average value (operating current operating rate) ?h? level total maximum output current i oh ? ?50 ma ?h? level total average output current i ohav ? ?20 ma average value (operating current operating rate) power consumption p d ? 300 mw operating temperature t a ?40 +85 c storage temperature tstg ?55 +150 c
mb89480 series ds07-12559-2e 27 ? note that when the microcontroller drive current is low, such as in the power saving modes, the +b input potential may pass through the protective diode and increase the potential at the vcc pin, and this may affect other devices. ? note that if a +b signal is input when the microcontrolle r current is off (not fixed at 0 v), the power supply is provided from the pins, so that incomplete operation may result. ? note that if the +b input is applied during power-on, the power supply is provided from the pins and the resulting supply voltage may not be sufficient to operate the power-on result. ? care must be taken not to leave the +b input pin open. ? note that analog system input/output pins other than the a/d input pins (lcd drive pins, comparator input pins, etc.) cannnot accept +b signal input. ? sample recommended circuits : warning: semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. do not exceed these ratings. 2. recommended operating conditions (av ss = v ss = 0.0 v) * : these values depend on the operating conditions and the analog assurance range. see figure 1, 2, 3 and ?5. a/d converter electrical characteristics.? parameter symbol value unit remarks min max power supply voltage v cc av cc 2.2* 5.5 v operation assurance range mb89485 3.5* 5.5 v operation assurance range mb89p485 2.7* 5.5 v operation assurance range mb89pv480 1.5 5.5 v retains the ram state in stop mode mb89485, mb89p485, mb89pv480 2.2* 3.6 v operation assurance range mb89485l, mb89p485l 1.5 3.6 v retains the ram state in stop mode lcd power supply voltage v0 to v3 vss vcc v operating temperature t a ?40 +85 c p-ch n-ch v cc r b input (0 v to 16 v) input/output equivalent circuits limiting resistance protective diode
mb89480 series 28 ds07-12559-2e figure 1 operating voltage vs. main clock operating frequency (mb89p485/485) figure 2 operating voltage vs. main clock operating frequency (mb89p485l/485l) 2.0 4.0 5.0 3.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 operating voltage (v) 4.0 2.0 1.0 0.4 1.33 0.8 0.66 0.57 0.50 0.44 main clock operating freq. (mhz) min execution time (inst. cycle) ( s) 3.5 2.7 11.0 12.0 12.5 0.36 0.33 0.32 analog accuracy assurance range : vcc = avcc =4.5v~5.5v 5.5 2.2 4.5 note : the shaded area is not assured for mb89p485 2.0 3.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 operating voltage (v) 4.0 2.0 1.0 0.4 1.33 0.8 0.66 0.57 0.50 0.44 3.6 2.7 11.0 12.0 12.5 0.36 0.33 0.32 analog accuracy assurance range : vcc = avcc = 2.7v~3.6v 2.2 min execution time (inst. cycle) ( s) main clock operating freq. (mhz) note : the shaded area is not assured for mb89p485l
mb89480 series ds07-12559-2e 29 figure 3 operating voltage vs. main clock operating frequency (mb89pv480) figure 1, 2 and 3 indicate the oper ating frequency of the external osc illator at an instruction cycle of 4/f ch . since the operating voltage range is dependent on the instruction cycle, see minimum execution time if the operating speed is switched using a gear. warning: the recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. all of the device's el ectrical characteristics are warranted when the device is operated within these ranges. always use semiconductor devices within thei r recommended operating condition ranges. operation outside these ranges ma y adversely affect reliability and could result in device failure. no warranty is made with respect to uses, operat ing conditions, or combinations not represented on the data sheet. users considering application outsi de the listed conditions are advised to contact their representatives beforehand. 4.0 5.0 3.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0 operating voltage (v) 4.0 2.0 1.0 0.4 1.33 0.8 0.66 0.57 0.50 0.44 main clock operating freq. (mhz) min execution time (inst. cycle) ( s) 3.5 2.7 11.0 12.0 12.5 0.36 0.33 0.32 analog accuracy assurance range : vcc = avcc = 4.5v~5.5v 5.5 4.5
mb89480 series 30 ds07-12559-2e 3. dc characteristics (av cc = v cc = 5.0 v for mb89pv480, mb89p485, mb89485, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) av cc = v cc = 3.0 v for mb89p485l, mb89485l, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) (continued) parameter symbol pin condition value unit remarks min typ max ?h? level input voltage v ih p00 to p07, p10 to p17, p20 to p27, p40 to p47, p50 to p57 ? 0.7 v cc ?v cc + 0.3 v v ihs rst , mode, ec1, ec2, pwc, sck, si, int10 to int13, int20 to int27 ? 0.8 v cc ?v cc + 0.3 v ?l? level input voltage v il p00 to p07, p10 to p17, p20 to p27, p40 to p47, p50 to p57 ?v ss ? 0.3 ? 0.3 v cc v v ils rst , mode, ec1, ec2, pwc, sck, si, int10 to int13, int20 to int27 ?v ss ? 0.3 ? 0.2 v cc v open-drain output pin application voltage v d p10 to p17, p24 to p27, p30 to p31, p40 to p47, p50 to p56 ?v ss ? 0.3 ? v cc + 0.3 v product with- out booster v3 product with booster ?h? level output voltage v oh p00 to p07, p20 to p23 i oh = ?2.0 ma 4.0 ? ? v mb89pv480, mb89p485, mb89485 2.2 ? ? v mb89p485l, mb89485l ?l? level output voltage v ol p00 to p07, p10 to p17, p20 to p27, p30 to p31, p40 to p47, p50 to p56, rst i ol = 4.0 ma ??0.4v mb89pv480, mb89p485, mb89485 p00 to p07, p20 to p23, rst ??0.4v mb89p485l, mb89485l p10 to p17, p24 to p27, p30 to p31, p40 to p47, p50 to p56 i ol = 2.0 ma ? ? 0.4 v mb89p485l, mb89485l
mb89480 series ds07-12559-2e 31 (continued) (av cc = v cc = 5.0 v for mb89pv480, mb89p485, mb89485, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) av cc = v cc = 3.0 v for mb89p485l, mb89485l, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) (continued) parameter symbol pin condition value unit remarks min typ max input leakage current i li p00 to p07, p10 to p17, p20 to p27, p40 to p47, p50 to p57 0.45 v < v i < v cc ? 5? + 5 a without pull-up resistor open-drain output leakage current i lod p10 to p17, p24 to p27, p30 to p31, p40 to p47, p50 to p56 0.45 v < v i < v cc ? 5? + 5 a pull-down resistance r down mode v i = v cc 25 50 100 k ? except mb89p485, mb89p485l pull-up resistance r pull p00 to p07, p20 to p23, rst v i = 0.0 v 25 50 100 k ? when pull-up resistor is selected (except rst ) power supply current i cc1 v cc f ch = 10 mhz, t inst = 0.4 s, main clock run mode ?613 ma mb89485 ? 3 7 mb89485l ? 5 10 mb89p485 ? 4 8 mb89p485l i cc2 f ch = 10 mhz, t inst = 6.4 s, main clock run mode ?0.9 3 ma mb89485 ? 0.4 1.5 mb89485l ? 0.9 3 mb89p485 ? 0.5 2 mb89p485l i ccs1 f ch = 10 mhz, t inst = 0.4 s, main clock sleep mode ?2 5 ma mb89485 ? 1 2.5 mb89485l ? 2.5 5 mb89p485 ? 1.2 2.5 mb89p485l i ccs2 f ch = 10 mhz, t inst = 6.4 s, main clock sleep mode ?0.7 2 ma mb89485 ? 0.3 1 mb89485l ? 0.9 2 mb89p485 ? 0.4 1 mb89p485l i ccl f cl = 32.768 khz, t a = +25 0 c, sub-clock run mode ?4085 a mb89485 ? 22 50 mb89485l ? 400 800 mb89p485 ? 25 50 mb89p485l
mb89480 series 32 ds07-12559-2e (av cc = v cc = 5.0 v for mb89pv480, mb89p485, mb89485, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) av cc = v cc = 3.0 v for mb89p485l, mb89485l, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) (continued) parameter symbol pin condition value unit remarks min typ max power supply current i ccls v cc f cl = 32.768 khz, t a = +25 0 c, sub-clock sleep mode ?1530 a mb89485 ? 7 15 mb89485l ? 12 30 mb89p485 ? 7 15 mb89p485l i cct t a = +25 0 c, watch mode, main clock stop mode ?210 a mb89485 ? 1 5 mb89485l ? 5 15 mb89p485 ? 1 5 mb89p485l i cch t a = +25 0 c, sub-clock stop mode ?1 5 a mb89485 ? 0.8 4 mb89485l ? 3 10 mb89p485 ? 0.8 4 mb89p485l i a av cc a/d conversion active ?1.3 6 ma mb89485 ? 1 3 mb89485l ? 1.3 6 mb89p485 ? 1 3 mb89p485l i ah t a = +25 0 c, a/d conversion stop ?1 5 a mb89485 ? 0.8 4 mb89485l ? 1 5 mb89p485 ? 0.8 4 mb89p485l common output impedance r vcom com0 to com3 v1 to v3 = +3.0 v ??2.5k ? mb89p485l, mb89485l v1 to v3 = +5.0 v mb89pv480, mb89p485, mb89485 segment output impedance r vseg seg0 to seg30 v1 to v3 = +3.0 v ??15k ? mb89p485l, mb89485l v1 to v3 = +5.0 v mb89pv480, mb89p485, mb89485 lcd divided resistance r lcd ? between v cc and v ss 300 500 750 k ?
mb89480 series ds07-12559-2e 33 (continued) (av cc = v cc = 5.0 v for mb89pv480, mb89p485, mb89485, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) av cc = v cc = 3.0 v for mb89p485l, mb89485l, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) parameter symbol pin condition value unit remarks min typ max lcd controller/ driver leakage current i lcdl v0 to v3, com0 to com3, seg0 to seg30 ??? 1 a booster for lcd driving output voltage v v3 v3 v1 = 1.5 v 4.3 4.5 4.7 v products with booster only v v2 v2 v1 = 1.5 v 2.9 3.0 3.1 v reference input voltage for lcd driving v v1 v1 i in = 0.0 a 1.4 1.5 1.7 v reference voltage input impedance r rin v1 ? 8.5 9.8 11 k ? input capacitance c in other than v cc , v ss , av cc , av ss f = 1 mhz ? 5 15 pf
mb89480 series 34 ds07-12559-2e 4. ac characteristics (1) reset timing (av cc = v cc = 5.0 v for mb89pv480, mb89p485, mb89485, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) av cc = v cc = 3.0 v for mb89p485l, mb89485l, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) note : t hcyl is the oscillation cycle (1/f ch ) to input to the x0 pin. the mcu operation is not guaranteed when the "l" pulse width is shorter than t zlzh . (2) power-on reset (av ss = v ss = 0.0 v, t a = ?40 c to +85 c) note : make sure that power supply rises wit hin the selected oscilla tion stabilization time. rapid changes in power supply voltag e may cause a power-on reset. if power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended. parameter symbol condition value unit remarks min max rst ?l? pulse width t zlzh ?48 t hcyl ?ns parameter symbol condition value unit remarks min max power supply rising time t r ? ?50ms power supply cut-off time t off 1 ? ms due to repeated operations t zlzh 0.2 v cc 0.2 v cc rst 0.2 v 0.2 v vth 0.2 v t r v cc t off vth = 3.5 v for mb89pv480, mb89p485 and mb89485 vth = 1.8 v for mb89p485l and mb89485l
mb89480 series ds07-12559-2e 35 (3) clock timing (av ss = v ss = 0.0 v, t a = ?40 c to +85 c) parameter symbol pin value unit remarks min typ max clock frequency f ch x0, x1 1 ? 12.5 mhz f cl x0a, x1a ? 32.768 ? khz clock cycle time t hcyl x0, x1 80 ? 1000 ns t lcyl x0a, x1a ? 30.5 ? s input clock pulse width p wh p wl x0 20 ? ? ns external clock p whl p wll x0a ? 15.2 ? s input clock rising/falling time t cr t cf x0, x0a ? ? 10 ns 0.2 v cc 0.8 v cc x0 0.2 v cc t cr p wh t cf 0.8 v cc 0.2 v cc x0 x1 x0 x1 when a crystal or ceramic reasonator is used when an external clock is used open t hcyl p wl f ch c1 c2 f ch x0 and x1 timing and conditions main clock conditions
mb89480 series 36 ds07-12559-2e (4) instruction cycle parameter symbol value unit remarks instruction cycle (minimum execution time) t inst 4/f ch , 8/f ch , 16/f ch , 64/f ch s (4/f ch )t inst = 0.32 s when operating at f ch = 12.5 mhz 2/f cl s t inst = 61.036 s when operating at f cl = 32.768 khz x0a x1a c 0 c 1 rd open when a crystal or ceramic oscillator is used when subclock is not used x0a x1a f cl 0.8 v cc t lcyl 0.2 v cc p whl p wll t cf t cr x0a open when an external clock is used f cl x0a x1a sub-clock timing and conditions sub-clock conditions
mb89480 series ds07-12559-2e 37 (5) serial i/o timing (av cc = v cc = 5.0 v for mb89pv480, mb89p485, mb89485, av cc = v cc = 3.0 v for mb89p485l, mb89485l av ss = v ss = 0.0 v, t a = ?40 c to +85 c) * : for information on t inst , see ?(4) instruction cycle.? parameter symbol pin condition value unit min max serial clock cycle time t scyc sck internal shift clock mode 2 t inst *? s sck so time t slov sck, so ?200 200 ns valid si sck t ivsh si, sck 1/2 t inst *? s sck valid si hold time t shix sck, si 1/2 t inst *? s serial clock ?h? pulse width t shsl sck external shift clock mode 1 t inst *? s serial clock ?l? pulse width t slsh 1 t inst *? s sck so time t slov sck, so 0 200 ns valid si sck t ivsh si, sck 1/2 t inst *? s sck valid si hold time t shix sck, si 1/2 t inst *? s
mb89480 series 38 ds07-12559-2e external clock operation internal clock operation 0.8 v 2.4 v t scyc 2.4 v 0.2 v cc t shix 0.8 v 0.8 v t ivsh 0.8 v cc 0.2 v cc 0.8 v cc sck so si t slov 0.2 v cc 0.8 v cc t slsh 2.4 v 0.2 v cc 0.8 v cc 0.8 v 0.8 v cc 0.2 v cc 0.8 v cc sck so si 0.2 v cc t shsl t shix t ivsh t slov
mb89480 series ds07-12559-2e 39 (6) peripheral input timing (av cc = v cc = 5.0 v for mb89pv480, mb89p485, mb89485 av cc = v cc = 3.0 v for mb89p485l, mb89485l av ss = v ss = 0.0 v, t a = ?40 c to +85 c) * : for information on t inst, see ?(4) instruction cycle.? parameter symbol pin value unit remarks min max peripheral input ?h? pulse width 1 t ilih1 int10 to int13, int20 to int27 , ec1, ec2, pwc 2 t inst *? s peripheral input ?l? pulse width 1 t ihil1 2 t inst *? s 0.2 v cc 0. 8 v cc t ihil1 0. 8 v cc 0.2 v cc t ilih1 int10 to int1 3 , int20 to int27, ec1, ec2, pwc
mb89480 series 40 ds07-12559-2e 5. a/d converter electrical characteristics (1) a/d converter electrical characteristics ( av cc = v cc = 4.5 v to 5.5 v for mb89pv480, mb89p485, mb89485, av cc = v cc = 2.7 v to 3.6 v for mb89p485l, mb89485l, av ss = v ss = 0.0 v, t a = ?40 c to +85 c) * : for information on t inst , see "(4) instruction cycle" in "4. ac characteristics". (2) a/d converter glossary resolution analog changes that are identifiable with the a/d converter. when the number of bits is 10, analog voltage can be divided into 2 10 = 1024. linearity error (unit: lsb) the deviation of the straight line connecting the zero transition point ("00 0000 0000" ? "00 0000 0001") with the full-scale transition point ("11 1111 1111" ? "11 1111 1110") from actual conversion characteristics. differential linearity error (unit: lsb) the deviation of input voltage needed to change the output code by 1 lsb from the theoretical value. total error (unit: lsb) the difference between theoretical and actual conversion values. parameter symbol pin value unit remarks min typ max resolution ? ? ?10 ?bit total error ? ? 4.0 lsb linearity error ? ? 2.5 lsb differential linearity error ? ? 1.9 lsb zero transition voltage v ot av ss ? 1.5 lsb av ss + 0.5 lsb av ss + 2.5 lsb v full-scale transition voltage v fst av cc ? 4.5 lsb av cc ? 2.5 lsb av cc - 0.5 lsb v a/d mode conversion time ? ? ? 60 tinst* s analog port input current i ain an0 to an3 ??10 a analog input voltage v ain av ss ?av cc v
mb89480 series ds07-12559-2e 41 0.5 lsb 1 lsb analog input av ss 1.5 lsb theoretical i/o characteristics 3ff 3fe 3fd 004 003 002 001 av cc theoretical value analog input av ss v nt actual conversion value total error 3ff 3fe 3fd 004 003 002 001 av cc {1 lsb n + v ot } v fst v ot actual conversion value total error = v nt ? {1 lsb n + 0.5 lsb} 1 lsb 1 lsb = v fst ? v ot 1022 digital output digital output (v) analog input av ss linearity error 3ff 3fe 3fd 004 003 002 001 av cc theoretical value analog input av ss av cc av ss v nt v (n + 1)t actual conversion value differential linearity error n + 1 n n ? 1 n ? 2 av cc v nt v ot (actual measurement) actual conversion value actual conversion value differential linearity error = 1 lsb v (n + 1)t ? v nt digital output digital output linearity error = v nt ? {1 lsb n + v ot } 1 lsb ? 1 {1 lsb n + v ot } actual conversion value v fst (actual measurement) theoretical value analog input av ss zero transition error 004 003 002 001 theoretical value analog input actual conversion value full-scale transition error av cc actual conversion value digital output digital output actual conversion value actual conversion value v ot (actual measurement) v fst (actual measurement) 3ff 3fe 3fd 3fc
mb89480 series 42 ds07-12559-2e (3) notes on using a/d converter input impedance of the analog input pins the a/d converter used for the mb89480 series contains a sample and hold circuit as illustrated below to fetch analog input voltage into the sa mple and hold capacitor for 16 inst ruction cycles after activation a/d conversion. for this reason, if the output impedance of the exter nal circuit for the analog input is high, analog input voltage might not stabilize within th e analog input sampling period. ther efore, it is recommended to keep the output impedance of the external circuit low . note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of about 0.1 f for the analog input pin. mb89485 mb89pv480 mb89485l mb89p485 mb89p485l r: analog input equivalent resistance 2.2 k ? 2.8 k ? 2.6 k ? 7.1 k ? c: analog input equivalent capacitance 45 pf 46 pf 28 pf 48.3 pf an a log inp u t pin sa mple a nd hold circ u it comp a r a tor r c an a log ch a nnel s elector clo s e for 16 in s tr u ction cycle s a fter a ctiv a ting a/d conver s ion. if the a n a log inp u t imped a nce i s higher th a n 10 k ? , it i s recommended to connect a n extern a l c a p a citor of a pprox. 0.1 f.
mb89480 series ds07-12559-2e 43 example characteristics (1) "l" level output voltage (2) "h" level output voltage v ol vs. i ol (mb89485) 0.8 0.6 0.4 0.2 0.0 0246 810 v ol [v] t a = + 25 c v cc = 3.0 v v cc = 3.5 v v cc = 4.0 v v cc = 4.5 v v cc = 5.0 v v cc = 5.5 v v cc = 6.0 v i ol [ma] v ol vs. i ol (mb89485l) v ol [v] i ol [ma] v cc = 2.5 v v cc = 3.0 v v cc = 3.5 v v cc = 4.0 v 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0246 810 t a = + 25 c v cc = 2.0 v v cc -v oh vs. i oh (mb89485) v cc -v oh [v] 2.0 1.6 1.2 0.8 0.4 0.0 0 ? 2 ? 4 ? 6 ? 8 ? 10 i oh [ma] v cc = 3.0 v v cc = 3.5 v v cc = 4.0 v v cc = 4.5 v v cc = 5.0 v v cc = 5.5 v v cc = 6.0 v v cc -v oh vs. i oh (mb89485l) v cc -v oh [v] 2.0 1.6 1.2 0.8 0.4 0.0 0 ? 2 ? 4 ? 6 ? 8 ? 10 i oh [ma] v cc = 3.0 v v cc = 3.5 v v cc = 4.0 v v cc = 2.5 v v cc = 2.0 v t a = + 25 c t a = + 25 c
mb89480 series 44 ds07-12559-2e (3) "h" level input voltag e/"l" level input voltage 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 1234567 v in [v] vcc [v] t a = +25 c 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 1234567 v in [v] vcc [v] t a = +25 c v ihs v ils o o cmos input (mb89485) cmos hysteresis input (mb89485) v ihs : threshold when input voltage in hysteresis characteristics is set to ?h? level. v ils : threshold when input voltage in hysteresis characteristics is set to ?l? level.
mb89480 series ds07-12559-2e 45 (4) power supply current (external clock) (continued) i cc1 vs. v cc (mb89485) i cc1 [ma] 10.0 8.0 6.0 4.0 2.0 0.0 12 34 5 6 7 v cc [v] t a = + 25 c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz i cc2 vs. v cc (mb89485) i cc2 [ma] t a = + 25 c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 1234 567 v cc [v] i ccs1 vs. v cc (mb89485) i ccs1 [ma] v cc [v] 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 12 34 5 6 7 f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz i ccs2 vs. v cc (mb89485) i ccs2 [ma] v cc [v] 1.2 1.0 0.8 0.6 0.4 0.2 0.0 12 3 4 5 6 7 t a = + 25 c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz t a = + 25 c
mb89480 series 46 ds07-12559-2e (continued) i cc2 vs. v cc (mb89485l) i cc2 [ma] v cc [v] 1.0 0.8 0.6 0.4 0.2 0.0 12 34 5 t a = + 25 c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz i ccs1 vs. v cc (mb89485l) i ccs1 [ma] v cc [v] 123 4 5 2.4 2.0 1.6 1.2 0.8 0.4 0.0 t a = + 25 c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz i ccs2 vs. v cc (mb89485l) i ccs2 [ma] v cc [v] f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz t a = + 25 c 12 34 5 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 i cc1 vs. v cc (mb89485l) i cc1 [ma] 7.0 6.0 5.0 4.0 3.0 2.0 1.0 0.0 123 4 5 v cc [v] t a = + 25 c f ch = 12.5 mhz f ch = 10.0 mhz f ch = 8.0 mhz f ch = 4.0 mhz f ch = 2.0 mhz f ch = 1.0 mhz
mb89480 series ds07-12559-2e 47 (continued) t a = + 25 c i ccl vs. v cc (mb89485) i ccl [ a] f cl = 32.768 khz 60 50 40 30 20 10 0 12 3456 7 v cc [v] i cct vs. v cc (mb89485) i cct [ a] 123456 7 v cc [v] t a = + 25 c f cl = 32.768 khz 2.8 2.4 2.0 1.6 1.2 0.8 0.4 0.0 i ccls vs. v cc (mb89485) i ccls [ a] 12 3456 7 v cc [v] 16 14 12 10 8 6 4 2 0 t a = + 25 c f cl = 32.768 khz
mb89480 series 48 ds07-12559-2e (5) pull-up resistance r pull vs. v cc (mb89485) r pull [k ? ] 320 280 240 200 160 120 80 40 0 1234567 t a = + 85 c t a = + 25 c t a = ? 40 c v cc [v] r pull vs. v cc (mb89485l) r pull [k ? ] 200 160 120 80 40 0 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v cc [v] t a = + 85 c t a = + 25 c t a = ? 40 c
mb89480 series ds07-12559-2e 49 mask options no. part number mb89485 mb89485l mb89p485 mb89p485l mb89pv480 specifying procedure specify when ordering mask setting not possible setting not possible 1 booster selection (ksv) internal resistor ladder booster selectable 101/103 : internal resistor ladder 102/104: booster 101 : internal resistor ladder 102: booster 2 selection of otprom content protection feature no protection feature with protection feature ? 101/102 : no protection 103/104 : with protection ? 3 selection of oscillation stabilization time (osc) 2 14 /f ch (approx.1.3 ms) 2 17 /f ch (approx.10.5 ms) 2 18 /f ch (approx.21.0 ms) selectable osc 2 18 /f ch (approx.21.0 ms) 2 18 /f ch (approx.21.0 ms) 4 selection of power-on stabilization time nil 2 17 /f ch selectable fixed to nil 2 17 /f ch fixed to nil fixed to nil
mb89480 series 50 ds07-12559-2e ordering information part number package remarks mb89485pmc mb89p485-101pmc mb89p485-102pmc mb89p485-103pmc mb89p485-104pmc mb89485lpmc mb89p485l-101pmc mb89p485l-102pmc mb89p485l-103pmc mb89p485l-104pmc 64-pin plastic qfp (fpt-64p-m23) 101: with internal resistor ladder, without content protection 102: with booster, without content protection 103: with internal resistor ladder, with content protection 104: with booster, with content protection mb89485p-sh mb89p485-101p-sh mb89p485-102p-sh mb89p485-103p-sh mb89p485-104p-sh mb89485lp-sh mb89p485l-101p-sh mb89p485l-102p-sh mb89p485l-103p-sh mb89p485l-104p-sh 64-pin plastic sh-dip (dip-64p-m01) mb89pv480-101c-sh mb89pv480-102c-sh 64-pin ceramic mdip (mdp-64c-p02) mb89pv480-101cf mb89pv480-102cf 64-pin ceramic mqfp (mqp-64c-p01)
mb89480 series ds07-12559-2e 51 package dimensions please confirm the latest pack age dimension by following url. http://edevice.fujitsu.com/package/en-search/ (continued) 64-pin pl as tic s h-dip le a d pitch 1.77 8 mm(70mil) p a ck a ge width p a ck a ge length 17 5 8 mm s e a ling method pl as tic mold mo u nting height 5.65 mm max 64-pin pl as tic s h-dip (dip-64p-m01) (dip-64p-m01) c 2001-200 8 fujit s u microelectronic s limited d64001 s -c-4-6 5 8 .00 +0.22 ?0.55 +.009 ?.022 2.2 83 17.000.25 (.669.010) 3 . 3 0 +0.20 ?0. 3 0 .1 3 0 ?.012 +.00 8 +.02 8 ?.00 8 .195 ?0.20 +0.70 4.95 +.016 ?.00 8 .054 3 ?0.20 +0.40 1. 3 7 8 1.77 8 (.0700) 0.470.10 (.019.004) 1.00 +0.50 ?0 .0 3 9 ?.0 +.020 +.020 ?.007 .02 8 ?0.19 +0.50 0.70 19.05(.750) (.011.004) 0.270.10 0 ~ 15 index-2 index-1 m 0.25(.010) dimen s ion s in mm (inche s ). note: the v a l u e s in p a renthe s e s a re reference v a l u e s . note: pin s width a nd pin s thickne ss incl u de pl a ting thickne ss .
mb89480 series 52 ds07-12559-2e please confirm the latest package dimension by following url. http://edevice.fujitsu.com/package/en-search/ (continued) 64-pin pl as tic lqfp le a d pitch 0.65 mm p a ck a ge width p a ck a ge length 12.0 12.0 mm le a d s h a pe g u llwing s e a ling method pl as tic mold mo u nting height 1.70 mm max code (reference) p-lfqfp64-12 12-0.65 64-pin pl as tic lqfp (fpt-64p-m2 3 ) (fpt-64p-m2 3 ) c 200 3 fujit s u limited f640 3 4 s -c-1-1 0.65(.026) 0.10(.004) 1 16 17 3 2 49 64 33 4 8 * 12.00 0.10(.472 .004) s q 14.00 0.20(.551 .00 8 ) s q index 0. 3 2 0.05 (.01 3 .002) m 0.1 3 (.005) 0.145 0.055 (.0057 .0022) "a" .059 ? .004 +.00 8 ? 0.10 +0.20 1.50 0 ~8 ? 0.25(.010) (mo u nting height) 0.50 0.20 (.020 .00 8 ) 0.60 0.15 (.024 .006) 0.10 0.10 (.004 .004) det a il s of "a" p a rt ( s t a nd off) dimen s ion s in mm (inche s ). note: the v a l u e s in p a renthe s e s a re reference v a l u e s ?200 3 -200 8 fujit s u microelectronic s limited f640 3 4 s -c-1-2 note 1) * : the s e dimen s ion s do not incl u de re s in protr us ion. note 2) pin s width a nd pin s thickne ss incl u de pl a ting thickne ss . note 3 )pin s width do not incl u de tie ba r c u tting rem a inder.
mb89480 series ds07-12559-2e 53 please confirm the latest package dimension by following url. http://edevice.fujitsu.com/package/en-search/ (continued) 64-pin cer a mic mdip le a d pitch 1.77 8 mm (70mil) row s p a cing 19.05mm (750mil) mother b o a rd m a teri a l cer a mic mo u nted p a cking m a teri a l pl as tic 64-pin cer a mic mdip (mdp-64c-p02) (mdp-64c-p02) +0.1 3 ?0.0 8 +.005 ?.00 3 index area 0 ~ 9 (.750.012) 19.050. 3 0 0.46 .01 8 (2.240.025) (.010.002) 0.250.05 (.050.010) 1.270.25 (.1 3 5.015) 3 .4 3 0. 38 55.12(2.170)ref (.0 3 5.005) 0.900.1 3 (.070.010) 1.77 8 0.25 10.16(.400)max 33 .02(1. 3 00)ref (.100.010) 2.540.25 (.7 38 .012) 1 8 .750. 3 0 typ 15.24(.600) 56.900.64 1994-200 8 fujit s u microelectronic s limited m64002 s c-1-5 c dimen s ion s in mm (inche s ). note: the v a l u e s in p a renthe s e s a re reference v a l u e s .
mb89480 series 54 ds07-12559-2e (continued) please confirm the latest package dimension by following url. http://edevice.fujitsu.c om/package/en-search/ 64-pin cer a mic mqfp le a d pitch 1.00 mm le a d s h a pe s tr a ight mother b o a rd m a teri a l cer a mic mo u nted p a ck a ge m a teri a l pl as tic 64-pin cer a mic mqfp (mqp-64c-p01) (mqp-64c-p01) c 1994-200 8 fujit s u microelectronic s limited m64004 s c-1-4 15.5 8 0.20 (.61 3 .00 8 ) 16. 3 00. 33 (.642.01 3 ) 1 8 .70(.7 3 6)typ index area 0. 3 0(.012) typ 1.270.1 3 (.050.005) 22. 3 00. 33 (. 8 7 8 .01 3 ) 24.70(.972) typ 10.16(.400) typ 12.02(.47 3 ) typ 14.22(.560) typ 1 8 .120.20 (.71 3 .00 8 ) 1.270.1 3 (.050.005) 0. 3 0(.012)typ 7.62(. 3 00)typ 9.4 8 (. 3 7 3 )typ 11.6 8 (.460)typ 0.50(.020)typ 0.150.05 (.006.002) 10. 8 2(.426) max 0.400.10 (.016.004) .047 e.00 8 +.016 e0.20 +0.40 1.20 0.400.10 (.016.004) 1.000.25 (.0 3 9.010) 1 8 .00(.709) typ 1.000.25 (.0 3 9.010) 12.00(.472)typ .047 e.00 8 +.016 e0.20 +0.40 1.20 dimen s ion s in mm (inche s ). note: the v a l u e s in p a renthe s e s a re reference v a l u e s .
mb89480 series ds07-12559-2e 55 main changes in this edition the vertical lines marked in the left side of the page show the changes. page section change results ?? changed the series name; mb89480/mb89480l series mb89480 series ?? changed the package code. fpt-64p-m09 fpt-64p-m23 18 programming to the eprom with piggyback/evaluation device deleted the ?2. programming socket adapter? 40 electrical characteristics 5. a/d converter electrical characteristics changed the unit of ?zero transition voltage? and ?full-scale transition voltage?. mv v 50 ordering information changed the order informations. mb89485pfm mb89485pmc mb89p485-101pfm mb89p485-101pmc mb89p485-102pfm mb89p485-102pmc mb89p485-103pfm mb89p485-103pmc mb89p485-104pfm mb89p485-104pmc mb89485lpfm mb89485lpmc mb89p485l-101pfm mb89p485l-101pmc mb89p485l-102pfm mb89p485l-102pmc mb89p485l-103pfm mb89p485l-103pmc mb89p485l-104pfm mb89p485l-104pmc 52 package dimensions changed the package figure. fpt-64p-m09 fpt-64p-m23
mb89480 series fujitsu microelectronics limited shinjuku dai-ichi seimei bldg., 7-1, nishishinjuku 2-chome, shinjuku-ku, tokyo 163-0722, japan tel: +81-3-5322-3347 fax: +81-3-5322-3387 http://jp.fujitsu.com/fml/en/ for further information please contact: north and south america fujitsu microelectronics america, inc. 1250 e. arques avenue, m/s 333 sunnyvale, ca 94085-5401, u.s.a. tel: +1-408-737-5600 fax: +1-408-737-5999 http://www.fma.fujitsu.com/ europe fujitsu microelectronics europe gmbh pittlerstrasse 47, 63225 langen, germany tel: +49-6103-690-0 fax: +49-6103-690-122 http://emea.fujitsu. com/microelectronics/ korea fujitsu microelectronics korea ltd. 206 kosmo tower building, 1002 daechi-dong, gangnam-gu, seoul 135-280, republic of korea tel: +82-2-3484-7100 fax: +82-2-3484-7111 http://kr.fujitsu.com/fmk/ asia pacific fujitsu microelectronics asia pte. ltd. 151 lorong chuan, #05-08 new tech park 556741 singapore tel : +65-6281-0770 fax : +65-6281-0220 http://www.fmal.fujitsu.com/ fujitsu microelectronics shanghai co., ltd. rm. 3102, bund center, no.222 yan an road (e), shanghai 200002, china tel : +86-21-6146-3688 fax : +86-21-6335-1605 http://cn.fujitsu.com/fmc/ fujitsu microelectroni cs pacific asia ltd. 10/f., world commerce centre, 11 canton road, tsimshatsui, kowloon, hong kong tel : +852-2377-0226 fax : +852-2376-3269 http://cn.fujitsu.com/fmc/en/ specifications are subject to change without notice. for further inform ation please cont act each office. all rights reserved. the contents of this document are subject to change without notice. customers are advised to consult with sales representative s before ordering. the information, such as descri ptions of function and applicati on circuit examples, in this docum ent are presented solely for t he purpose of reference to show examples of ope rations and uses of fujits u microelectronics device; fujitsu microelectronics does not warrant proper operation of the de vice with respect to use based on such information. when you develop equipment incor porating the device based on such inform ation, you must assume any res ponsibility arising out of su ch use of the information. fujitsu microelectronics assumes no liab ility for any damages whatsoever arisi ng out of the use of the information. any information in this document, including descriptions of function and schematic di agrams, shall not be construed as license of the use or exercise of any intellectual property ri ght, such as patent right or copyright, or any other right of fujitsu microelectroni cs or any third party or does fujitsu microel ectronics warrant non-infringeme nt of any third-party's intellectual property right o r other right by using such information. fu jitsu microelectronics assumes no liability for any infringement of the intellectual property rights or other rights of third parties which w ould result from the use of in formation cont ained herein. the products described in this document are designed, developed and manufa ctured as contemplated fo r general use, including wit hout limitation, ordinary indus trial use, general office use, personal use, and household use, but are not designed, developed and m anufactured as contemplated (1) for use accompanying fa tal risks or dangers that, unless extremely high safety is secured, could have a ser ious effect to the public, and could lead direct ly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction con trol in nuclear facility, aircraft flight contro l, air traffic control, mass tr ansport control, medical life s upport system, missile launch con trol in weapon system), or (2) for use requiring extrem ely high reliability (i.e., submersibl e repeater and artificial satellite). please note that fujitsu microelectronics will not be liable against you and/or any th ird party for any clai ms or damages arisi ng in connection with above-men tioned uses of the products. any semiconductor devices have an inherent ch ance of failure. you must protect against injury, damage or loss from such failure s by incorporating safety desi gn measures into your facility and equipment such as redundancy, fire protection, and prevention of ov er-current levels and other abnor mal operating conditions. exportation/release of any products described in this docum ent may require necessary procedures in accordance with the regulati ons of the foreign exchange and foreign trade control law of japan and/or us export control laws. the company names and brand na mes herein are the trademarks or registered trademarks of their respective owners. edited: business & media promotion dept.

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