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| usar spicoder tm sa ur5hcspi-sa zero-power keyboard encoder & power management ic for intel strongarm-based h/pcs usar h/pc ics family product specifications description features applications ? strongarm tm handheld pcs windows ce ? platforms web phones personal digital assistants (pdas) wearable computers internet appliance copyright 1999-2000 usar systems, inc. all rights reserved. usar ? a semtech company datasheet doc5-spi-sa-ds-107 1 pin assignments the usar spicoder tm ur5hcspi- sa, a member of usar?s h/pc ics family, is a keyboard encoder and power management ic designed specifically for handheld pcs (h/pcs), web phones and other systems that run microsoft ? windows ce ? and utilize the intel strongarm tm processor. the ur5hcspi-sa offers several features necessary to h/pcs, including low power consumption, real estate-saving size, and special keyboard modes. the ic operates at zero-power tm (less than 2a @ 3v), providing the the host system both power management and i/o flexibility, with minimal battery drainage. special keyboard modes and built- in power management features allow the usar spicoder tm sa to operate in harmony with the power management modes of windows ce ? , resulting in greater user flexibility, and longer battery life. the ic will scan, debounce and encode an 8 x 14 keyboard matrix. it communicates with the host over the spi channel, implementing a high-reliability two-way protocol. the ur5hcspi-sa also offers programmable features for wake- up keys and general purpose i/o pins. the ur5hcspi-sa is utilized in several intel reference designs. fully compatible to the windows ce ? keyboard specification works in harmony with the power management modes of win ce ? provides special modes of operation for h/pcs, including programmable ?wake-up? keys scans an 8 x 14 matrix and controls discrete switches and led indicators compatible with ?system-on silicon? cpus for h/pcs available in small 10mm by 10mm, 44-pin qfp package spi-compatible keyboard encoder and power management ic with other interfaces available ideal for use with the intel strongarm tm processor operates at patented zero-power tm ? typically consuming less than 2a, between 3-5v offers overall system power management capabilities implements high-reliability two-way protocol 111 12 22 33 23 44 34 pwr_ok nc0 osco osci vcc nc nc _reset _wku vx c7 _atn _ss sck mosi miso xsw sw0 c8 c9 c10/wuko c11/_lid nc c12 c13 gio0 _iotest vss nc r7 r6 r5 r4 c6 c5 c4 c3 c2 c1 c0 r0 r1 r2 r3 qfp c6 c7 vx nc _wku _reset vcc osci osco nc0 nc c5 c4 c3 c2 c1 c0 r0 r1 r2 r3 r4 _pwr_ok _atn _ss sck mosi miso xsw sw0 c8 c9 c10/wuko nc r5 r6 r7 vss nc _iotest gio0 c13 c12 c11/_lid 40 1 6 7 12 17 18 23 28 29 34 39 plcc a semtech company
usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications descri usar ? a semtech company datasheet doc5-spi-sa-ds-107 2 usar ?? a semtech company block diagram package options 44-pin, plastic plcc 44-pin, plastic qfp pich in mm?s 1.27 mm 0.8 mm ta = -40c to +85c UR5CSPI-SA-FN ur5cspi-sa-fb ordering code keyboard scanner & keyboard state control r0-r8 spi communication channel c0-c13 keyboard matrix lid latch monitor wake-up keys only signal switch external to case switch system monitor input signals power management unit programmable i/o gio0 lid wuko xsw swo pwr_ok wkup iotest wku miso mosi sck ss atn ur5hcspi-sa functional description the ur5hcspi-sa consists functionally of five major sections (see the functional diagram on page 2). these are the keyboard scanner and state control, the programmable i/o, the spi communication channel, the system monitor and the power management unit. all sections communicate with each other and operate concurrently. usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications usar ? a semtech company datasheet doc5-spi-sa-ds-107 3 usar ?? a semtech company. pin definitions mnemonic plcc qfp type name and function vcc 44 38 i power supply: 3-5v vss 22 17 i ground vx 4 43 i tie to vcc osci 43 37 i oscillator input osco 42 36 o oscillator output _reset 1 41 i reset: apply 0v to provide orderly start-up miso 34 29 o spi interface signals mosi 35 30 i sck 36 31 i _ss 37 32 i slave select: if not used tie to vss _iotest 24 18 o wake-up control signals _wku 2 42 i r0-r4 13-17 8-12 i row data inputs r5-r7 19-21 13-15 i port provides internal pull-up resistors c0-c5 12-7 7-2 o column select outputs: c6-c7 6-5 1,44 o c8-c9 31-30 26-25 o c12 27 21 o c13 26 20 o multi-function pins c10/wuko 29 24 i/o c10 & ? wake-up keys only ? imput c11/_lid 28 23 i/o c11 & lid latch detect input miscellaneous functions gi00 25 19 i/o general programmable i/o xsw 33 28 i external discrete switch swo 32 27 i discrete switch power management pins _atn 38 33 o cpu attention output _pwr_ok 39 34 i power ok input nc 3,18 39-40 no connects : these pins are unused 23,40 16,22 nc0 41 35 nc0 should be tied to vss or gnd note: an underscore before a pin mnemonic denotes an active low signal. usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications usar ? a semtech company datasheet doc5-spi-sa-ds-107 4 usar ?? a semtech company. vcc and vss vcc and vss are the power supply and ground pins. the ur5hcspi-sa will operate from a 3-5 volt power supply. to prevent noise problems, provide bypass capacitors placed as close as possible to the ic with the power supply. vx, where available, should be tied to vcc. osci and osco osci and osco provide the input and output connections for the on- chip oscillator. the oscillator can be driven by any of the following circuits: - crystal - ceramic resonator - external clock signal the frequency of the on-chip oscillator is 2 mhz. _reset a logic zero on the _reset pin will force the ur5hcspi-sa into a known start-up state. the reset signal can be supplied by any of the following circuits: - rc - voltage monitor - master system reset mosi, miso, sck, _ss, _atn these five signals implement the spi interface. the device acts as a slave on the spi bus. the _ss (slave select) pin must go high between successive characters in an spi message or it will cause a write collision error. the _atn pin is asserted low each time the ur5hcspi-sa has a packet ready for delivery. for a more detailed description, refer to the spi communication channel section on page 11 of this document. _iotest and _wku the_iotest and _wku pins ( ? input output test ? and ? wake up ? ) pins control the stop mode exit of the device. the designer can connect any number of active low signals to these two pins through a 15k resistor, in order to force the device to exit the stop mode. a sample circuit is shown on page 17 of this document. all the signals are ? wire-anded. ? when any one of these signals is not active, it should be floating (i.e., these signals should be driven from ? open-collector ? or ? open- drain ? outputs). other configurations are possible; contact the factory. r0-r7 the r0-r7 pins are connected to the rows of the scanned matrix. each pin provides an internal pull- up resistor, eliminating the need for external components. c0 to c9 pins c0 to c9 are bi-directional pins and are connected to the columns of the scanned matrix. when a column is selected, the pin outputs an active low signal. when the column is de-selected, the pin turns into high-impedance. c10/wuko the c10/wuko pin acts alternatively as column scan output and as an input. as an input, the pin detects the ? wake-up keys only ? signal, typically provided by the host cpu to indicate that the user has turned the unit off. when the device detects an active high state on this pin, it feeds this information into the ? keyboard state control ? unit, in order to disable the keyboard and enable the programmed wake-up keys. c11/_lid the c11/_lid pin acts in a similar manner to the c10/wuko. typically this pin is connected to the lid latch through a 150k resistor, in order to detect physical closing of the device cover. when the pin detects an active low state in this input, it feeds this information into the ? keyboard state control ? unit, in order to disable keys inside the case and enable only switches located physically on the outer body of the h/pc unit. pin descriptions usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications pin descriptions, cont. c12 and c13 c12 and c13 are used as additional column pins in order to accommodate larger-size keyboards, such as the fujitsu fkb1406 palmtop keyboard. gio0 is a programmable input/output switch or led pin; it can also be used as a wake-up signal. its programming is explained on page 9 of this document. xsw the xsw pin is dedicated to an external switch. this pin is handled differently than the rest of the switch matrix and is intended to be connected to a switch physically located on the outside of the unit. sw0 the sw0 pin is a dedicated input pin for a switch. pwr_ok the pwr_ok is an active low pin that monitors the battery status of the unit. when the ur5hcspi-sa detects a transition from high to low on this pin, it will immediately enter the stop mode, turn the led off and remain in this state until the batteries of the unit are replaced and the signal is deasserted. the windows ce ? keyboard the following illustration shows a typical implementation of a windows ce ? keyboard. windows ce ? does not support the following keyboard keys typically found on desktop and laptop keyboards: insert scroll lock pause num lock function keys (f1-f12) print screen if the keyboard implements the windows key, the following key combinations are supported in the windows ce ? environment: key combination result windows open start menu windows+k open keyboard tool windows+i open stylus tool windows+c open control panel windows+e explore the h/pc windows+r display the run dialog box windows+h open windows ce ? help ctrl+windows+a select all on desktop usar ? a semtech company datasheet doc5-spi-sa-ds-107 5 usar ?? a semtech company. 1 ! esc 3 # 2 @ 5 % 4 $ 7 & 6 ^ 9 ( 8 * - _ 0 ) e w t r u y o i p q f d h g k j l s a v c n b m x z tab shift ctrl shift enter = + \ | ' " ; : . > , < / ? ` ~ ] } [ { power alt usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications usar ? a semtech company datasheet doc5-spi-sa-ds-107 6 usar ?? a semtech company. ?ghost? keys in any scanned contact switch matrix, whenever three keys defining a rectangle on the switch matrix are pressed at the same time, a fourth key positioned on the fourth corner of the rectangle is sensed as being pressed. this is known as the ? ghost ? or ? phantom ? key problem. figure 1 : ? ghost ? or ? phantom ? key problem although the problem cannot be totally eliminated without using external hardware, there are methods to neutralize its negative effects for most practical applications. keys that are intended to be used in combinations should be placed in the same row or column of the matrix, whenever possible. shift keys (shift, alt, ctrl, window) should not reside in the same row (or column) as any other keys. the ur5hcspi-sa has built-in mechanisms to detect the presence of ? ghost ? keys. keyboard scanner the encoder scans a keyboard organized as an 8 row by 14 column matrix for a maximum of 112 keys. smaller size matrixes can also be accommodated by simply leaving unused pins open. the ur5hcspi-sa provides internal pull-ups for the row input pins. when active, the encoder selects one of the column lines (c0-c13) every 512 s and then reads the row data lines (r0-r7). a key closure is detected as a zero in the corresponding position of the matrix. a complete scan cycle for the entire keyboard takes approximately 9.2 ms. each key found pressed is debounced for a period of 20 ms. once the key is verified, the corresponding key code(s) are loaded into the transmit buffer of the spi communication channel. keyboard scanning n-key rollover in this mode, the code(s) corresponding to each key press are transmitted to the host system as soon as that key is debounced, independent of the release of other keys. when a key is released, the corresponding break code is transmitted to the host system. there is no limitation to the number of keys that can be held pressed at the same time. however, two or more key closures, occurring within a time interval of less than 5ms, will set an error flag and will not be processed. this feature is to protect against the effects of accidental key presses. actual key presses ? ghost ? key usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications these states of operation refer only to the keyboard functionality and, although they are related to power states, they are also independent of them. "send all keys" entry conditions: power on reset, soft reset, pwr_ok =1, {(lid=1) and (wuko=0)} exit conditions: pwr_ok = 0 -> "send no keys"(wuko=1) and (key press) -> "send wake-up keys only"(lid = 0) and (wuko=0) and (key press) -> "send xsw key only" description: this is the ur5hcspi- sa ? s normal state of operation, accepting and transmitting every key press to the system. this state is entered after the user powers on the unit and it is sustained while the unit is being used. ?send wake-up keys only? entry conditions : (wuko=1) and (key or switch press) exit conditions: soft reset -> ? send all keys ? pwr_ok = 0 -> ? send no keys ? description : this state is entered when the user turns the unit off. a signal line driven by the host will notify the ur5hcspi-sa about this state transition. while in this state, the ur5hcspi-sa will transmit only keys programmed to be wake-up keys to the system. it is not necessary for the ur5hcspi-sa to detect this transition in real time, since it does not affect any operation besides buffering keystrokes. usar ? a semtech company datasheet doc5-spi-sa-ds-107 7 usar ?? a semtech company. send all keys send wake up keys only send no keys pwr_ok pwr_ok pwr_ok = 0 soft reset (pwr_ok =1) and (wuko=0) and (lid=1) and key press (pwr_ok =1) and key press and (wuko = 1) wuko =1 and key press send xsw key only (lid = 0) and (wuk0=0) and key press (lid = 1) and (wuko=0) and key press wuko=1 and key press pwr_ok (pwr_ok =1) and (lid = 0) and (wuko=0) and key press 3 stop mode time-out entry will be shortened to further conserve energy. 4. while in this state all interrupts are disabled. the ur5hcspi-sa will exit this state on the next interrupt event that detects the pwr_ok line has been de- asserted. e ?send xsw key only" entry condition: (lid=0) and (wuko=0) and (key press) exit condition: (lid=1) and (wuko=0) and (key press) -> ? send all keys ? pwr_ok = 0 -> ? send no keys ? (wuko = 1) and (key press) -> ? send wake up keys only ? description: this state is entered upon closing the lid of the device. while in this state, the encoder will transmit only the xsw key, which is located outside the unit. this feature is designed to accommodate buttons on the outside of the box, such as a microphone button, that need to be used while the lid is closed. ?send no keys" entry conditions : pwr_ok transition from high to low exit conditions: (pwr_ok = 1) and (matrix key pressed or switch or _wkup) description: this state is entered when a pwr_ok signal is asserted (transition high to low), indicating a critically low level of battery voltage. the pwr_ok signal will cause an interrupt to the ur5hcspi-sa, which guarantees that the transition is performed in real time. while in this state, the ur5hcspi-sa will perform as follows: 1. the led will be turned off. nevertheless, its state is saved and will be restored after exiting the disabled state (change of batteries). 2. the ur5hcspi-sa will enter the stop mode for maximum energy conservation. keyboard states figure 2: the ur5hcspi-sa implements four modes of keyboard and switch operation. usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications key map for the fujitsu fkb1406 (ur5hcspi-sa) columns (c0?c13) 012345678910111213 lalt ` lctrl fn esc 1290- + bksp f1 f2 f9 f10 nmlk bk \ lsft del t y u i enter rshift pad 4 pad 5 pgdn tab q w e r o p [ ] pad 6 ins pause scrlk z caplk k l ; ? pad 2 pad 3 prtscr sysreq pgup asdfghj/ pad 1 / home x c v b n m , . spc pad 0 345678prog f3 f4 f5 f6 f7 f8 end usar ? a semtech company datasheet doc5-spi-sa-ds-107 8 usar ?? a semtech company. rows (r0?r6) keyboard layout for fujitsu fkb1406 esc f2 1 ! f2 2 @ f3 3 # f4 4 $ f5 5 % f6 6 ^ f7 7 & f8 8 * f9 9 ( f10 0 ) num lk - _ bk = + qwe rt yu i op asdf ghj kl z xcvbnm ~ < , . >? / : ; prt scr " ' sys req { pause scr lk ins end pgdn pgup home enter : ; ctrl alt fn shift del cap lock [ ] } 0 1 23 45 6 * 9 8 7 _ . / + prog ` shift 0 1 2 3 4 5 6 usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications usar ? a semtech company datasheet doc5-spi-sa-ds-107 9 usar ?? a semtech company. key codes key codes range from 01h to 73h and are arranged as follows: make code = column_number * 8 + row_number + 1 break code = make code or 80h discrete switches transmit the following codes: xsw = 71h sw0 = 72h gio0 = 73h gio0 pin the ur5hcspi-sa provides a general purpose pin, gio0, that can be programmed as input, output, debounced switch input or led output. the programmable i/o pin can be configured to the desired mode through a command from the system. after the i/o pin is configured, the host system can read or write data to it. if the pin is configured as a debounced switch, it will return scan codes. for pin gio0: i/o number = 0 led number = 0 input mode while in the input mode, the gio0 pin will detect input signals and report the input status to system as required. output mode in the output mode, the ur5hcspi-sa will control the output signal level according to the system command. when the pin is set at output mode, the default output is low. switch input mode in switch input mode, the ur5hcspi-sa will generate an individual make key code when the switch closes (pin goes low), and a break key code when the switch returns to open (pin goes to high). the switches generate key codes outside of those generated by the key matrix, from 71h - 73h. when the switch closes, the usar spicoder tm will not fall asleep. usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications led modes there are three led modes: off, on, and blinking. the led can be individually set to one of these modes. in the blinking mode, both the on- interval and the off-interval can be individually set. additionally, a meta blink count and meta blink interval may be specified. this describes an interval of a different length which may be inserted after each specified number of blinks. all the intervals are based on a 1/16th of a second duration. when the led is on or blinking, the usar spicoder tm will not enter the stop mode unless the pwr_ok signal is asserted low. in this case, the device will save the status of the led and turn it off. the default led mode is off. the above timing chart describes the behavior of an led using these settings,1: led on; 0: led off. usar ? a semtech company datasheet doc5-spi-sa-ds-107 10 usar ?? a semtech company. pin configurations when prototyping, caution should be taken to ensure that programming of the gio0 pin does not conflict with the circuit implemented. a series protection resistor is recommended for protection from improper programming of the pin. after a power-on or soft reset, gio0 defaults to the input state. the following drawing illustrates the suggested interface to the general purpose input/output pin. input gix circuit determined by the specific application output gix circuit determined by the specific application led gix switch gix wake-up interrupt generating switch _wku _iotest 15k 150k series protection resistor on on off on interval off interval 12 on off meta blink count 3 1 blinking cycle meta blink off on off on figure 4: timing chart: the behavior of an led using the settings,1: led on; 0: led off. figure 3: suggested interface of general purpose input/output pin usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications spi communication channel spi data transfers can be performed at a maximum clock rate of 500 khz. when the ur5hcspi-sa asserts the _atn signal to the host master, the data will have already been loaded into the data register waiting for the clocks from the master. one _atn signal is used per each byte transfer. if the host fails to provide clock signals for successive bytes in the data packet within 120 ms, the transmission will be aborted and a new session will be initiated by asserting a new _atn signal. in such a case, the whole packet will be re-transmitted. if the spi transmission fails 20 times consecutively, the synchronization between the master and slave may be lost. in this case, the ur5hcspi-sa will enter the reset state. when cpha = 0, the shift clock is the or of _ss with sck; therefore, _ss must go high between successive characters in an spi message. the master can assert _ss low only when it is getting ready to transmit or receive. after the last bit is shifted out, _ss must go high within 60 s. the ur5hcspi-sa implements the spi communication protocol according to the following diagram: cpol = 0 ---------- sck line idles in low state cpha = 0 ---------- ss line is an output enable control usar ? a semtech company datasheet doc5-spi-sa-ds-107 11 usar ?? a semtech company. figure 6: transmitting data waveforms: figure 7: receiving data waveforms figure 5: spi communication protocol when the host sends commands to the keyboard, the ur5hcspi-sa requires that the minimum and maximum intervals between two successive bytes be 200 s and 5 ms respectively. usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications data/command buffer the ur5hcspi-sa implements a data buffer that contains the key code/command bytes waiting to be transmitted to the host. if the data buffer is full, the whole buffer will be cleared and an "initialize" command will be sent to the host. at the same time, the keyboard will be disabled until the "initialize" or "initialize complete" command from the host is received. power management unit the ur5hcspi-sa supports two modes of operation. the following table lists the typical and maximum supply current (no dc loads) for each mode at 3.3 volts (+/- 10%). current typical max unit description run 1.5 1 3.0 ma entered only while data/commands are in process and if the leds are blinking stop 2.0 20 a entered after 125 ms of inactivity if leds islow power consumption of the keyboard sub-system will be determined primarily by the use of the leds. while the ur5hcspi-sa is in the stop mode, an active low wake-up output from the master must be connected to the edge-sensitive _wku pin of the ur5hcspi-sa. this signal will be used to wake up the ur5hcspi-sa in order to receive data from the master host. the master host will have to wait a minimum of 5 ms prior to providing clocks to the ur5hcspi-sa. the ur5hcspi-sa will enter the stop mode after a 125 ms period of keypad and/or host communications inactivity, or anytime the pwr_ok line is asserted low by the host. note that while one or more keys are held pressed, the ur5hcspi-sa will not enter the stop mode until every key is released. usar ? a semtech company datasheet doc5-spi-sa-ds-107 12 usar ?? a semtech company. stop run - keyboard - switch - input transaction - system wake-up - after 125 ms of inactivity and leds are off after reset or 125 ms of inactivity while processing current task and/or led(s) are active figure 8: the power states of the ur5hcspi-sa. spi communication table the following table describes the specific timing referenced in diagrams on page 11. signal name description min max units tatn:sa _ atn to first clock pulse - 120 ms tsck clock period 2 - s tss:hd last clock pulse to _ss de-asertion - 60 s twkup _wkup pulse width 125 - ns tsck:sa _wkup to first clock pulse 5 150 ms tib inter-byte period 0.2 5 ms usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications usar ? a semtech company datasheet doc5-spi-sa-ds-107 13 usar ?? a semtech company. communication protocol there are eight commands that may be sent from the ur5hcspi-sa to the host, and ten commands that may be sent from the host to the ur5hcspi-sa. each command from ur5hcspi-sa to the host is composed of a sequence of codes. all commands start with usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications lrc calculation, cont. the following c language function is an example of an lrc calculation program. it accepts two arguments: a pointer to a buffer and a buffer length. its return value is the lrc value for the specified buffer. char calculate lrc (char buffer, size buffer) { char lrc; size_t index; /* * init the lrc using the first two message bytes. */ lrc = buffer [0] ^ buffer [1]; /* * update the lrc using the remainder of the buffer. */ for (index = 2; index < buffer; index ++) lrc ^ = buffer[index]; /* * if the msb is set then clear the msb and change the next most significant bit */ if (lrc & 0x80) lrc ^ = 0xc0; /* * return the lrc value for the buffer.*/} commands to the host from the ur5hcspi-sa, cont. led status report usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications commands from the host to the ur5hcspi-sa each command to ur5hcspi-sa is composed of a sequence of codes. all commands start with usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications commands from the host to the ur5hcspi-sa, cont. usar ? a semtech company datasheet doc5-spi-sa-ds-107 16 usar ?? a semtech company. led modify usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications sample configuration usar ? a semtech company datasheet doc5-spi-sa-ds-107 17 usar ?? a semtech company. alternatively a 2mhz cmos signal can be tied directly to osc1 ur5hcspi-sa-fb v0.9 attention signal wake up signal row inputs column outputs to switch matrix power ok signal discrete switches ceramic resonator circuit with built in capacitors alternatively an rc circuit or master reset signal can be used power ok signal ?2000, usar. a semtech company vcc 1.5m 1.5m 15k ur5hcspi-sa-fb 7 6 5 4 8 2 1 44 26 25 24 37 36 38 3 41 29 30 31 32 33 17 35 42 18 23 34 19 20 21 27 28 9 10 11 12 13 14 15 43 c0 c1 c2 c3 r0 c5 c6 c7 c8 c9 c10/wuko osci osco vdd c4 reset miso mosi sck ss atn vss nc0 wku iotest c11/lid pwr_ok gio0 c13 c12 sw0 xsw r1 r2 r3 r4 r5 r6 r7 vpp 1mohm 2mhz tc54c4302ecb vout vin gnd 150k 15k 15k sck mosi miso _wkup _atn pwr_ok _lid wuko _ss usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications descri usar ? a semtech company datasheet doc5-spi-sa-ds-107 18 usar ?? a semtech company. implementation notes for the ur5hcspi-sa the following notes pertain to the suggested schematic found on the previous page. the built-in oscillator on the ur5hcspi-06 requires the attachment of the 2.00 mhz ceramic resonators with built-in load capacitors.. you can use either an avx, part number pbrc-2.00 br; or a murata part number cstcc2.00mg ceramic resonator. it may also be possible to operate with the 2.00 mhz crystal, albeit with reduced performance. due to their high q, the crystal oscillator circuits start-up slowly. since the usar spicoder tm sa constantly switches the clock on and off, it is important that the ceramic resonator is used (it starts up much quicker than the crystal). resonators are also less expensive than crystals. also, if crystal is attached, two load capacitors (33pf to 47pf) should be added, a capacitor between each side of the crystal and ground. in both cases, using ceramic resonator with built-in load capacitors, or crystal with external load capacitors, a feedback resistor of 1 meg should be connected between oscin and oscout. troubleshoot the circuit by looking at the output pin of the oscillator. if the voltage is half-way between supply and ground (while the oscillator should be running) --- the problem is with the load caps / crystal. if the voltage is all the way at supply or ground (while the oscillator should be running) --- there are shorts on the pcb. note: when the oscillator is intentionally turned off, the voltage on the output pin of the oscillator is high (at the supply rail). usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications electrical specifications absolute maximum ratings ratings symbol value unit supply voltage vdd -0.3 to +7.0 v input voltage vin vss -0.3 to vdd +0.3 v current drain per pin i 25 ma (not including vss or vdd) operating temperature ta t low to t high c ur5hcspi-sa -40 to +85 storage temperature range tstg - 65 to +150 c thermal characteristics characteristic symbol value unit thermal resistance tja c per w plastic 60 plcc 70 dc electrical characteristics (vdd=3.3 vdc +/-10%, vss=0 vdc, temperature range=t low to t high unless otherwise noted) characteristic symbol min typ max unit output voltage (i load<10a) vol 0.1 v voh vdd ? 0.1 output high voltage (i load=0.8ma) voh vdd ? 0.8 v output low voltage (i load=1.6ma) vol: 0.4 v input high voltage vih 0.7xvdd vdd v input low voltage vil vss 0.2xvdd v user mode current ipp 5 10 ma data retention mode (0 to 70 c) vrm 2.0 v supply current (run) idd 1.53 3.0 ma (wait) 0.711 1.0 ma (stop) 2.0 20 a i/o ports hi-z leakage current iil +/-10 a input current iin +/- 1 a i/o port capacitance cio 8 12 pf control timing (vdd=3.3 vdc +/-10%, vss=0 vdc, temperature range=t low to t high unless otherwise noted) characteristic symbol min max unit frequency of operation fosc mhz crystal option 2.0 external clock option dc 2.0 cycle time tcyc 1000 ns crystal oscillator startup time toxov 100 ms stop recovery startup time tilch 100 ms reset pulse width trl 8 tcyc interrupt pulse width low tlih 250 ns interrupt pulse period tilil * tcyc osc1 pulse width toh, tol 200 ns *the minimum period tlil should not be less than the number of cycle times it takes to execute the interrupt service routine pl us 21 tcyc. usar ? a semtech company datasheet doc5-spi-sa-ds-107 19 usar ?? a semtech company. usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications usar ? a semtech company datasheet doc5-spi-sa-ds-107 20 usar ?? a semtech company. quantity manufacture part# description 3 generic 15k 15k resistor 1 generic 150k 150k resistor 1 generic 11m 1m resistor 2 generic 1.5k 1.5 resistors 1 telcom tc54vc4302ecb713 ic volt detector cmos 4.3v sot23, for 5v operation tc54vc4302ecb713 ic volt detector cmos 2.7v sot23, for 3.3v operation 1 avx pbrc-2.00br 2.00mhz ceramic resonator with built in capacitors, smt revised 7/14/99 bill of materials for ur5hcspi-sa-fb usar spicoder tm sa ur5hcspi-sa usar h/pc ics family product specifications this page intentionally left blank usar ? a semtech company datasheet doc5-spi-sa-ds-107 21 usar ?? a semtech company. description for sales information and product literature, contact: usar ? a semtech company 568 broadway new york, ny 10012 info@usar.com http://www.usar.com 212 226 2042 telephone 212 226 3215 telefax in japan: semtech japan tel: 81-45-948-5925 fax: 81-45-948-5930 in taiwan: semtech asia/pacific sales tel: 011-886-2-2748-3380 fax: 011-886-2-2748-3390 koryo electronics co., ltd. telephone +886-2-2698-1143 e-mail alex.chen@koryo.com.tw in korea: semtech korea tel: 011-82-2-527-4377 fax: 011-82-2-527-4376 in europe semtech limited tel: +44-1592-630350 fax: +44-1592-774781 copyright 1999-2000 usar ? a semtech company. all rights reserved. spicoder and zero-power are trademarks of usar systems, inc. usar and the usar logo are registered trademarks of usar ? a semtech company. all other trademarks belong to their respective companies. intellectual property disclaimer this specification is provided "as is" with no warranties whatsoever including any warranty of merchantability, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification or sample. a license is hereby granted to reproduce and distribute this specification for internal use only. no other license, expressed or implied to any other intellectual property rights is granted or intended hereby. authors of this specification disclaim any liability, including liability for infringement of proprietary rights, relating to the implementation of information in this specification. authors of this specification also do not warrant or represent that such implementation(s) will not infringe such rights. a semtech company |
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