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icm7620/7610/7600 rev. a7 icmic r eserves the right to change specifications without prior notice 12/10/8-bit low power voltage output quad dacs with parallel interface features ? 12/10/8-bit quad dac s ? ultra-low power consumption ? guaranteed monotonic ? wide voltage swing output buffer ? parallel interface with double buffered inputs ? shutdown capability application ? battery-powered applications ? industrial process control ? digital gain and offset adjustment overview the icm7620, icm7610 and icm7600 are 12-bit, 10-bit and 8-bit voltage output, low power, quad dacs respectively, with guaranteed monotonic behavior. t hese dacs are available in 20 and 24 lead tssop packages . the input interface for the devices is 12 (icm7620) , 10 (icm7610) and 8 (icm7600) bit parallel interface. t hey operate from a single supply which can range from 2 .7v to 5.5v. these dacs also offer a shutdown feature. when acti ve, this will shutdown all dacs and would disconnect th e ref input from the dacs internally. the supply current is reduced to below 10 :a in shutdown mode. block diagram input control logic input latch a ref voa icm7620/7610/7600 dac a latch dac a x 2 power down control input latch b dac b latch dac b x 2 vob a1, a0 shdn wr input latch c dac c latch dac c x 2 input latch d dac d latch dac d x 2 voc vod ldac input data ic microsystems ic mic
icm7620/7610/7600 rev. a7 icmic r eserves the right to change specifications without prior notice 2 packages (20 lead C icm7600, 24 lead tssop C icm761 0, icm7620) 1 vob 2 voa 3 v dd 20 voc 19 vod 18 gnd ref shdn wr 7 d7 8 d6 9 d5 10 d4 17 a0 16 a1 15 14 d0 13 d1 12 d3 11 4 5 6 d2 ldac icm7600 1 vob 2 voa 3 v dd 24 voc 23 vod 22 gnd ref shdn wr 7 d11 8 d10 9 d9 10 d8 21 a0 20 a1 19 18 d0 17 d1 16 d3 15 4 5 6 d2 ldac 11 d7 12 d6 14 d5 13 d4 icm7620 1 vob 2 voa 3 v dd 24 voc 23 vod 22 gnd ref shdn wr 7 d9 8 d8 9 d7 10 d6 21 a0 20 a1 19 18 nc 17 nc 16 d1 15 4 5 6 d0 ldac 11 d5 12 d4 14 d3 13 d2 icm7610
icm7620/7610/7600 rev. a7 icmic re serves the right to change specifications without p rior notice 3 pin description (icm7600) pin name i/o description 1 vob o dac b output voltage 2 voa o dac a output voltage 3 vdd i supply voltage 4 ref i reference voltage input to all dac 5 shdn i shutdown (active high) 6 wr i write input (active low). used to load input into input latch. 7-14 d7-d0 i data inputs 15 ldac i load dac input (active low). 16 a1 i dac address select bit (msb) 17 a0 i dac address select bit (lsb) 18 gnd i ground 19 vod o dac d output voltage 20 voc o dac c output voltage pin description (icm7610) pin name i/o description 1 vob o dac b output voltage 2 voa o dac a output voltage 3 vdd i supply voltage 4 ref i reference voltage input to all dac 5 shdn i shutdown (active high) 6 wr i write input (active low). used to load input into input latch. 17-18 nc no connection 7-16 d11-d0 i data inputs 19 ldac i load dac input (active low). 20 a1 i dac address select bit (msb) 21 a0 i dac address select bit (lsb) 22 gnd i ground 23 vod o dac d output voltage 24 voc o dac c output voltage
icm7620/7610/7600 rev. a7 icmic r eserves the right to change specifications without prior notice 4 pin description (icm7620) pin name i/o description 1 vob o dac b output voltage 2 voa o dac a output voltage 3 vdd i supply voltage 4 ref i reference voltage input to all dac 5 shdn i shutdown (active high) 6 wr i write input (active low). used to load input into input latch. 7-18 d11-d0 i data inputs 19 ldac i load dac input (active low). 20 a1 i dac address select bit (msb) 21 a0 i dac address select bit (lsb) 22 gnd i ground 23 vod o dac d output voltage 24 voc o dac c output voltage absolute maximum ratings symbol parameter value unit v dd supply voltage -0.3 to 7.0 v i in input current +/- 25.0 ma v in_ digital input voltage (d0~d11, a1, a0 , wr , ldac ) -0.3 to 7.0 v v in_ref reference input voltage -0.3 to 7.0 v t stg storage temperature -65 to +150 o c t sol soldering temperature 300 o c stress greater than those listed under absolute max imum ratings may cause permanent damage to the devi ce. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the o perational sections of this specification is not implied. exposure to absolute maximum rating condit ions for extended periods may affect reliability. ordering information part operating temperature range package icm7620 -40 o c to 85 o c 24-lead tssop icm7610 -40 o c to 85 o c 24-lead tssop icm7600 -40 o c to 85 o c 20-lead tssop
icm7620/7610/7600 rev. a7 icmic re serves the right to change specifications without p rior notice 5 dc electrical characteristics (v dd = 2.7v to 5.5v, v out unloaded; all specifications t min to t max unless otherwise noted) symbol parameter test conditions min typ max unit dc performance icm7620 n resolution 12 bits dnl differential nonlinearity (notes 1 & 3) 0.4 + 1.0 lsb inl integral nonlinearity (notes 1 & 3) 4.0 + 12.0 lsb icm7610 n resolution 10 bits dnl differential nonlinearity (notes 1 & 3) 0.1 + 1.0 lsb inl integral nonlinearity (notes 1 & 3) 1.0 + 3.0 lsb icm7600 n resolution 8 bits dnl differential nonlinearity (notes 1 & 3) 0.05 + 1.0 lsb inl integral nonlinearity (notes 1 & 3) 0.25 + 0.75 lsb static accuracy ge gain error + 1.0 % of fs oe offset error + 35 mv power requirements v dd supply voltage 2.7 5 5.5 v i dd supply current full scale at vdd=5..5 300 700 :a supply current full scale at vdd=3.6 200 550 :a supply current in shutdown 5 20 :a dc electrical characteristics (continued) (v dd = 2.7v to 5.5v, v out unloaded; all specifications t min to t max unless otherwise noted) symbol parameter test conditions min typ max unit output characteristics vout output voltage range (notes 2 & 3) 0 v dd v vo sc short circuit current 60 150 ma output line regulation v dd =2.7v to 5.5v -3.0 0.4 3.0 mv/v logic inputs v ih digital input high (note 2) 0.5x v dd v v il digital input low (note 2) 00.2x v dd v digital input leakage (note 2) 5 :a
icm7620/7610/7600 rev. a7 icmic r eserves the right to change specifications without prior notice 6 ac electrical characteristics (v dd = 2.7v to 5.5v, v out unloaded; all specifications t min to t max unless otherwise noted) symbol parameter test conditions min typ max unit sr slew rate 2 v/:s settling time 8 :s mid-scale transition glitch energy 40 nv-s timing characteristics (v dd = 2.7v to 5.5v, all specifications t min to t max unless otherwise noted) symbol parameter test conditions min typ max unit t 1 address to wr setup time (note 2) 5 ns t 2 address to wr hold time (note 2) 0 ns t 3 data to wr setup time (note 2) 20 ns t 4 data to wr hold time (note 2) 0 ns t 5 wr pulse width (note 2) 15 ns t 6 ldac pulse width (note 2) 15 ns note 1 : linearity is defined from code 110 to 3990 (icm76 20) linearity is defined from code 16 to 1023 (icm7610 ) linearity is defined from code 4 to 255 (icm7600) note 2 : guaranteed by design; not tested in productio n note 3 : see applications information timing and operation diagram wr data address t 6 t 2 t 5 t 1 t 4 address valid ldac data valid t 3
icm7620/7610/7600 rev. a7 icmic re serves the right to change specifications without p rior notice 7 ldac wr a1 a0 latch state 1 1 x x input and dac data latched 1 0 0 0 input latch transparent C dac a 0 1 x x dac latch transparent C all dacs 0 0 0 0 dac latch of all dacs transparent and dac a input latch transparent 1 0 0 1 input latch transparent C dac b 1 0 1 0 input latch transparent C dac c 1 0 1 1 input latch transparent C dac d table 1. address table detailed description the icm7620 is a 12-bit voltage output quad dac. th e icm7610 is the 10-bit version of this family and the icm7600 is the 8-bit version. these devices have a parallel interface an d each dac has a double buffered input. this family of dacs has a guaranteed monotonic behavior. the operating supply range is from 2.7v to 5.5v. reference input the reference input accepts positive dc and ac sign als. the voltage at refin sets the full-scale outpu t voltage of all the dacs. the reference input voltage range is from 0 to vdd- 1.5v. the impedance at this pin is nominally about 40 k k. each dacs output amplifier is configured in a gain of 2 configuratio n. this means that the full-scale output of each da c will be 2x v ref . to determine the output voltage for any code, use the following equation. v out = 2 x (v ref x (d / (2 n ))) where d is the numeric value of dacs decimal input code, v ref is the reference voltage and n is number of bits, i.e. 12 for icm7620, 10 for icm7610 and 8 for icm7600. output buffer amplifier the quad dac has 4 output amplifiers connected in a gain of 2 configuration. these amplifiers have a w ide output voltage swing. the actual swing of the output amplifiers will be l imited by offset error and gain error. see the appl ications information section for a more detailed discussion. the output amplifier can drive a load of 2.0 k k to v dd or gnd in parallel with a 500 pf load capacitance and has a full-scale typical settling time of 8 :s. input logic this quad dac family uses a standard straight paral lel interface where d0 is the lsb and d11 is the ms b for the icm7620, d9 is the msb for the icm7610 and d7 is the msb for the i cm7600. each dac has its own double buffered input with an input latch and a dac latch. each dac will go the voltage outpu t that corresponds to the digital data that is stor ed in its dac latch. the wr input (active low), controls the input latch data and the ldac input (active low) updates the dac latches (table 1). please refer to the timing diagram for more detail. the address inputs (a1, a0) control dac addressing (table 1). power-down mode these parts offer shutdown capability to the user b y means of the shdn pin. when this pin is forced hi gh all the dacs power down and the ref input goes into high impedance sta te. the total current consumption will go down to b elow 10 :a in power down mode. the data is stored in the latches during power down and the dacs will power up in the previ ous state when shdn is driven back to logic low. power-on reset there is a power-on reset on board that will clear the contents of all the latches to all 0s on power- up and the dac voltage output will go to ground.
icm7620/7610/7600 rev. a7 icmic r eserves the right to change specifications without prior notice 8 applications information power supply bypassing and layout considerations as in any precision circuit, careful consideration has to be given to layout of the supply and ground. the return path from the gnd to the supply ground should be short with low imped ance. using a ground plane would be ideal. the supp ly should have some bypassing on it. a 10 :f tantalum capacitor in para llel with a 0.1 :f ceramic with a low esr can be us ed. ideally these would be placed as close as possible to the device. avoid cr ossing digital and analog signals, specially the re ference, or running them close to each other. output swing limitations the ideal rail-to-rail dac would swing from gnd to v dd . however, offset and gain error limit this ability. figure 1 illustrates how a negative offset error will affect the output. the o utput will limit close to ground since this is sing le supply part, resulting in a dead- band area. as a larger input is loaded into the dac the output will eventually rise above ground. this is why the linearity is specified for a starting code greater than zero. figure 2 illustrates how a gain error or positive o ffset error will affect the output when it is close to v dd . a positive gain error or positive offset will cause the output to be limited to the positive supply voltage resulting in a dead -band of codes close to full-scale. deadband negative offset figure 1 . effect of negative offset deadband positive offset offset and gain error v dd figure 2 . effect of gain error and positive offset
icm7620/7610/7600 rev. a7 icmic re serves the right to change specifications without p rior notice 9 package information 20 lead tssop, 24 lead tssop
icm7620/7610/7600 rev. a7 icmic r eserves the right to change specifications without prior notice 10
icm7620/7610/7600 rev. a7 icmic re serves the right to change specifications without p rior notice 11
icm7620/7610/7600 rev. a7 icmic r eserves the right to change specifications without prior notice 12 ordering information icm76x0 p g device 2 - icm7620 1 - icm7610 0 - icm7600 g = ro hs compliant lead - free package . blank = standard package. non lead-free. package t = tssop package

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