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[ak5358a] ak5358a 96khz 24-bit ? adc general description the ak5358a is a stereo a/d converter with wide sampling rate of 8khz 96khz and is suitable for consumer to professional audio system. the ak5358a achieves high accuracy and low cost by using enhanced dual bit ? techniques. the ak5358a requires no external components because the analog inputs are single-ended. the audio interfac e has two formats (msb justified, i 2 s) and can correspond to various systems like dtv, dvr and av receiver. features ? linear phase digital anti-alias filtering ? single-ended input ? digital hpf for dc-offset cancel ? s/(n+d): 92db ? dr: 102db ? s/n: 102db ? sampling rate ranging from 8khz to 96khz ? master clock: 256fs/384fs/512fs/768fs (8khz 48khz) 256fs/384fs (48khz 96khz) ? input level: ttl/cmos ? master / slave mode ? audio interface: 24bit msb justified / i 2 s selectable ? power supply: 4.5 5.5v (analog), 2.7 5.5v (digital) ? ta = ? 20 85 c ? small 16pin tssop package ? ak5357/59/81 pin-compatible ? modulator mclk ainl lrck sclk sdto dif vcom clock divider ainr agnd va decimation filter serial i/o interface voltage reference cks1 dgnd vd cks2 ? modulator decimation filter pdn cks0 ms0511-e-02 2008/01 - 1 -
[ak5358a] ordering guide AK5358AET ? 20 +85 c 16pin tssop (0.65mm pitch) akd5358a evaluation board for ak5358a pin layout cks1 vcom vd dgnd ainr ainl agnd va top view 8 7 6 5 4 3 2 1 9 10 11 12 13 14 15 16 dif pdn lrck mclk sclk cks2 cks0 sdto compatibility with ak5357, ak5359 and ak5381 ak5357 ak5358a ak5381 ak5359 fs 4khz to 96khz 8khz to 96khz 4khz to 96khz 8khz to 216khz s/(n+d) 88db 92db 96db 94db dr 102db 102db 106db 102db vih@ttl level mode 2.2v 2.2v 2.4v not available va (analog supply) 2.7 to 5.5v 4.5 to 5.5v 4.5 to 5.5v 4.5 to 5.5v 2.7 to 5.5v vd (digital supply) 2.7 to 5.5v 2.7 to 5.5v 3.0 to 5.5v 3.0 to 5.5v @96khz hpf disable available not available available available et: ? 20 +85 c et: ? 20 +85 c et: ? 20 +85 c et: ? 20 +85 c operating temperature vt: ? 40 +85 c vt: ? 40 +85 c vt: ? 40 +85 c xt: ? 40 +85 c ms0511-e-02 2008/01 - 2 -
[ak5358a] pin / function no. pin name i/o function 1 ainr i rch analog input pin 2 ainl i lch analog input pin 3 cks1 i mode select 1 pin common voltage output pin, va/2 4 vcom o bias voltage of adc input. 5 agnd - analog ground pin 6 va - analog power supply pin, 4.5 5.5v 7 vd - digital power supply pin, 2.7 5.5v 8 dgnd - digital ground pin audio serial data output pin 9 sdto o ?l? output at power-down mode. output channel clock pin 10 lrck i/o ?l? output in master mode at power-down mode. 11 mclk i master clock input pin audio serial data clock pin 12 sclk i/o ?l? output in master mode at power-down mode. power down mode & reset pin 13 pdn i ?h?: power up, ?l?: power down & reset the ak5358a must be reset once upon power-up. audio interface format pin 14 dif i ?h?: 24bit i 2 s compatible, ?l?: 24bit msb justified 15 cks2 i mode select 2 pin 16 cks0 i mode select 0 pin note: all input pins except analog input pins (ainr, ainl) should not be left floating. handling of unused pin the unused input pins should be processed appropriately as below. classification pin name setting ainl this pin should be open. analog ainr this pin should be open. ms0511-e-02 2008/01 - 3 -
[ak5358a] absolute maximum ratings (agnd=dgnd=0v; note 1 ) parameter symbol min max units power supplies: analog va ? 0.3 6.0 v digital vd ? 0.3 6.0 v |agnd ? dgnd| ( note 2 ) gnd - 0.3 v input current, any pin except supplies iin - 10 ma analog input voltage (ainl, ainr, cks1 pins) vina ? 0.3 va+0.3 v digital input voltage ( note 3 ) vind ? 0.3 vd+0.3 v ambient temperature (powered applied) ta ? 20 85 c storage temperature tstg ? 65 150 c note 1. all voltages with respect to ground. note 2. agnd and dgnd must be connected to the same analog ground plane. note 3. pdn, dif, mclk, sclk, lrck, cks0, cks2 pins warning: operation at or beyond these limits may result in permanent damage to the device. normal operation is not guaranteed at these extremes. recommended operating conditions (agnd=dgnd=0v; note 1 ) parameter symbol min typ max units power supplies analog va 4.5 5.0 5.5 v ( note 4 ) digital vd 2.7 5.0 va v note 4. the power up sequence between va and vd is not critical. warning: akemd assumes no responsibility for the usage beyond the conditions in this datasheet. ms0511-e-02 2008/01 - 4 -
[ak5358a] analog characteristics (ta=25 c; va=5.0v, vd=5.0v; agnd=dgnd=0v; fs=48khz, 96khz; sclk=64fs; signal frequency=1khz; 24bit data; measurement frequency=20hz 20khz at fs=48khz, 40hz 40khz at fs=96khz; unless otherwise specified) parameter min typ max units adc analog input characteristics: resolution 24 bits input voltage ( note 5 ) 2.7 3.0 3.3 vpp ? 1dbfs 82 92 db fs=48khz bw=20khz ? 60dbfs - 39 db s/(n+d) ? 1dbfs - 90 db fs=96khz bw=40khz ? 60dbfs - 38 db dr ( ? 60dbfs, a-weighted) 94 102 db s/n (a-weighted) 94 102 db fs=48khz 13 20 k input resistance fs=96khz 9 14 k interchannel isolation 90 110 db interchannel gain mismatch 0.1 0.5 db gain drift 100 - ppm/ c power supply rejection ( note 6 ) - 50 db power supplies power supply current normal operation (pdn pin = ?h?) ma 18 12 va ma 5 3 vd (fs=48khz) ( note 7 ) ma 9 6 vd (fs=96khz) ( note 8 ) power down mode (pdn pin = ?l?) ( note 9 ) a 100 10 va+vd note 5. this value is the full scale (0db) of the input voltage. input voltage is proportional to va voltage. vin = 0.6 x va (vpp). note 6. psr is applied to va and vd with 1khz, 50mvpp. note 7. vd=2ma@3v note 8. vd=4ma@3v note 9. all digital input pins and cks1 pin are held vd or dgnd. ms0511-e-02 2008/01 - 5 -
[ak5358a] filter characteristics (fs=48khz) (ta=-20 c 85 c; va=4.5 5.5v; vd=2.7 5.5v) parameter symbol min typ max units adc digital filter (decimation lpf): passband ( note 10 ) 0.1db pb 0 18.9 khz ? 0.2db - 20.0 - khz ? 3.0db - 23.0 - khz stopband sb 28 khz passband ripple pr 0.04 db stopband attenuation sa 68 db group delay distortion gd 0 s group delay ( note 11 ) gd 16 1/fs adc digital filter (hpf): frequency response ( note 10 ) ? 3db fr 1.0 hz ? 0.1db 6.5 hz filter characteristics (fs=96khz) (ta=-20 c 85 c; va=4.5 5.5v; vd=2.7 5.5v) parameter symbol min typ max units adc digital filter (decimation lpf): passband ( note 10 ) 0.1db pb 0 37.8 khz ? 0.2db - 40.0 - khz ? 3.0db - 46.0 - khz stopband sb 56 khz passband ripple pr 0.04 db stopband attenuation sa 68 db group delay distortion gd 0 s group delay ( note 11 ) gd 16 1/fs adc digital filter (hpf): frequency response ( note 10 ) ? 3db fr 2.0 hz ? 0.1db 13.0 hz note 10. the passband and stopband frequencies scale with fs. for example, pb=18.9khz@ 0.1db is 0.39375 fs. note 11. the calculated delay time induced by digital filtering. this time is fro m the input of an analog signal to the setting of 24bit data both channels to the adc output register for adc. ms0511-e-02 2008/01 - 6 -
[ak5358a] dc characteristics (cmos level mode) (ta=-20 c 85 c; va=4.5 5.5v; vd=2.7 5.5v) parameter symbol min typ max units high-level input voltage vih 70%vd - - v low-level input voltage vil - - 30%vd v high-level output voltage (iout= ? 1ma) voh vd? 0.5 - - v low-level output voltage (iout=1ma) vol - - 0.5 v input leakage current iin - - 10 a dc characteristics (ttl level mode) (ta=-20 c 85 c; va=4.5 5.5v; vd=4.5 5.5v) parameter symbol min typ max units high-level input voltage (cks2-0 pins) vih 70%vd - - v (all pins except cks2-0 pins) vih 2.2 - - v low-level input voltage (cks2-0 pins) vil - - 30%vd v (all pins except cks2-0 pins) vil - - 0.8 v high-level output voltage (iout= ? 1ma) voh vd? 0.5 - - v low-level output voltage (iout=1ma) vol - - 0.5 v input leakage current iin - - 10 a ms0511-e-02 2008/01 - 7 -
[ak5358a] switching characteristics (ta=-20 c 85 c; va=4.5 5.5v; vd=2.7 5.5v; c l =20pf) parameter symbol min typ max units master clock timing mhz 24.576 2.048 fclk 512fs, 256fs frequency ns 16 tclkl pulse width low ns 16 tclkh pulse width high mhz 36.864 3.072 fclk 768fs, 384fs frequency ns 10.5 tclkl pulse width low ns 10.5 tclkh pulse width high lrck frequency fs 8 96 khz duty cycle slave mode 45 55 % master mode 50 % audio interface timing slave mode ns 160 tsck sclk period ns 65 tsckl sclk pulse width low ns 65 tsckh pulse width high ns 30 tlrsh lrck edge to sclk ? ? ( note 12 ) ns 30 tshlr sclk ? ? to lrck edge ( note 12 ) lrck to sdto (msb) (except i 2 s mode) sclk ? ? to sdto tlrs tssd 35 35 ns ns master mode sclk frequency fsck 64fs hz sclk duty dsck 50 % sclk ? ? to lrck tmslr ? 20 20 ns sclk ? ? to sdto tssd ? 20 35 ns reset timing tpd pdn pulse width ( 150 ns note 13 ) tpdv 4132 1/fs pdn ? ? to sdto valid at slave mode ( note 14 ) tpdv 4129 1/fs pdn ? ? to sdto valid at master mode ( note 14 ) note 12. sclk rising edge must not occur at the same time as lrck edge. note 13. the ak5358a can be reset by bringing the pdn pin = ?l?. note 14. this cycle is the number of lrck rising edges from the pdn pin = ?h?. ms0511-e-02 2008/01 - 8 -
[ak5358a] timing diagram 1/fclk mclk tclkh tclkl vih vil 1/fs lrck vih vil tsck sclk tsckh tsckl vih vil clock timing lrck vih vil tshlr sclk vih vil tlrs sdto 50%vd tlrsh tssd audio interface timing (slave mode) ms0511-e-02 2008/01 - 9 -
[ak5358a] lrck sclk 50%vd sdto 50%vd tssd tmslr dsck 50%vd audio interface timing (master mode) tpd pdn vil pdn vih vil tpdv sdto 50%vd power down & reset timing ms0511-e-02 2008/01 - 10 -
[ak5358a] operation overview system clock mclk, sclk and lrck (fs) clocks are required in slave mode. the lrck clock input must be synchronized with mclk, however the phase is not critical. table 1 shows the relationship of typical sampling frequency and the system clock frequency. mclk frequency, sclk frequency and master/slave are selected by cks2-0 pins as shown in table 2 . all external clocks (mclk, sclk and lrck) must be present unless pdn pin = ?l?. if these clocks are not provided, the ak5358a may draw excess current due to its use of internal dynamically refreshed logic. if the external clocks are not present, place the ak5358a in power-down mode (pdn pin = ?l?) . in master mode, the mast er clock (mclk) must be provided unless pdn pin = ?l?. mclk fs 256fs 384fs 512fs 768fs 32khz 8.192mhz 12.288mhz 16.384mhz 24.576mhz 44.1khz 11.2896mhz 16.9344mhz 22.5792mhz 33.8688mhz 48khz 12.288mhz 18.432mhz 24.576mhz 36.864mhz 96khz 24.576mhz 36.864mhz n/a n/a table 1. system clock example mode cks2 cks1 cks0 input level master/slave mclk sclk 256/384fs (8k fs 96k) 48fs or 32fs 0 l l l cmos slave note 15 ) ( 512/768fs (8k fs 48k) 1 l l h reserved 2 l h l cmos master 64fs 256fs (8k fs 96k) 3 l h h cmos master 64fs 512fs (8k fs 48k) 256/385fs( 96khz) 48fs or 32fs 4 h l l ttl slave note 15 ) ( 512/768fs( 48khz) 5 h l h reserved 6 h h l cmos master 64fs 384fs (8k fs 96k) 7 h h h cmos master 64fs 768fs (8k fs 48k) table 2. operation mode select note 15. sdto outputs 16bit data at sclk=32fs. ms0511-e-02 2008/01 - 11 -
[ak5358a] audio interface format two kinds of data formats can be chosen with the dif pin ( table 3 ). in both modes, the serial data is in msb first, 2?s compliment format. the sdto is clocked out on the falling e dge of sclk. the audio inte rface supports both master and slave modes. in master mode, sclk and lrck are output with the sclk frequency fixed to 64fs and the lrck frequency fixed to 1fs. mode dif pin sdto lrck sclk figure 0 l 24bit, msb justified h/l figure 1 48fs or 32fs 1 h 24bit, i 2 s compatible l/h figure 2 48fs or 32fs table 3. audio interface format lrck bick(64fs) sdto(o) 0 23 22 1 2 4 0 20 21 24 31 0 12 23 22 0 10 23 2220 21 31 23:msb, 0:lsb lch data rch data 24 321 22 23 23 1234 figure 1. mode 0 timing lrck bick(64fs) sdto(o) 0 23 22 1 2 4 0 25 21 24 0 12 23 22 0 10 22 25 21 24 321 22 23 23 1234 3 23:msb, 0:lsb lch data rch data figure 2. mode 1 timing digital high pass filter the adc has a digital high pass filter for dc offset cancellation. the cut-off frequency of the hpf is 1.0hz (@fs=48khz) and scales with sampling rate (fs). ms0511-e-02 2008/01 - 12 -
[ak5358a] power down the ak5358a is placed in the power-down mode by bringing pdn pin ?l? and the digital filter is also reset at the same time. this reset should always be done after power-up. in the power-down mode, the vcom are agnd level. an analog initialization cycle starts after exiting the power-down mode. therefore, the output data sdto becomes available after 4129 cycles of lrck clock in master m ode or 4132 cycles of lrck clock in sl ave mode. during initialization, the adc digital data outputs of both channels are forced to a 2?s complement ?0?. the adc outputs settle in the data corresponding to the input signals after the end of initialization (settling appr oximately takes the group delay time). normal operation internal state pdn power-down initialize normal operation (1) idle noise gd gd ?0?data a /d in (analog) a /d ou t (digital) clock in mclk,lrck,sclk (2) (3) (4) ?0?data idle noise notes: (1) 4132/fs in slave mode and 4129/fs in master mode. (2) digital output corresponding to analog input has the group delay (gd). (3) a/d outputs ?0? data at the power-down state. (4) when the external clocks (mclk, sclk and lrck) are stopped, the ak5358a should be in the power-down state. figure 3. power-down/up sequence example system reset the ak5358a should be reset once by bringing pdn pin ?l? after power-up. in slave mode, the internal timing starts clocking by the rising edge (falling edge at mode 1) of lrck after exiting from reset and power down state by mclk. the ak5358a is power down state until lrck is input. in master mode, the internal timing starts when mclk is input. ms0511-e-02 2008/01 - 13 -
[ak5358a] system design figure 4 shows the system connection diagram. an evaluation board is available which demonstrates application circuits, the optimum layout, power supply arrangements and measurement results. ak5358a 8 7 6 3 2 1 9 10 11 12 13 14 15 16 ainl vcom agnd dgnd ainr sdto lrck mclk sclk pdn + 0.1u cks1 va vd analog 5v dif cks2 cks0 10u 10u 0.1u reset 5 4 audio controller mode control + 2.2u 10u 10u + + analog ground system ground lch in rch in digital 3.3v note: - agnd and dgnd of the ak5358a should be distributed separately from the ground of external digital devices (mpu, dsp etc.). - all digital input pins should not be left floating. - the cks1 pin should be connected to va or agnd. figure 4. typical connection diagram analog ground digital ground system controller a inr 1 a inl 2 cks1 3 vcom 4 a gnd 5 va 6 vd 7 dgnd 8 16 15 14 13 12 11 10 9 cks0 cks2 dif pdn sclk mclk lrck sdto a k5358a figure 5. ground layout note: - agnd and dgnd must be connected to the same analog ground plane. ms0511-e-02 2008/01 - 14 -
[ak5358a] 1. grounding and power supply decoupling the ak5358a requires careful attention to power supply a nd grounding arrangements. alternatively if va and vd are supplied separately, the power up sequence is not critical. agnd and dgnd of the ak5358a must be connected to analog ground plane. system analog ground and digital ground should be connected together near to where the supplies are brought onto the printed circuit board. decoupling capacitors should be as near to the ak5358a as possible, with the small value ceramic capac itor being the nearest. 2. voltage reference the voltage input to va sets the analog input range. vcom are 50%va and normally connected to agnd with a 0.1 f ceramic capacitor. a capacitor 2.2 f is attached to vcom pin. no load current may be drawn from these pins. all signals, especially clocks, should be kept away from the vcom pin in order to avoid unwanted coupling into the ak5358a. 3. analog inputs the adc inputs are single-ended and internally biased to the common voltage (50%va) with 20k (typ@fs=48khz) resistance. the input signal range scales with the supply vo ltage and nominally 0.6xva vpp (typ). the adc output data format is 2?s complement. the inte rnal hpf removes the dc offset. the ak5358a samples the analog inputs at 64fs (@fs=48khz). th e digital filter rejects noise above the stop band except for multiples of 64fs. the ak5358a incl udes an anti-aliasing filter (rc filter) to attenuate a noise around 64fs. ms0511-e-02 2008/01 - 15 -
[ak5358a] package 0-10 detail a seating plane 0.10 0.17 0.05 0.22 0.1 0.65 *5.0 0.1 1.05 0.05 a 1 8 9 16 16 p in tssop ( unit: mm ) *4.4 0.1 6.4 0.2 0.5 0.2 0.1 0.1 note: dimension "*" does not include mold flash. 0.13 m material & lead finish package molding compound: epoxy lead frame material: cu lead frame surface treatme nt: solder (pb free) plate ms0511-e-02 2008/01 - 16 -
[ak5358a] marking akm 5358aet xxyyy 1) pin #1 indication 2) date code: xxyyy (5 digits) xx: lot# yyy: date code 3) marketing code: 5358aet revision history date (yy/mm/dd) revision reason page contents 06/06/02 00 first edition 07/04/13 01 error correction 4 absolute maximum ratings power supplies: digital 4.6 6.0 08/01/23 02 description change 2 compatibility table was changed. ms0511-e-02 2008/01 - 17 -
[ak5358a] important notice z these products and their specifications are subject to change without notice. when you consider any use or application of these produc ts, please make inquiries the sales office of asahi kasei emd corporation (akemd) or authorized distributors as to current status of the products. z akemd assumes no liability for infringement of any patent, intellectual property, or other rights in the application or use of any information contained herein. z any export of these products, or devices or systems containi ng them, may require an export license or other official approval under the law and regulations of the country of e xport pertaining to customs and tariffs, currency exchange, or strategic materials. z akemd products are neither intended nor au thorized for use as critical components note1) in any safety, life support, or other hazard related device or system note2) , and akemd assumes no responsibility for such use, except for the use approved with the express written consent by representative director of akemd. as used here: note1) a critical component is one whose failure to func tion or perform may reasonably be expected to result, whether directly or indirectly, in the loss of the safety or effectiveness of the device or system containing it, and which must therefore meet very high standards of performance and reliability. note2) a hazard related device or system is one designed or intended for life support or maintenance of safety or for applications in medicine, aerospace, nuclear energy, or other fi elds, in which its failure to function or perform may reasonably be expected to result in loss of life or in significant injury or damage to person or property. z it is the responsibility of the buyer or distributor of akemd pr oducts, who distributes, dis poses of, or otherwise places the product with a third party, to notify such third party in advance of the above cont ent and conditions, and the buyer or distributor agrees to assume any and all re sponsibility and liability for and hold akemd harmless from any and all claims arising from the use of said product in the absence of such notification. ms0511-e-02 2008/01 - 18 -

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