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data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 1 general description the aur9719 is a high efficiency step-down dc-dc voltage converter. the chip operation is optimized by peak-current mode architecture with built-in synchronous power mos switchers. the oscillator and timing capacitors are all built-in providing an internal switching frequency of 1.5mhz that allows the use of small surface mount inductors and capacitors for portable product implementations. integrated soft start (ss), under voltage lock out (uvlo), thermal shutdown detection (tsd) and short circuit protection are designed to provide reliable product applications. the device is available in adjustable output voltage versions ranging from 0.8v to 9v in when input voltage range is from 2.7v to 5.5v , and is able to deliver up to 2.0a. the aur9719 is available in dfn-33-6 package. features ? high efficiency buck power converter ? output current: 2a ? low r ds(on) internal switch: 100m ? ? adjustable output voltage from 0.8v to 9v in ? wide operating voltage range: 2.7v to 5.5v ? built-in power switches for synchronous rectification with high efficiency ? 800mv feedback voltage ? 1.5mhz constant frequency operation ? thermal shutdown protection ? low drop-out operation at 90% duty cycle ? no schottky diode required applications ? lcd tv ? set top box ? post dc-dc voltage regulation ? pda and notebook computers figure 1. package type of aur9719 dfn-33-6
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 2 pin configuration d package (dfn-33-6) 1 6 5 4 3 2 exposed pad pin 1 mark figure 2. pin configuration of aur9719 (top view) pin description pin number pin name i/o function 1 fb input output voltage feedback pin 2 gnd ground ground pin 3 sw output switch output pin 4 vin_sw input power supply input for the mosfet switch 5 vin_a input supply input for the analog circuit 6 en input enable pin. active high
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 3 functional block diagram over current comparator bias generator saw-tooth generator oscillator soft start bandgap reference current sensing control logic buffer & dead time control logic + reverse inductor current comparator over voltage comparator modulator error amplifier - + - + - + - + gnd en fb sw 6 vin_sw 4 3 2 1 vin_a 5 figure 3. functional block diagram of aur9719 ordering information aur9719 a circuit type a: adjustable output 5 package temperature range part number marking id packing type dfn-33-6 -40 to 80c AUR9719AGD 9719a tape & reel bcd semiconductor's pb-free products, as designated with "g" in the part number, are rohs compliant and green. package d: dfn-33-6 g: green
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 4 absolute maximum ratings (note 1) parameter symbol value unit supply input voltage (vin_sw) v in_sw 0 to 6.0 v supply input voltage (vin_a) v in_a 0 to 6.0 v voltage from vin_sw to vin_a pin v in(sw_a) -0.3 to 0.3 v sw pin switch voltage v sw -0.3 to v in_sw +0.3 v sw pin switch current i sw 3.2 a enable voltage v en -0.3 to v in_a +0.3 v power dissipation (on pcb, t a =25c) p d 2.49 w thermal resistance (junction to ambient, simulation) ja 40.11 c/w operating junction temperature t j 150 c operating temperature t op -40 to 85 c storage temperature t stg -55 to 150 c esd (human body model) v hbm 2000 v esd (machine model) v mm 200 v note 1: stresses greater than those listed under ?absolute maximum ratings? may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under ?recommended operating co nditions? is not implied. exposure to ?absolute maximum ratings? for extended periods may affect device reliability. recommended operating conditions parameter symbol min max unit supply input voltage v in 2.7 5.5 v junction temperature range t j -20 125 c ambient temperature range t a -40 80 c
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 5 electrical characteristics v in_sw =v in_a =v en =5v, v out =1.2v, v fb =0.8v, l=3.3h, c in =4.7f, c out =22f, t a =25c, unless otherwise specified. parameter symbol test condition min typ max unit input voltage range v in v in =v in_sw =v in_a 2.7 5.5 v shutdown current i off v en =0v 4 a active current i on v fb =0.95v 460 a regulated feedback voltage v fb for adjustable output voltage 0.784 0.8 0.816 v regulated output voltage accuracy ? v out /v out v in =2.7v to 5.5v, i out =10ma to 2a -3 3 % peak inductor current i pk 2.2 3.2 a oscillator frequency f osc 1.2 1.5 1.8 mhz pmosfet r on r on(p) i sw =0.75a 100 m ? nmosfet r on r on(n) i sw =0.75a 100 m ? en input high threshold voltage v en_h 1.5 v en input low threshold voltage v en_l 0.4 v en input current i en 2 a soft-start time t ss 450 s maximum duty cycle d max 90 % rising 2.4 falling 2.3 under voltage lock out threshold v uvlo hysteresis 0.1 v thermal shutdown t sd hysteresis=30c 150 c
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 6 typical performance characteristics figure 4. efficiency vs. output current (v out =1.0v) figure 5. efficiency vs. output current (v out =1.2v) figure 6. efficiency vs. output current (v out =1.8v) figure 7. efficiency vs. output current (v out =2.5v) 0.0 0.5 1.0 1.5 2.0 0 10 20 30 40 50 60 70 80 90 100 v in =3.3v v in =4.2v v in =5.0v v in =5.5v v out =1.0v efficiency (%) output current ( a ) 0.0 0.5 1.0 1.5 2.0 0 10 20 30 40 50 60 70 80 90 100 v in =3.3v v in =4.2v v in =5.0v v in =5.5v v out =1.2v efficiency (%) output current ( a ) 0.0 0.5 1.0 1.5 2.0 0 10 20 30 40 50 60 70 80 90 100 v in =3.3v v in =4.2v v in =5.0v v in =5.5v v out =1.8v efficiency (%) output current ( a ) 0.0 0.5 1.0 1.5 2.0 0 10 20 30 40 50 60 70 80 90 100 v in =3.3v v in =4.2v v in =5.0v v in =5.5v v out =2.5v efficiency (%) output current ( a )
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 7 typical performance characteristics (continued) figure 8. efficiency vs. output current (v out =3.3v) figure 9. load regulation (v out =1.00.03v) figure 10. load regulation (v out =1.20.03v) figure 11. load regulation (v out =1.80.03v) 0.0 0.5 1.0 1.5 2.0 0 10 20 30 40 50 60 70 80 90 100 v in =4.2v v in =5.0v v in =5.5v v out =3.3v efficiency (%) output current ( a ) 0.0 0.5 1.0 1.5 2.0 0.97 0.98 0.99 1.00 1.01 1.02 1.03 v in =3.3v v in =4.2v v in =5.0v v in =5.5v v out =1.0 + 0.03v output voltage (v) output current ( a ) 0.0 0.5 1.0 1.5 2.0 1.16 1.17 1.18 1.19 1.20 1.21 1.22 1.23 1.24 v in =3.3v v in =4.2v v in =5.0v v in =5.5v v out =1.2 + 0.03v output voltage (v) output current ( a ) 0.0 0.5 1.0 1.5 2.0 1.75 1.76 1.77 1.78 1.79 1.80 1.81 1.82 1.83 1.84 1.85 v in =3.3v v in =4.2v v in =5.0v v in =5.5v v out =1.8 + 0.03v output voltage (v) output current ( a )
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 8 typical performance characteristics (continued) figure 12. load regulation (v out =2.50.03v) figure 13. load regulation (v out =3.30.03v) figure 14. line regulation (v out =1.00.03v) figure 15. line regulation (v out =1.20.03v) 0.0 0.5 1.0 1.5 2.0 3.20 3.22 3.24 3.26 3.28 3.30 3.32 3.34 3.36 3.38 3.40 v in =4.2v v in =5.0v v in =5.5v v out =3.3 + 0.03v output voltage (v) output current ( a ) 3.0 3.5 4.0 4.5 5.0 5.5 0.97 0.98 0.99 1.00 1.01 1.02 1.03 i out =0a i out =2a v out =1.0 + 0.03v t a =25 o c output voltage (v) input voltage ( v ) 3.0 3.5 4.0 4.5 5.0 5.5 1.16 1.17 1.18 1.19 1.20 1.21 1.22 1.23 1.24 i out = 0a i out = 2a v out =1.2 + 0.03v t a = 25 o c output voltage (v) input voltage ( v ) 0.0 0.5 1.0 1.5 2.0 2.44 2.46 2.48 2.50 2.52 2.54 2.56 v in =3.3v v in =4.2v v in =5.0v v in =5.5v v out =2.5 + 0.03v output voltage (v) output current ( a )
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 9 typical performance characteristics (continued) figure 16. line regulation (v out =1.80.03v) figure 17. line regulation (v out =2.50.03v) figure 18. line regulation (v out =3.30.03v) figure 19 .en threshold voltage vs. input voltage 3.0 3.5 4.0 4.5 5.0 5.5 1.75 1.76 1.77 1.78 1.79 1.80 1.81 1.82 1.83 1.84 1.85 i out =0a i out =2a v out =1.8 + 0.03v t a = 25 o c output voltage (v) input voltage ( v ) 3.5 4.0 4.5 5.0 5.5 2.44 2.46 2.48 2.50 2.52 2.54 2.56 i out =0a i out =2a v out =2.5 + 0.03v t a = 25 o c output voltage (v) input voltage ( v ) 4.0 4.5 5.0 5.5 3.20 3.22 3.24 3.26 3.28 3.30 3.32 3.34 3.36 3.38 3.40 i out = 0a i out = 2a v out =3.3 + 0.03v t a = 25 o c output voltage (v) input voltage ( v ) 3.0 3.5 4.0 4.5 5.0 5.5 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00 1.05 1.10 low level high level en threshold voltage ( v ) input voltage ( v ) v out =1.2v i out =500ma t a =25 o c
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 10 typical performance characteristics (continued) figure 20.frequency vs. input voltage figure 21.temper ature vs. output current figure 22. start up through en figure 23. shut down through en ( v in =5v, v en =0v to 5v, v out =3.3v, i out =2.0a ) ( v in =5v, v en =5v to 0v, v out =3.3v, i out =2.0a) 3.0 3.5 4.0 4.5 5.0 5.5 1.2 1.3 1.4 1.5 1.6 1.7 1.8 v out =1.2v i out =1a t a =25 o c frequency (mhz) input voltage ( v ) 0.0 0.5 1.0 1.5 2.0 25 30 35 40 45 50 v in =5.0v v out =3.3v v out =1.0v temperature ( o c ) output current ( a )
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 11 typical performance characteristics (continued) figure 24. output ripple voltage figure 25. output ripple voltage (v in =5.0v, v out =1.0v, i out =1.0a) (v in =5.0v, v out =1.0v, i out =2.0a) figure 26. output ripple voltage figure 27. output ripple voltage (v in =5.0v, v out =3.3v, i out =1.0a) ( v in =5.0v, v out =3.3v, i out =2.0a)
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 12 typical performance characteristics (continued) figure 28. load transition figure 29. load transition (v in =5.0v, v out =1.0v, i out =0.1 to 1a) (v in =5.0v, v out =1.0v, i out =0.1 to 2a) figure 30. load transition figure 31. load transition (v in =5.0v, v out =3.3v, i out =0.1a to 1.0a) (v in =5.0v, v out =3.3v, i out =0.1a to 2.0a)
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 13 typical performance characteristics (continued) figure 32. short circuit protection figure 33. short circuit recovery (v in =5v, v out =3.3v, i out =2.0a) (v in =5v, v out =3.3v, i out =2.0a)
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 14 fb gnd vout r1 r2 aur9719 application information the basic aur9719 application circuit is shown in figure 36, external components selection is determined by the load current and is critical with the selection of inductor and capacitor values. 1. inductor selection for most applications, the value of inductor is chosen based on the required ripple current with the range of 1 h to 6.8 h. the largest ripple current occurs at the highest input voltage. having a small ripple current reduces the esr loss in the output capacitor and improves the efficiency. the highest efficiency is realized at low operating frequency with small ripple current. however, larger value inductors will be required. a reasonable starting point for ripple current setting is i l =40%i max ? . for a maximum ripple current stays below a specified value, the inductor should be chosen according to the following equation: the dc current rating of the inductor should be at least equal to the maximum output current plus half the highest ripple current to prevent inductor core saturation. for better efficiency, a lower dc-resistance inductor should be selected. 2. capacitor selection the input capacitance, c in , is needed to filter the trapezoidal current at the source of the top mosfet. to prevent large ripple voltage, a low esr input capacitor sized for the maximum rms current must be used. the maximum rm s capacitor current is given by: it indicates a maximum value at v in =2v out , where i rms =i out /2. this simple wors e-case condition is commonly used for design because even significant deviations do not much relieve. the selection of c out is determined by the effective series resistance (esr) that is required to minimize output voltage ripple and load step transients, as well as the amount of bulk capacitor that is necessary to ensure that the control loop is stable. loop stability can be also checked by viewing the load step transient response as described in the following section. the output ripple, v out , is determined by: the output ripple is the highest at the maximum input voltage since i l increases with input voltage. 3. load transient a switching regulator typically takes several cycles to respond to the load curren t step. when a load step occurs, v out immediately shifts by an amount equal to i load esr, where esr is the effective series resistance of output capacitor. i load also begins to charge or discharge c out generating a feedback error signal used by the regulator to return v out to its steady-state value. during the recovery time, v out can be monitored for overshoot or ringing that would indicate a stability problem. 4. output voltage setting the output voltage of aur9719 can be adjusted by a resistive divider according to the following formula: the resistive divider senses the fraction of the output voltage as shown in figure 34. figure 34. setting the output voltage in out in out omax rms v v v v i i 2 1 )] ( [ ? = ) 1 ( 1 in out out l v v v l f i ? = ? ] ) ( 1 ][ ) ( [ max v v max i f v l in out l out ? ? = ] 8 1 [ out l out c f esr i v + ? ? ) 1 ( 8 . 0 ) 1 ( 2 1 2 1 r r v r r v v ref out + = + =
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 15 application information (continued) 5. short-circuit protection when aur9719 output node is shorted to gnd, as v fb drop under 0.4v, chip will enter soft-start to protect itself, when short circuit is removed, and v fb rise over 0.4v, aur9719 enter normal operation again. if aur9719 reach ocp threshold while short circuit, aur9719 will enter soft-start cycle until the current under ocp threshold. 6. efficiency considerations the efficiency of switching regulator is equal to the output power divided by the input power times 100%. it is usually useful to analyze the individual losses to determine what is limiting efficiency and which change could produce the largest improvement. efficiency can be expressed as: efficiency=100%-l1-l2-?.. where l1, l2, etc. are the individual losses as a percentage of input power. although all dissipative elements in the regulator produce losses, two major sources usually account for most of the power losses: v in quiescent current and i 2 r losses. the v in quiescent current loss dominates the efficiency loss at very light load currents and the i 2 r loss dominates the efficiency loss at medium to heavy load currents. 6.1 the v in quiescent current loss comprises two parts: the dc bias current as given in the electrical characteristics and the internal mosfet switch gate charge currents. the gate charge current results from switching the gate capacitance of the internal power mosfet switches. each cycle the gate is switched from high to low, then to high again, and the packet of charge, dq moves from v in to ground. the resulting dq/dt is the current out of v in that is typically larger than the internal dc bias current. in continuous mode, where q p and q n are the gate charge of power pmosfet and nmosfet switches. both the dc bias current and gate charge losses are proportional to the v in and this effect will be more serious at higher input voltages. 6.2 ? i 2 r losses are calculated from internal switch resistance, r sw and external inductor resistance r l . in continuous mode, the average output current flowing through the inductor is chopped between power pmosfet switch and nmosfet switch. then, the series resistance looking into the lx pin is a function of both pmosfet r ds(on) and nmosfet r ds(on) resistance and the duty cycle (d): therefore, to obtain the i 2 r ? losses, simply add r sw to r l and multiply the result by the square of the average output current. other losses including c in and c out esr dissipative losses and inductor core losses generally account for less than 2 % of total additional loss. 7. thermal characteristics in most applications, the part does not dissipate much heat due to its high efficiency. however, in some conditions when the part is operating in high ambient temperature with high r ds(on) resistance and high duty cycles, such as in ldo mode, the heat dissipated may exceed the maximum junction temperature. to avoid the part from exceeding maximum junction temperature, the user should do some thermal analysis. the maximum power dissipation depends on the layout of pcb, the thermal resistance of ic package, the rate of surrounding airflow and the temperature difference between junction and ambient. 8. pcb layout considerations when laying out the printed circuit board, the following checklist should be used to optimize the performance of aur9719. 1) the power traces, including the gnd trace, the lx trace and the vin trace should be kept direct, short and wide. 2) put the input capacitor as close as possible to the vin and gnd pins. 3) the fb pin should be connected directly to the feedback resistor divider. 4) keep the switching node, lx, away from the sensitive fb pin and the node should be kept small area. ) ( n p gate q q f i + = () () ) ( d r d r r n on ds p on ds sw ? + = 1
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 16 application information (continued) figure 35. layout example of aur9719
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 17 typical application aur9719 note 2: ) 1 ( 2 1 r r v v ref out + = . figure 36. typical application circuit of aur9719 table 1. component guide v out (v) r1 (k ? ) r2 (k ? )l1 ( h) 3.3 31.25 10 3.3 2.5 21.5 10 3.3 1.8 12.5 10 3.3 1.2 5 10 3.3 1.0 3 10 3.3
data sheet 1.5mhz, 2a, step down dc-dc co nverter aur9719 nov. 2011 rev. 1. 0 bcd semiconductor manufacturing limited 18 mechanical dimensions dfn-33-6 unit:mm(inch)
important notice bcd semiconductor manufacturing limited reserves the right to make changes without further not ice to any products or specifi- cations herein. bcd semiconductor manufacturing limited does not as sume any responsibility for us e of any its products for any particular purpose, nor does bcd semiconductor manufacturi ng limited assume any liability aris ing out of the application or use of any its products or circui ts. bcd semiconductor manufacturing limited does not convey any license under its patent rights or other rights nor the rights of others. - wafer fab shanghai sim-bcd semiconductor manufacturing co., ltd. 800 yi shan road, shanghai 200233, china tel: +86-21-6485 1491, fax: +86-21-5450 0008 main site regional sales office shenzhen office shanghai sim-bcd semiconductor manuf acturing co., ltd., shenzhen office unit a room 1203, skyworth bldg., gaoxin ave.1.s., nanshan district, shenzhen, china tel: +86-755-8826 7951 fax: +86-755-8826 7865 taiwan office bcd semiconductor (taiwan) company limited 4f, 298-1, rui guang road, nei-hu district, taipei, taiwan tel: +886-2-2656 2808 fax: +886-2-2656 2806 usa office bcd semiconductor corp. 30920 huntwood ave. hayward, ca 94544, usa tel : +1-510-324-2988 fax: +1-510-324-2788 - headquarters bcd semiconductor manufacturing limited no. 1600, zi xing road, shanghai zizhu sc ience-based industrial park, 200241, china tel: +86-21-24162266, fax: +86-21-24162277 bcd semiconductor manufacturing limited important notice bcd semiconductor manufacturing limited reserves the right to make changes without further not ice to any products or specifi- cations herein. bcd semiconductor manufacturing limited does not as sume any responsibility for us e of any its products for any particular purpose, nor does bcd semiconductor manufacturi ng limited assume any liability aris ing out of the application or use of any its products or circui ts. bcd semiconductor manufacturing limited does not convey any license under its patent rights or other rights nor the rights of others. - wafer fab shanghai sim-bcd semiconductor manufacturing limited 800, yi shan road, shanghai 200233, china tel: +86-21-6485 1491, fax: +86-21-5450 0008 bcd semiconductor manufacturing limited main site regional sales office shenzhen office shanghai sim-bcd semiconductor manuf acturing co., ltd. shenzhen office advanced analog circuits (shanghai) corporation shenzhen office room e, 5f, noble center, no.1006, 3rd fuzhong road, futian district, shenzhen 518026, china tel: +86-755-8826 7951 fax: +86-755-8826 7865 taiwan office bcd semiconductor (taiwan) company limited 4f, 298-1, rui guang road, nei-hu district, taipei, taiwan tel: +886-2-2656 2808 fax: +886-2-2656 2806 usa office bcd semiconductor corporation 30920 huntwood ave. hayward, ca 94544, u.s.a tel : +1-510-324-2988 fax: +1-510-324-2788 - ic design group advanced analog circuits (shanghai) corporation 8f, zone b, 900, yi shan road, shanghai 200233, china tel: +86-21-6495 9539, fax: +86-21-6485 9673 bcd semiconductor manufacturing limited http://www.bcdsemi.com bcd semiconductor manufacturing limited

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