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mos integrated circuit pd3737 5150 pixels ccd linear image sensor data sheet document no. s13158ej3v0ds00 (3rd edition) date published september 2003 ns cp (k) printed in japan the mark shows major revised points. the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. 1994 description the pd3737 is a 5150-pixel high sensitivity ccd (charge coup led device) linear image sensor which changes optical images to electrical signal. the pd3737 has high speed ccd register, so it is suitable for high resolution scanners and facsimiles which scan high definition document at high speed. features ? valid photocell : 5150 pixels ? photocell pitch : 7 m ? high response sensitivity ? peak response wavelength : 550 nm (green) ? resolution : 16 dot/mm a3 (297 420 mm) size (shorter side) 24 dot/mm a4 (210 297 mm) size (shorter side) ? high speed scan : 252 s/line ? drive clock level : cmos output under +5 v operation ? data rate : 20 mhz max. ? power supply : +12 v ordering information part number package pd3737cy ccd linear image sensor 32-pin plastic dip (10.16 mm (400))
data sheet s13158ej3v0ds 2 pd3737 block diagram 4 32 28 5 10 23 24 optical black 18 pixels, invalid photocell 2 pixels, valid photocell 5150 pixels, invalid photocell 2 pixels v od v out r agnd 9 22 2 agnd 1 1l tg 2 2l
data sheet s13158ej3v0ds 3 pd3737 pin configuration (top view) ccd linear image sensor 32-pin plastic dip (10.16 mm (400)) ? pd3737cy 1 2 3 4 5 6 7 8 9 10 11 output signal no connection transfer gate clock shift register clock 1 no connection no connection no connection internal connection no connection no connection reset gate clock no connection analog ground no connection internal connection internal connection internal connection no connection internal connection 5150 1 internal connection no connection no connection internal connection no connection output drain voltage no connection no connection last stage shift register clock 2 shift register clock 2 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 last stage shift register clock 1 internal connection analog ground nc nc nc nc v out nc nc ic 1l tg nc nc agnd agnd v od ic ic ic ic nc ic r 1 nc nc nc nc nc ic ic 2l 2 cautions 1. leave pins 6, 7, 12, 13, 20, 21, 26, 27 (ic) unconnected. 2. connect the no connection pins (nc) to gnd.
data sheet s13158ej3v0ds 4 pd3737 photocell structure diagram 8m m 2 m 5 channel stopper aluminum shield
data sheet s13158ej3v0ds 5 pd3737 absolute maximum ratings (t a = + 25 c) parameter symbol ratings unit output drain voltage v od ? 0.3 to + 15 v shift register clock voltage v 1 , v 2 ? 0.3 to + 8 v last stage shift regist er clock voltage v 1l , v 2l ? 0.3 to + 8 v reset signal voltage v r ? 0.3 to + 8 v transfer gate clock voltage v tg ? 0.3 to + 8 v operating ambient temperature note t a 0 to + 60 c storage temperature t stg ? 40 to + 70 c note use at the condition without dew condensation. caution product quality may suffer if the absolute m aximum rating is exceeded even momentarily for any parameter. that is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefor e the product must be used under conditions that ensure that the absolute maxi mum ratings are not exceeded. recommended operating conditions (t a = + 25 c) parameter symbol min. typ. max. unit output drain voltage v od 11.4 12.0 12.6 v shift register clock high level v 1_h , v 2_h 4.5 5.0 5.5 v shift register clock low level v 1_l , v 2_l ? 0.3 0 + 0.5 v last stage shift register clock high level v 1lh , v 2lh 4.5 5.0 5.5 v last stage shift register clock low level v 1ll , v 2ll ? 0.3 0 + 0.5 v reset signal r high level v rh 4.5 5.0 5.5 v reset signal r low level v rl ? 0.3 0 + 0.5 v transfer gate clock high level v tgh 4.5 v 1_h note v 1_h note v transfer gate clock low level v tgl ? 0.3 0 + 0.5 v shift register clock amplitude v 1_pp , v 2_pp 4.5 5.0 5.8 v last stage shift register clock amplitude v 1l_pp , v 2l_pp 4.5 5.0 5.8 v reset signal amplitude v r_pp 4.5 5.0 5.8 v transfer gate clock amplitude v tg_pp 4.5 5.0 5.8 v data rate f r 0.5 1 20 mhz note when transfer gate clock high level (v tgh ) is higher than shift register clock high level (v 1_h ), image lag can increase. remarks 1. input reset signal r to pin 32 via capacitor (1000 pf 20%, non polarity). concerning the connection method refer to application circuit example . 2. operating conditions of reset signal r is not the condition at device pins but the conditions of the signal which applied to capacitor.
data sheet s13158ej3v0ds 6 pd3737 electrical characteristics t a = + 25 c, v od = 12 v, f 1 = 0.5 mhz, data rate = 1 mhz, storage time = 10 ms, input signal clock = 5 v p-p , light source : 3200 k halogen lamp + c500 (infrared cut filter, t = 1 mm) parameter symbol test conditions min. typ. max. unit saturation voltage v sat 1.0 1.5 ? v saturation exposure se daylight color fluorescent lamp ? 0.2 ? lx?s photo response non-uniformity prnu v out = 500 mv ? 5 10 % average dark signal ads light shielding ? 2.0 6.0 mv dark signal non-uniformit y dsnu light shielding ? 6.0 12.0 mv power consumption p w ? 100 200 mw output impedance z o ? 0.2 0.5 k ? response r f daylight color fluorescent lamp 6.0 7.5 9.0 v/lxs response peak ? 550 ? nm image lag il v out = 1.0 v ? 0.3 1.0 % offset level note 1 v os 2.0 3.0 5.0 v output fall delay time note 2 t d time from 90% to 10% of 2l fall is 5 ns 21 23 25 ns register imbalance ri v out = 500 mv ? 0 4.0 % total transfer efficiency tte v out = 500 mv, 92 98 ? % data rate (f r1 ) = 20 mhz dynamic range dr1 v sat /dsnu ? 250 ? times reset feed-through noise note 1 rftn light shielding ? 250 500 mv notes 1. refer to timing chart 2 . 2. t d is defined as a time from 10% of 2l to 10% of v out , output after passing through two steps of emitter follower in the application circuit example . input pin capacitance (t a = + 25 c, v od = 12 v) parameter symbol pin name pin no. min. typ. max. unit shift register clock pin capacitance 1 c 1 1 24 440 550 660 pf shift register clock pin capacitance 2 c 2 2 10 440 550 660 pf last stage shift register cl ock pin capacitance 1 c 1l 1l 22 40 50 60 pf last stage shift register cl ock pin capacitance 2 c 2l 2l 9 40 50 60 pf reset gate clock pin capacitance c r r 32 8 10 12 pf transfer gate clock pin capacitance c tg tg 23 120 150 180 pf remark c 1 and c 2 show the equivalent capacity of the real drive including the capacity of between 1 and 2.
data sheet s13158ej3v0ds 7 pd3737 timing chart 1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 5181 5182 5183 5184 5185 5186 1l 2l tg 1 2 r v out optical black (18 pixels) valid photocell (5150 pixels) invalid photocell (2 pixels) invalid photocell (2 pixels) caution input the r pulse continuously during the high level period of tg.
data sheet s13158ej3v0ds 8 pd3737 timing chart 2 90% t1 t5 t6 t4 t3 t d t2 t1? t2? 90% 10% 10% 1 1l 2 2l r v out 90% 90% 10% 10% 10% 90% 10% t4 t d 10% rftn v os symbol min. typ. max. unit t1, t2 0 50 (150) ns t1?, t2? 0 5 (25) ns t3 15 50 (500) ns t4 2 20 (500) ns t5, t6 0 20 (50) ns remark the max. in the table above shows the operation r ange in which the output c haracteristics are kept almost enough for general purpose.
data sheet s13158ej3v0ds 9 pd3737 tg, 1, 2 timing chart 90% t7 t8 t9 t10 t11 10% 1 2 tg 90% symbol min. typ. max. unit t7, t8 0 50 (100) ns t9 500 1000 10000 ns t10, t11 0 100 10000 ns remark the max. in the table above shows the operation r ange in which the output c haracteristics are kept almost enough for general purpose. 1, 2 cross points 1 2 2.0 v or more 2.0 v or more 1l, 2 cross points 2 1l 2.0 v or more 0.5 v or more 1, 2l cross points 1 2l 2.0 v or more 0.5 v or more remark adjust cross points ( 1, 2), ( 1l, 2) and ( 1, 2l) with input resistance of each pin.
data sheet s13158ej3v0ds 10 pd3737 definitions of characteristic items 1. saturation voltage : v sat output signal voltage at whic h the response linearity is lost. 2. saturation exposure : se product of intensity of illumination (lx) and storag e time (s) when saturation of output voltage occurs. 3. photo response non-uniformity : prnu the peak/bottom ratio to the average output voltage of all the valid pixels calculated by the following formula. prnu (%) = v max. or v min. n : number of valid pixcels v j : output voltage of each pixel j = 1 n n 1 v j 100 ? 1 v min. v max. register dark dc level j = 1 n n 1 v j 4. average dark signal : ads average output signal voltage of all the valid pixels at light shielding. this is calculated by the following formula. ads (mv) = d j : dark signal of valid pixel number j 5150 j = 1 5150 d j 5. dark signal non-uniformity : dsnu the difference between ads and voltage of the highest or lowest output pixel of all the valid pixels at light shielding. ads dsnu max. dsnu min. register dark dc level v out
data sheet s13158ej3v0ds 11 pd3737 6. output impedance : z o impedance of the output pins viewed from outside. 7. response : r output voltage divided by exposure (lxs). note that the response varies with a light source (spectral characteristic). 8. image lag : il the rate between the last output voltage and the next one after read out the data of a line. v out tg light v out on off v 1 il (%) = v 1 v out 100 9. register imbalance: ri the rate of the difference between the averages of t he output voltage of odd and even pixels, against the average output voltage of all the valid pixels. ri (%) = 2 n j = 1 j = 1 n 2 (v 2j ?1 ? v 2j ) 1 n n v j 100 n v j : number of valid pixels : output voltage of each pixel
data sheet s13158ej3v0ds 12 pd3737 standard characteristic curves (reference value) dark output temperature characteristic storage time output voltage characteristic (t a = +25 c) operating ambient temperature t a ( c) storage time (ms) 8 4 2 1 0.5 0.25 0.1 10 0 20304050 relative output voltage relative output voltage 2 1 0.2 0.1 1510 total spectral response characteristics (without infrared cut filter) (t a = +25 c) 1200 600 400 1000 800 0 20 40 60 80 100 wavelength (nm) response ratio (%)
data sheet s13158ej3v0ds 13 pd3737 application circuit example pd3737 +12 v 47 f/25 v 0.1 f 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 2 ? 10 ? 10 ? 10 ? 2 ? 51 ? 51 ? 47 ? 1 k ? 4.7 k ? 1000 pf 2sa1206 2sc1842 nc nc nc nc v out nc nc ic 1l tg nc nc agnd agnd v od ic ic ic ic nc ic r 1 nc nc nc 1 v out nc nc ic ic 47 f/25 v 2l 2 2l 2 1l tg r cautions 1. leave pins 6, 7, 12, 13, 20, 21, 26, 27 (ic) unconnected. 2. connect the no connection pins (nc) to gnd. remark the inverters shown in the above applic ation circuit example are the 74ac04.
data sheet s13158ej3v0ds 14 pd3737 package drawing 55.2 0.5 54.8 0.5 12.6 0.5 9.05 0.3 9.25 0.3 4.1 0.5 1st valid pixel 4.9 0.3 1 4 4 32 17 16 1 2.0 46.7 2.54 0.25 0.46 0.1 1.02 0.15 (5.42) 4.21 0.5 4.55 0.5 (2.0) 2.45 0.3 0.25 0.05 10.16 0.20 2 3 5 10.16 + 0.70 ? 0.20 name dimensions refractive index plastic cap 52.2 6.4 0.8 (0.7 ) 1.5 1 1st valid pixel the center of the pin1 2 the surface of the ccd chip the top of the cap 3 the bottom of the package the surface of the ccd chip 4 mirror finishied surface 5 thickness of mirror finished surface 32c-1ccd-pkg9-1 (unit : mm) ccd linear image sensor 32-pin plastic dip (10.16 mm (400) ) pd3737cy
data sheet s13158ej3v0ds 15 pd3737 recommended soldering conditions when soldering this product, it is highly recommended to observe the conditions as shown below. if other soldering processes are used, or if the soldering is performed under different conditions, please make sure to consult with our sales offices. type of through-hole device pd3737cy : ccd linear image sensor 32-pin plastic dip (10.16 mm (400)) process conditions partial heating method pin temperature : 350 c or below, heat time : 3 seconds or less (per pin) cautions 1. during assembly care shoul d be taken to prevent solder or flux from contacting the glass cap. the optical characteristics coul d be degraded by such contact. 2. soldering by the solder flow method may have deleterious effects on prevention of glass cap soiling and heat resistance. so the method cannot be guaranteed.
data sheet s13158ej3v0ds 16 pd3737 notes on handling the packages cleaning the plastic cap dust and dirt protecting mounting of the package operate and storage environments ethyl alcohol methyl alcohol isopropyl alcohol n-methyl pyrrolidone etoh meoh ipa nmp the optical characteristics of the ccd will be degraded if the cap is scratched during cleaning. don?t either touch plastic cap surface by hand or have any object come in contact with plastic cap surface. should dirt stick to a plastic cap surface, blow it off with an air blower. for dirt stuck through electricity ionized air is recommended. and if the plastic cap surface is grease stained, clean with our recommended solvents. care should be taken when cleaning the surface to prevent scratches. we recommend cleaning the cap with a soft cloth moistened with one of the recommended solvents below. excessive pressure should not be applied to the cap during cleaning. if the cap requires multiple cleanings it is recommended that a clean surface or cloth be used. the following are the recommended solvents for cleaning the ccd plastic cap. use of solvents other than these could result in optical or physical degradation in the plastic cap. please consult your sales office when considering an alternative solvent. the application of an excessive load to the package may cause the package to warp or break, or cause chips to come off internally. particular care should be taken when mounting the package on the circuit board. don't have any object come in contact with plastic cap. you should not reform the lead frame. we recommended to use a ic-inserter when you assemble to pcb. also, be care that the any of the following can cause the package to crack or dust to be generated. 1. applying heat to the external leads for an extended period of time with soldering iron. 2. applying repetitive bending stress to the external leads. 3. rapid cooling or heating operate in clean environments. ccd image sensors are precise optical equipment that should not be subject to mechanical shocks. exposure to high temperatures or humidity will affect the characteristics. so avoid storage or usage in such conditions. keep in a case to protect from dust and dirt. dew condensation may occur on ccd image sensors when the devices are transported from a low-temperature environment to a high-temperature environment. avoid such rapid temperature changes. for more details, refer to our document "review of quality and reliability handbook" (c12769e) 1 2 electrostatic breakdown ccd image sensor is protected against static electricity, but destruction due to static electricity is sometimes detected. before handling be sure to take the following protective measures. 1. ground the tools such as soldering iron, radio cutting pliers of or pincer. 2. install a conductive mat or on the floor or working table to prevent the generation of static electricity. 3. either handle bare handed or use non-chargeable gloves, clothes or material. 4. ionized air is recommended for discharge when handling ccd image sensor. 5. for the shipment of mounted substrates, use box treated for prevention of static charges. 6. anyone who is handling ccd image sensors, mounting them on pcbs or testing or inspecting pcbs on which ccd image sensors have been mounted must wear anti-static bands such as wrist straps and ankle straps which are grounded via a series resistance connection of about 1 m ? . 4 3 recommended solvents solvents symbol
data sheet s13158ej3v0ds 17 pd3737 [memo]
data sheet s13158ej3v0ds 18 pd3737 [memo]
data sheet s13158ej3v0ds 19 pd3737 notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function.
pd3737 the information in this document is current as of september, 2003. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec electronics data sheets or data books, etc., for the most up-to-date specifications of nec electronics products. not all products and/or types are available in every country. please check with an nec electronics sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without the prior written consent of nec electronics. nec electronics assumes no responsibility for any errors that may appear in this document. nec electronics does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec electronics products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec electronics or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of a customer's equipment shall be done under the full responsibility of the customer. nec electronics assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec electronics endeavors to enhance the quality, reliability and safety of nec electronics products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec electronics products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment and anti-failure features. nec electronics products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to nec electronics products developed based on a customer- designated "quality assurance program" for a specific application. the recommended applications of an nec electronics product depend on its quality grade, as indicated below. customers must check the quality grade of each nec electronics product before using it in a particular application. "standard": computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots. "special": transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support). "specific": aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. the quality grade of nec electronics products is "standard" unless otherwise expressly specified in nec electronics data sheets or data books, etc. if customers wish to use nec electronics products in applications not intended by nec electronics, they must contact an nec electronics sales representative in advance to determine nec electronics' willingness to support a given application. (note) (1) "nec electronics" as used in this statement means nec electronics corporation and also includes its majority-owned subsidiaries. (2) "nec electronics products" means any product developed or manufactured by or for nec electronics (as defined above). ? ? ? ? ? ? m8e 02. 11-1

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