pi74fct377t octal d flip-flop with clock enable 1 ps2017a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 fast cmos octal d flip-flop with clock enable product description: pericom semiconductor?s pi74fct series of logic circuits are pro- duced in the company?s advanced 0.6/0.8 micron cmos technology, achieving industry leading speed grades. the pi74fct377t is an 8-bit wide octal designed with eight edge- triggered d-type flip-flops with individual d inputs and o outputs. when clock enable (ce) is low, the common buffered clock (cp) loads all flip-flops simultaneously. the register is fully edge- triggered. d input state, one setup time before the low-to-high clock transition, is transferred to the corresponding flip-flop?s o output. the ce input must be stable only one setup time prior to the low-to-high transition for predictable operation. product features: ? the pi74fct377t is pin compatible with bipolar fast? series at a higher speed and lower power consumption ? ttl input and output levels ? octal d flip-flops with clock enable ? extremely low static power ? hysteresis on all inputs ? industrial operating temperature range: ?40c to +85c ? packages available: ? 20-pin 173 mil wide plastic tssop (l) ? 20-pin 300 mil wide plastic dip (p) ? 20-pin 150 mil wide plastic qsop (q) ? 20-pin 150 mil wide plastic tqsop (r) ? 20-pin 300 mil wide plastic soic (s) logic block diagram inputs outputs mode cp ce d n o n load "1" - lhh load "0" - lll hold - hxnc (do nothing) hhxnc truth table (1) 1. h = high voltage level h = high voltage level one setup time prior to the low-to-high clock transition l = low voltage level l = low voltage level one setup time prior to the low-to-high clock transition x = don't care nc = no change - = low-to-high clock transition pin name description ce clock enable (active low) cp clock pulse input d 0 -d 7 data inputs o 0 -o 7 data outputs gnd ground v cc power product pin description product pin configuration 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 pi74fct377t d 0 o 0 ce cp d q cp d 1 o 1 d q cp d 2 o 2 d q cp d 3 o 3 d q cp d 4 o 4 d q cp d 5 o 5 d q cp d 6 o 6 d q cp d 7 o 7 d q cp 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 ce o 0 d 0 d 1 o 1 o 2 d 2 d 3 o 3 gnd vcc o 7 d 7 d 6 o 6 o 5 d 5 d 4 o 4 cp 20-pin l20 p20 q20 r20 s20
pi74fct377t octal d flip-flop with clock enable 2 ps2017a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 maximum ratings (above which the useful life may be impaired. for user guidelines, not tested.) storage temperature .................................................................... ?65c to +150c ambient temperature with power applied ..................................... -40c to +85c supply voltage to ground potential (inputs & vcc only) .............. ?0.5v to +7.0v supply voltage to ground potential (outputs & d/o only) ........... ?0.5v to +7.0v dc input voltage ............................................................................ ?0.5v to +7.0v dc output current ..................................................................................... 120 ma power dissipation .......................................................................................... 0.5w note: stresses greater than those listed under maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. dc electrical characteristics (over the operating range, t a = ?40c to +85c, v cc = 5v 5%) parameters description test conditions (1) min. typ (2) max. units v oh output high voltage v cc = min., v in = v ih or v il i oh = ?15.0 ma 2.4 3.0 v v ol output low current v cc = min., v in = v ih or v il i ol = 64 ma 0.3 0.55 v v ih input high voltage guaranteed logic high level 2.0 v v il input low voltage guaranteed logic low level 0.8 v i ih input high current v cc = max. v in = v cc 1a i il input low current v cc = max. v in = gnd ?1 a v ik clamp diode voltage v cc = min., i in = ?18 ma ?0.7 ?1.2 v i os short circuit current v cc = max. (3) , v out = gnd ?60 ?120 ma i off power down disable v cc = gnd, v out = 4.5v ? ? 100 a v h input hysteresis 200 mv capacitance (t a = 25c, f = 1 mhz) parameters (4) description test conditions typ max. units c in input capacitance v in = 0v 6 10 pf c out output capacitance v out = 0v 8 12 pf notes: 1. for max. or min. conditions, use appropriate value specified under electrical characteristics for the applicable device type. 2. typical values are at vcc = 5.0v, +25c ambient and maximum loading. 3. not more than one output should be shorted at one time. duration of the test should not exceed one second. 4. this parameter is determined by device characterization but is not production tested.
pi74fct377t octal d flip-flop with clock enable 3 ps2017a 03/11/96 1234567890123456789012345678901212345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901 2123456789012 switching characteristics over operating range 377t 377at 377ct 377dt com. com. com. com. parameters description conditions (1) min max min max min max min max unit t plh propagation delay c l = 50 pf 2.0 13.0 2.0 7.2 2.0 5.2 2.0 4.5 ns t phl cp to o n r l = 500 w t su setup time, high or low 2.5 ? 2.0 ? 2.0 ? 2.0 ? ns dn to cp t h hold time, high or low 2.0 ? 1.5 ? 1.5 ? 1.5 ? ns dn to cp t su setup time high or low 4.0 ? 3.5 ? 3.5 ? 2.0 ? ns ce to cp t h hold time high or low 1.5 ? 1.5 ? 1.5 ? 1.5 ? ns ce to cp t w clock pulse width (3) 7.0 ? 6.0 ? 6.0 ? 3.0 ? ns high or low notes: 1. see test circuit and wave forms. 2. minimum limits are guaranteed but not tested on propagation delays. 3. this parameter guaranteed but not production tested. notes: 1. for conditions shown as max. or min., use appropriate value specified under electrical characteristics for the applicable dev ice. 2. typical values are at vcc = 5.0v, +25c ambient. 3. per ttl driven input (v in = 3.4v); all other inputs at vcc or gnd. 4. this parameter is not directly testable, but is derived for use in total power supply calculations. 5. values for these conditions are examples of the icc formula. these limits are guaranteed but not tested. 6. i c =i quiescent + i inputs + i dynamic i c = i cc + d i cc d h n t + i ccd (f cp /2 + f i n i ) i cc = quiescent current d i cc = power supply current for a ttl high input (v in = 3.4v) d h = duty cycle for ttl inputs high n t = number of ttl inputs at d h i ccd = dynamic current caused by an input transition pair (hlh or lhl) f cp = clock frequency for register devices (zero for non-register devices) f i = input frequency n i = number of inputs at f i (all currents are in milliamps and all frequencies are in megahertz.) power supply characteristics parameters description test conditions (1) min. typ (2) max. units i cc quiescent power v cc = max. v in = gnd 0.1 500 a supply current or v cc d i cc supply current per v cc = max. v in = 3.4v (3) 0.5 2.0 ma input @ ttl high i ccd supply current per v cc = max., outputs open v in = v cc 0.15 0.25 ma/ input per mhz (4) ce = gnd v in = gnd mhz one input toggling 50% duty cycle i c total power supply v cc = max., outputs open v in = v cc 1.57 3.5 (5) ma current (6) f cp = 10 mh z , 50% duty cycle v in = gnd ce = gnd v in = 3.4v 50% duty cycle v in = gnd 2.0 5.5 (5) one bit toggling at f i = 5 mh z v cc = max., outputs open v in = v cc 3.8 7.3 (5) f cp = 10 mh z , 50% duty cycle v in = gnd ce = gnd v in = 3.4v eight bits toggling at f i = 2.5 mh z v in = gnd 6.0 16.3 (5) 50% duty cycle
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