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low voltage 1.15 v to 5.5 v , single-channel bidirectional logic level translator ADG3301 rev. 0 in for m a t i o n f u r n is h e d b y an al o g d e vice s is b e li ev e d to b e accu ra te a n d reli abl e . h o w e v e r , n o r e sp o n sibi lit y is as s u m e d by an al o g d e vices fo r i t s u s e , n o r fo r a n y i n fr i n g e m e nts of pate n t s or ot h e r r i g h ts o f th ir d par t ies th a t m a y r e su l t f r o m i t s use . s p e c i f ica t io n s su bj e c t t o c h an g e w i th o u t n o ti c e . n o l i c e n s e i s g r an t e d b y imp l ic a t io n o r o t h e r w i s e un d e r an y pa t e n t o r pa t e n t r i g h t s o f a n a l o g d e v i c e s . t r adem ar ks and r e g i st e r ed tr ad ema r ks ar e the p r o p er t y of the i r r e sp e c t i v e o w ne rs . o n e t e chnology way, p . o. b o x 91 06, nor w ood , ma 020 62- 910 6, u. s . a. t e l: 781. 329. 4 700 w w w . analog .c om fax: 781. 461. 31 13 ? 2005 analog de vices, i n c. al l r i ght s r e ser v ed . fea t ures bidirec t ional lev e l transla t ion o p er a t es from 1.15 v t o 5.5 v l o w quiesc en t curr en t < 5 a no dir e c t ion pi n applic a t io ns spi?, micr owire? le v e l tr ans l a t ion l o w v o ltage as ic le v e l tr ans l ation s m a r t c a rd re a d e r s c e ll phones an d c e ll phone cr adles p o r t able c o mmunic a tion de vices t e lec o mmunic a tions equipm ent net w ork swit ches and r o uter s s t or age sy stem s (san/ n as) c o mputing/ser v er ap plic a t ions gps p o r t able pos s y st ems l o w c o st serial in t e r f ac es func ti on a l bl ock di a g r a m a y gnd v ccy v cca en 05517-001 ADG3301 figure 1. gener a l description the ad g3301 is a sin g le-c ha nne l , b i dir e c t io nal log i c lev e l tra n s l a t o r . i t ca n b e used i n m u l t i v o l ta g e d i g i tal sys t e m a p p l i c a - ti o n s s u c h a s da ta tra n sf e r bet w ee n a lo w v o l t a g e d s p/ co n t r o lle r a n d a hi g h er v o l t a g e de vi ce . th e i n t e rnal a r c h i t e c t u r e allo w s th e de vice t o p e r f o r m b i dire c t ional l o g i c le ve l transla t ion wi t h o u t an a d di ti o n al si gn a l t o se t t h e d i r e c t i o n in w h i c h th e tra n s l a t i o n tak e s p l a c e . the v o l t a g e a p plie d t o v cc a s e ts th e log i c le ve ls o n t h e a side o f t h e de vi ce , w h i l e v cc y s e ts t h e le v e l s o n t h e y si de . f o r p r o p er op e r a t i o n , v cc a m u st a l w a y s b e l e ss t h an v cc y . the v cc a - co m p a t i b le log i c sig n als a p p l ie d t o t h e a p i n a p p e a r as v cc y - co m p a t i b le l e v e l s o n t h e y p i n. s i mi la rl y , v cc y -co m pa t i b l e logic l e vel s a ppl ie d to t h e y pi n a p p e ar as v cc a -com p a t i b l e log i c l e ve ls o n t h e a pi n. the e n ab l e p i n (e n) p r o v i d e s t h r e e- st a t e op er a t i o n o n b o th th e a p i n a n d th e y p i n . w h e n th e d e v i c e e n a b l e p i n i s p u l l e d lo w , t h e ter m inals o n bo t h sides o f t h e de vice a r e in t h e hig h im p e da n c e s t a t e . th e en p i n is r e fe r r e d t o th e v cc a s u ppl y vol t a g e an d dr i ven hi g h fo r n o r m a l o p er a t io n. the ad g3301 is a v a i la b l e in a c o m p ac t 6-lead s c 70 p a c k a g e a nd is gua r an t e ed t o o p era t e o v er th e 1.15 v t o 5.5 v s u p p l y v o l t a g e ra n g e and ext e n d e d ?4 0c t o +85c t e m p era t ur e ra n g e . produc t highlight s 1. b i dir e c t io nal le v e l tra n sla t io n. 2. f u l l y gua r a n t eed o v er t h e 1.15 v t o 5.5 v s u p p l y ra n g e . 3. n o dir e c t io n p i n. 4. c o m p ac t 6 - lead sc70 p a c k a g e.
ADG3301 rev. 0 | page 2 of 20 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 product highlights ........................................................................... 1 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 6 esd caution .................................................................................. 6 pin configuration and function descriptions ............................. 7 typical performance characteristics ............................................. 8 test circ u its ..................................................................................... 12 ter mi nolo g y .................................................................................... 15 theory of operation ...................................................................... 16 level translator architecture ................................................... 16 input driving requirements ..................................................... 16 output load requirements ...................................................... 16 enable operation ....................................................................... 16 power supplies ............................................................................ 16 data rate ..................................................................................... 17 applications ..................................................................................... 18 layout guidelines ....................................................................... 18 outline dimensions ....................................................................... 19 ordering guide .......................................................................... 19 revision history 12/05revision 0: initial version
ADG3301 rev. 0 | page 3 of 20 specifications v ccy = 1.65 v to 5.5 v, v cca = 1.15 v to v ccy , gnd = 0 v. all specifications t min to t max , unless otherwise noted. table 1. parameter 1 symbol conditions min typ 2 max unit logic inputs/outputs a side input high voltage 3 v iha v cca = 1.15 v v cca ? 0.3 v v iha v cca = 1.2 v to 5.5 v 0.65 v cca input low voltage 3 v ila 0.35 v cca v output high voltage v oha v y = v ccy , i oh = 20 a, see figure 27 v cca ? 0.4 v output low voltage v ola v y = 0 v, i ol = 20 a, see figure 27 0.4 v capacitance 3 c a f = 1 mhz, en = 0, see figure 32 9 pf leakage current i la, hiz v a = 0 v/v cca , en = 0, see figure 29 1 a y side input high voltage 3 v ihy 0.65 v ccy v input low voltage 3 v ily 0.35 v ccy v output high voltage v ohy v a = v cca , i oh = 20 a, see figure 28 v ccy ? 0.4 v output low voltage v oly v a = 0 v, i ol = 20 a, see figure 28 0.4 v capacitance 3 c y f = 1 mhz, en = 0, see figure 33 6 pf leakage current i ly, hiz v y = 0 v/v ccy , en = 0, see figure 30 1 a enable (en) input high voltage 3 v ihen v cca = 1.15 v v cca ? 0.3 v v ihen v cca = 1.2 v to 5.5 v 0.65 v cca v input low voltage 3 v ilen 0.35 v cca v leakage current i len v en = 0 v/v cca , v a = 0 v, see figure 31 1 a capacitance 3 c en 3 pf enable time 3 t en r s = r t = 50 ?, v a = 0 v/v cca (a y), v y = 0 v/v ccy (y a), see figure 34 1 1.8 s switching characteristics 3 3.3 v 0.3 v v cca v ccy , v ccy = 5 v 0.5 v a y level translation r s = r t = 50 ?, c l = 50 pf, see figure 35 propagation delay t p, a y 6 10 ns rise time t r, a y 2 3.5 ns fall time t f, a y 2 3.5 ns maximum data rate d max, a y 50 mbps part-to-part skew t ppskew, a y 3 ns y a level translation r s = r t = 50 ?, c l = 15 pf, see figure 36 propagation delay t p, y a 4 7 ns rise time t r, y a 1 3 ns fall time t f, y a 3 7 ns maximum data rate d max, y a 50 mbps part-to-part skew t ppskew, y a 2 ns 1.8 v 0.15 v v cca v ccy , v ccy = 3.3 v 0.3 v a y translation r s = r t = 50 ?, c l = 50 pf, see figure 35 propagation delay t p, a y 8 11 ns rise time t r, a y 2 5 ns fall time t f, a y 2 5 ns maximum data rate d max, a y 50 mbps part-to-part skew t ppskew, a y 4 ns
ADG3301 rev. 0 | page 4 of 20 parameter 1 symbol conditions min typ 2 max unit y a translation r s = r t = 50 ?, c l = 15 pf, see figure 36 propagation delay t p, y a 5 8 ns rise time t r, y a 2 3.5 ns fall time t f, y a 2 3.5 ns maximum data rate d max, y a 50 mbps part-to-part skew t ppskew, y a 3 ns 1.15 v to 1.3 v v cca v ccy , v ccy = 3.3 v 0.3 v a y translation r s = r t = 50 ?, c l = 50 pf, see figure 35 propagation delay t p, a y 9 18 ns rise time t r, a y 3 5 ns fall time t f, a y 2 5 ns maximum data rate d max, a y 40 mbps part-to-part skew t ppskew, a y 10 ns y a translation r s = r t = 50 ?, c l = 15 pf, see figure 36 propagation delay t p, y a 5 9 ns rise time t r, y a 2 4 ns fall time t f, y a 2 4 ns maximum data rate d max, y a 40 mbps part-to-part skew t ppskew, y a 4 ns 1.15 v to 1.3 v v cca v ccy , v ccy = 1.8 v 0.3 v a y translation r s = r t = 50 ?, c l = 50 pf, see figure 35 propagation delay t p, a y 12 25 ns rise time t r, a y 7 12 ns fall time t f, a y 3 5 ns maximum data rate d max, a y 25 mbps part-to-part skew t ppskew, a y 15 ns y a translation r s = r t = 50 ?, c l = 15 pf, see figure 36 propagation delay t p, y a 14 35 ns rise time t r, y a 5 16 ns fall time t f, y a 2.5 6.5 ns maximum data rate d max, y a 25 mbps part-to-part skew t ppskew, y a 23.5 ns 2.5 v 0.2 v v cca v ccy , v ccy = 3.3 v 0.3 v a y translation r s = r t = 50 ?, c l = 50 pf, see figure 35 propagation delay t p, a y 7 10 ns rise time t r, a y 2.5 4 ns fall time t f, a y 2 5 ns maximum data rate d max, a y 60 mbps part-to-part skew t ppskew, a y 4 ns y a translation r s = r t = 50 ?, c l = 15 pf, see figure 36 propagation delay t p, y a 5 8 ns rise time t r, y a 1 4 ns fall time t f, y a 3 5 ns maximum data rate d max, y a 60 mbps part-to-part skew t ppskew, y a 3 ns
ADG3301 rev. 0 | page 5 of 20 parameter 1 symbol conditions min typ 2 max unit power requirements power supply voltages v cca v cca v ccy 1.15 5.5 v v ccy 1.65 5.5 v quiescent power supply current i cca v a = 0 v/v cca , v y = 0 v/v ccy , v cca = v ccy = 5.5 v, en = 1 0.17 5 a i ccy v a = 0 v/v cca , v y = 0 v/v ccy , v cca = v ccy = 5.5 v, en = 1 0.27 5 a three-state mode power supply current i hiza v cca = v ccy = 5.5 v, en = 0 0.1 5 a i hizy v cca = v ccy = 5.5 v, en = 0 0.1 5 a 1 temperature range for the b version is ?40 c to +85c. 2 all typical values are at t a = 25c, unless otherwise noted. 3 guaranteed by design, not subject to production test.
ADG3301 rev. 0 | page 6 of 2 0 absolute maximum ra tings t a = 2 5 c , u n l e ss ot he r w i s e no t e d. table 2. p a r a me t e r r a t i n g v cc a to gnd ?0.3 v to +7 v v cc y to gnd v cc a to +7 v dig i tal i n puts ( a ) ?0.3 v t o v cc a + 0.3 v dig i tal i n puts ( y ) ?0.3 v t o v cc y + 0.3 v en t o gnd ?0.3 v t o +7 v o p era t ing t e mp er a tur e r a nge i n dustr i al (b v e r s ion) ?40c to +85c stor age t e mpera tur e r a nge ?65c to +150c junc tion t e mpe r a tur e 150c ja t h ermal i m pedanc e (4-la y er boar d) 6-l e ad sc70 494.1c/w l e ad t e mper a tur e , s o lder ing (10 sec) 300c ir r e flo w , p e ak t e mpera tur e (< 20 sec) 260(+0/?5)c s t r e s s es a b o v e t h os e list e d u nde r a b s o l u te m a xim u m r a t i n g s ma y ca us e p e r m a n e n t dama ge to t h e de vi ce. t h is is a st r e ss r a t i ng on ly ; f u n c t i on a l op e r at i o n of t h e d e v i c e a t t h e s e or an y o t h e r con d i t ions a b o v e t h os e list e d i n t h e op era t io nal s e c t ion s o f t h is sp e c if ic a t io n is n o t i m pli e d . e x p o sur e t o a b s o l u t e max i m u m r a t i ng co ndi t i on s fo r ex tende d p e r i o d s ma y a f fe c t de vice rel i a b i l i t y . on ly o n e abs o lu te max i m u m r a t i n g ma y b e a pplie d a t an y o n e tim e . esd caution esd (elec t r o st a t ic dischar g e) se nsitiv e devic e . elec tr os t a tic char ges as high as 4000 v r e adily ac cumula te on the human bod y and t e st eq uipmen t and can dischar g e wi thout det e c t ion. although this pr oduc t f e a tur es pr oprietar y esd pr ot ec tion cir c uitr y , permanen t dama ge may oc cur on dev i c e s sub j ec ted to high ener gy elec tr o s ta tic di scharge s . theref or e , proper esd pr ecautio n s a r e r e c o m m ended to a v oid per f or man c e degrada t ion or l o ss of func tiona l it y .
ADG3301 rev. 0 | page 7 of 2 0 pin conf igura t ion and fu nction descriptions 05517-002 v cca 1 a 2 gnd 3 v ccy 6 y 5 en 4 ADG3301 top view (not to scale) figure 2. pin c o nfiguration ta ble 3. pi n f u nct i on d e s c ri pt i o ns p i n no . m n eonic description 1 v cc a p o w e r supply v o ltage i n put f o r the a i/ o p i n (1. 15 v v cc a v cc y ). 2 a i n put/ o utput a . r e f e r e nc ed t o v cc a . 3 g n d gr o u n d ( 0 v ) . 4 en a c tiv e h i gh enable i n put. 5 y i n put/ o utput y . r e f e r e nc e d t o v cc y . 6 v cc y p o w e r supply v o ltage i n put f o r the y i/ o p i n (1.6 5 v v cc y 5.5v ).
ADG3301 rev. 0 | page 8 of 2 0 typical perf orm ance cha r acte ristics 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 0 5 10 15 20 25 30 35 40 45 50 data rate (mbps) t a = 25 c 1 channel c l = 50pf v cca = 1.8v, v ccy = 3.3v v cca = 1.2v, v ccy = 1.8v v cca = 3.3v, v ccy = 5v i cca (ma) 05517-003 figure 3. i cca vs. data ra te (a y l e vel transl at i o n) 0 1 2 3 4 5 6 7 8 9 10 0 5 10 15 20 25 30 35 40 45 50 data rate (mbps) t a = 25 c 1 channel c l = 50pf v cca = 1.8v, v ccy = 3.3v v cca = 1.2v, v ccy = 1.8v v cca = 3.3v, v ccy = 5v i ccy (ma) 05517-004 figure 4. i ccy vs. data ra te (a y l e vel transl at i o n) 0 0.5 1.0 1.5 2.0 2.5 3.0 0 5 10 15 20 25 30 35 40 45 50 data rate (mbps) i cca (ma) t a = 25 c 1 channel c l = 15pf v cca = 1.8v, v ccy = 3.3v v cca = 1.2v, v ccy = 1.8v v cca = 3.3v, v ccy = 5v 05517-005 figure 5. i cca vs. data ra te (y a l e ve l tr ansl a t i o n) 0 0.5 1.0 1.5 2.0 2.5 3.0 0 5 10 15 20 25 30 35 40 45 50 data rate (mbps) i ccy (ma) t a = 25 c 1 channel c l = 15pf v cca = 1.8v, v ccy = 3.3v v cca = 1.2v, v ccy = 1.8v v cca = 3.3v, v ccy = 5v 05517-006 figure 6. i ccy vs. data ra te (y a l e ve l tr ansl a t i o n) 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 13 23 33 43 53 63 73 capacitive load (pf) i ccy (ma) 20mbps 10mbps 5mbps 1mbps t a =2 5 c 1 channel v cca = 1.2v v ccy = 1.8v 05517-007 figure 7. i ccy v s . c a pac i t i v e l oad at pi n y f o r a y (1.2 v 1. 8 v ) l e v e l tra n s l at io n 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 13 23 33 43 53 capacitive load (pf) i cca (ma) 20mbps 10mbps 5mbps 1mbps t a = 25 c 1 channel v cca = 1.2v v ccy =1.8v 05517-008 figure 8. i cca v s . ca pac i t i v e l oad at pi n a f o r y a (1.8 v 1. 2 v ) l e v e l tra n s l at io n
ADG3301 rev. 0 | page 9 of 2 0 0 1 2 3 4 5 6 7 8 9 i ccy (ma) 13 23 33 43 53 63 73 capacitive load (pf) t a = 25 c 1 channel v cca = 1.8v v ccy = 3.3v 30mbps 20mbps 10mbps 5mbps 50mbps 05517-009 figure 9. i ccy v s . c a pac i t i v e l oad at pi n y f o r a y (1.8 v 3. 3 v ) l e v e l tra n s l at io n 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 i cca (ma) 13 23 33 43 53 capacitive load (pf) 50mbps t a = 25 c 1 channel v cca = 1.8v v ccy = 3.3v 5mbps 10mbps 20mbps 30mbps 05517-010 figure 10. i cc a vs. c a pac i ti ve loa d a t pi n a for y a (3.3 v 1. 8 v ) l e v e l tra n s l at io n 0 2 4 6 8 10 12 i ccy (ma) 13 23 33 43 53 63 73 capacitive load (pf) t a = 25 c 1 channel v cca = 3.3v v ccy = 5v 50mbps 30mbps 20mbps 10mbps 5mbps 05517-011 figure 11. i cc y vs. c a pac i ti ve loa d a t pi n y f o r a y (3.3 v 5 v ) l e v e l t r ans l at i o n 0 2 4 6 i cca (ma) 13 23 33 43 53 capacitive load (pf) t a = 25 c 1 channel v cca = 3.3v v ccy = 5v 50mbps 30mbps 20mbps 10mbps 5mbps 1 3 5 7 05517-012 figure 12. i cc a vs. c a pac i ti ve loa d a t pi n a for y a (5 v 3.3 v ) l e v e l t r ans l at i o n 0 1 2 3 4 5 6 7 8 9 10 13 23 33 43 53 63 73 capacitive load (pf) r i se tim e ( n s) t a = 25 c 1 channel data rate = 50kbps v cca = 1.2v, v ccy = 1.8v v cca = 1.8v, v ccy = 3.3v v cca = 3.3v, v ccy = 5v 05517-013 figure 1 3 . ris e t i m e v s . cap a c i tiv e l o ad at p i n y (a y lev e l t r a n s l at io n) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 13 23 33 43 53 63 73 capacitive load (pf) fall time (ns) t a = 25 c 1 channel data rate = 50kbps v cca = 1.8v, v ccy = 3.3v v cca = 3.3v, v ccy = 5v v cca = 1.2v, v ccy = 1.8v 05517-014 figure 1 4 . f a l l t i me v s . capa citiv e lo a d at p i n y (a y lev e l t r a n s l at io n)
ADG3301 rev. 0 | page 10 of 20 0 1 2 3 4 5 6 7 8 9 10 13 18 23 28 33 38 43 48 53 r i se tim e ( n s) capacitive load (pf) t a = 25 c 1 channel data rate = 50kbps v cca = 1.2v, v ccy = 1.8v v cca = 1.8v, v ccy = 3.3v v cca = 3.3v, v ccy = 5v 05517-015 figure 1 5 . ris e t i m e v s . cap a c i tiv e l o ad at p i n a (y a lev e l t r a n s l at io n) 13 18 23 28 33 38 43 48 53 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 fall time (ns) capacitive load (pf) t a = 25 c 1 channel data rate = 50kbps v cca = 1.2v, v ccy = 1.8v v cca = 1.8v, v ccy = 3.3v v cca = 3.3v, v ccy = 5v 05517-016 figure 1 6 . f a l l t i me v s . capa citiv e lo a d at p i n a (y a lev e l t r a n s l at io n) 0 2 4 6 8 10 12 14 13 23 33 43 53 63 73 capacitive load (pf) p r op agation de lay (ns ) t a = 25 c 1 channel data rate = 50kbps v cca = 1.2v, v ccy = 1.8v v cca = 1.8v, v ccy = 3.3v v cca = 3.3v, v ccy = 5v 05517-017 fig u re 1 7 . pr opag a t ion del a y (t plh ) v s . capa cit i v e lo ad at pin y (a y lev e l t r a n s l at io n) 0 2 4 6 8 10 12 13 23 33 43 53 63 73 p r op agation de lay (ns ) capacitive load (pf) data rate = 50kbps t a = 25 c 1 channel v cca = 1.2v, v ccy = 1.8v v cca = 1.8v, v ccy = 3.3v v cca = 3.3v, v ccy = 5v 05517-018 fig u re 1 8 . pr opag a t ion del a y (t phl ) v s . capa cit i v e lo ad at pin y (a y lev e l t r a n s l at io n) 0 1 2 3 4 5 6 7 8 9 13 18 23 28 33 38 43 48 53 capacitive load (pf) p r op agation de lay (ns ) t a = 25 c 1 channel data rate = 50kbps v cca = 1.2v, v ccy = 1.8v v cca = 1.8v, v ccy = 3.3v v cca = 3.3v, v ccy = 5v 05517-019 fig u re 1 9 . pr opag a t ion del a y (t plh ) vs. ca pac i ti ve loa d a t p i n a (y a lev e l t r a n s l at io n) 0 1 2 3 4 5 6 7 8 9 13 18 23 28 33 38 43 48 53 capacitive load (pf) p r op agation de lay (ns ) t a = 25 c 1 channel data rate = 50kbps v cca = 1.2v, v ccy = 1.8v v cca = 1.8v, v ccy = 3.3v v cca = 3.3v, v ccy = 5v 05517-020 fig u re 2 0 . pr opag a t ion del a y (t phl ) vs. ca pac i ti ve loa d a t p i n a (y a lev e l t r a n s l at io n)
ADG3301 rev. 0 | page 11 of 20 05517-021 t a = 25 c data rate = 25mbps c l = 50pf 1 channel 5ns/div 400mv/div figure 2 1 . e y e di ag ra m at y output (1.2 v t o 1.8 v lev e l tra n s l at io n, 25 m b ps ) 5ns/div 200mv/div t a = 25 c data rate = 25mbps c l = 15pf 1 channel 05517-022 figure 2 2 . e y e di ag ra m at a output (1.8 v t o 1. 2 v lev e l tr ans l at i o n, 2 5 m bps ) t a = 25 c data rate = 50mbps 3ns/div 500mv/div c l = 50pf 1 channel 05517-023 figure 2 3 . e y e di ag ra m at y output (1.8 v t o 3.3 v lev e l tra n s l at io n, 50 m b ps ) t a = 25 c data rate = 50mbps c l = 15pf 1 channel 3ns/div 400mv/div 05517-024 figure 2 4 . e y e di ag ra m at a output (3.3 v t o 1.8 v lev e l tra n s l at io n, 50 m b ps ) t a = 25 c data rate = 50mbps cl = 50pf 1 channel 3ns/div 1v/div 05517-025 figure 2 5 . e y e di ag ra m at y output (3.3 v t o 5 v lev e l t r ans l at i o n, 5 0 m b p s ) t a = 25 c data rate = 50mbps c l = 15pf 1 channel 3ns/div 800mv/div 05517-026 figure 2 6 . e y e di ag ra m at a output (5 v t o 3. 3 v lev e l t r ans l at i o n, 5 0 m b p s )
ADG3301 rev. 0 | page 12 of 20 test circuits ADG3301 a y gnd v cca v ccy en k1 k2 i oh i ol 05517- 027 0.1 f 0.1 f figure 27. v oh /v ol v o lt ag es at pin a ADG3301 y a gnd v ccy v cca en k1 k2 i oh i ol 05517- 028 0.1 f 0.1 f figure 28. v oh /v ol v o lt ag es at pin y ADG3301 a y gnd v cca v ccy k 05517- 029 0.1 f 0.1 f a en fig u re 2 9 . t h re e-st at e le ak ag e cur r e n t at p i n a ADG3301 a y gnd v cca v ccy k 05517-030 0.1 f 0.1 f en a fig u re 3 0 . t h re e-st at e le ak ag e cur r e n t at p i n y ADG3301 a y gnd v cca v ccy k 05517-031 0.1 f 0.1 f en a fig u re 3 1 . e n pi n l e ak ag e cur r ent ADG3301 a y gnd v cca v ccy en 05517-032 capacitance meter figure 3 2 . c a pa cit a nc e at p i n a 05517-033 ADG3301 a y gnd v cca v ccy en capacitance meter figure 3 3 . c a pa cit a nc e at p i n y
ADG3301 rev. 0 | page 13 of 20 90% v en v y /v a t en1 v a /v y v cca 0v v cca /v ccy 0v v ccy /v cca 0v 10% v en v y /v a t en2 v a /v y v cca 0v 0v v ccy /v cca 0v note: t en is the largest of t en1 and t en2 in both a y and y a directions. signal source v en r t 50 ? v a ADG3301 en gnd r s 50 ? 0.1 f v cca a 1m ? v y 50pf 1m ? v ccy y k2 05517-034 z 0 = 50 ? k1 10 f + 0.1 f 10 f + a y direction signal source v en r t 50 ? 1m ? v a 15pf ADG3301 en gnd r s 50 ? 0.1 f 1m ? v cca a v y v ccy y k2 z 0 = 50 ? k1 10 f + 0.1 f 10 f + y a direction v cca /v ccy figure 3 4 . e n abl e t i m e
ADG3301 rev. 0 | page 14 of 20 50% 50% 10% 90% v a v y t f, a y t r, a y t p, a y t p, a y ADG3301 gnd signal source v a r t 50 ? r s 50 ? en v cca v ccy v y 50pf 05517- 035 z 0 = 50 ? ya 0.1 f 10 f + 0.1 f 10 f + fig u re 3 5 . s w it ch in g char act e ris t i c s ( a y lev e l tr ans l at i o n) 50% 50% 10% 90% v y v a t f, y a t r, y a t p, y a t p, y a ADG3301 gnd signal source v y r t 50 ? r s 50 ? en v cca v ccy v a 15pf 05517-036 z 0 = 50 ? ya 0.1 f 10 f + 0.1 f 10 f + fig u re 3 6 . s w it ch in g char act e ris t i c s ( y a lev e l tr ans l at i o n)
ADG3301 rev. 0 | page 15 of 20 terminology v iha logic input high voltage at pin a. v ila logic input low voltage at pin a. v oha logic output high voltage at pin a. v ola logic output low voltage at pin a. c a capacitance measured at pin a (en = 0). i la , hiz leakage current at pin a when en = 0 (pin a three-stated). v ihy logic input high voltage at pin y. v ily logic input low voltage at pin y. v ohy logic output high voltage at pin y. v oly logic output low voltage at pin y. c y capacitance measured at pin y (en = 0). i ly, hiz leakage current at pin and when en = 0 (pin a three-stated). v ihen logic input high voltage at the en pin. v ilen logic input low voltage at the en pin. c en capacitance measured at en pin. i len enable (en) pin leakage current. t en three-state enable time for pin a and pin y. t p, a y propagation delay when translating logic levels in the a y direction. t r, ay rise time when translating logic levels in the a y direction. t f, ay fall time when translating logic levels in the a y direction. d max, ay guaranteed data rate when translating logic levels in the a y direction under the driving and loading conditions specified in table 1. t ppskew, ay difference in propagation delay between any one channel and the same channel on a different part (under same driving/loading conditions) when translating in the a y direction. t p, y a propagation delay when translating logic levels in the y a direction. t r, ya rise time when translating logic levels in the y a direction. t f, ya fall time when translating logic levels in the y a direction. d max, ya guaranteed data rate when translating logic levels in the y a direction under the driving and loading conditions specified in table 1. t ppskew, ya difference in propagation delay between any one channel and the same channel on a different part (under the same driving/ loading conditions) when translating in the y a direction. i cca v cca supply current. i ccy v ccy supply current. i hiza v cca supply current during three-state mode (en = 0). i hizy v ccy supply current during three-state mode (en = 0).
ADG3301 rev. 0 | page 16 of 20 theor y of opera tion the ad g3301 l e v e l tra n s l a t o r a l lo ws the leve l shif tin g n e cess a r y fo r da t a t r a n sfer in a s y s t em w h er e m u l t i p le s u p p l y v o l t a g es a r e us e d . th e de vi ce r e q u ir es tw o su p p lies, v cc a and v cc y (v cc a v cc y ). th e s e s u p p lies s e t t h e log i c le v e l s o n e a c h side o f t h e d e vic e . w h e n dr iv ing t h e a p i n, t h e de vice t r an sla t e s th e v cc a -co m p a ti b l e log i c le ve ls t o v cc y -co m p a t i b l e log i c le ve ls a v a i la b l e a t t h e y p i n. simi la rl y , b e c a us e t h e de vice is ca p a b l e of b i d i r e c t io na l t r an sl a t ion, w h e n dr i v in g t h e y p i n t h e v cc y -com - p a ti b l e log i c le ve ls a r e tra n s l a t e d t o v cc a -co m p a tib l e log i c le ve ls a v a i la b l e a t t h e a p i n. w h e n e n = 0, t h e a pin a nd t h e y pin a r e thr e e-s t a t e d . w h en e n is dr i v en hig h , t h e ad g3301 g o es in to n o r m a l o p e r a t io n m o de and p e r f o r m s le vel t r a n sl a t ion. level translator ar chitec ture the ad g3301 co n s is ts o f a sing le b i dir e c t io na l c h a nne l tha t c a n t r a n s l a t e log i c l e v e l s i n ei t h er t h e a y o r t h e y a dir e c t ion. i t us es a o n e-sho t acce ler a t o r a r chi t e c t u r e t h a t e n s u r e s exce l l en t swi t c h in g c h a r ac t e r i s t ics. f i gur e 37 sh o w s a sim p lif i e d b l o c k dia g ram o f the ad g3301 leve l tra n s l a t o r . one-shot generator 6k ? 6k ? y v cca v ccy t2 t1 t3 t4 a 05517-037 p n u1 u2 u4 u3 fig u re 3 7 . s i mpl i f i e d bl ock d i ag ra m of an a d g 3 30 1 ch an nel the log i c le v e l t r a n s l a t io n in t h e a y dir e c t ion is p e r f o r m e d usin g a le ve l t r an s l a t o r (u1) and a n i n v e r t er (u2), w h i l e t h e tra n s l a t i o n in t h e y a dir e c t ion is p e r f o r m e d usin g t h e in ver t ers u3 and u4. th e on e-sh o t g e n e ra t o r det e c t s a r i sin g o r fal l in g e d g e pr es en t o n e i t h er t h e a side o r t h e y side o f t h e c h a nne l . i t s e n d s a sh o r t p u ls e t h a t t u r n s o n t h e pmos tra n sis - t o rs (t1 a nd t2 ) fo r a r i sin g e d g e , o r th e nmo s tra n sis t o r s (t3 a nd t4) fo r a fa l l i n g e d ge. t h is cha r ges/dis c ha rges t h e ca p a ci t i v e lo ad f a s t er , whic h r e su l t s in fas t r i s e and fal l tim e s . i n p u t d r iv in g req u i r emen t s t o en s u r e co r r ec t o p era t ion o f t h e ad g3301, t h e c i r c ui t tha t dr i v es t h e in p u t o f a n ad g330 1 c h a nne l m u s t ha v e an o u t p u t im p e dan c e o f les s tha n o r eq ual t o 150 ? a n d a minim u m p e ak c u r r en t dr ivin g ca p a b i li ty o f 36 ma. outpu t lo ad require m ents the ad g3301 l e v e l tra n s l a t o r is desig n ed t o dr i v e cm os- co m p a t i b le lo ad s. i f c u r r en t dr ivi n g c a p a b i l i ty is r e q u ir e d , i t is r e co mm ended to us e b u f f ers betw een t h e ad g 3301 o u t p u t s a nd t h e lo ad . enable ope r ation the ad g3301 p r o v ides thr e e-sta t e op era t ion a t the a i/o p i n a nd y i/ o p i n b y usin g t h e en ab le (en) p i n as sho w n i n t a b l e 4. table 4. truth table en y i/o p i n a i/o p i n 0 h i -z 1 hi - z 1 1 n o r m al opera ti on 2 nor m al opera ti on 2 1 h i gh imped anc e stat e . 2 i n nor mal oper a t i o n, the ad g3301 p e r f or ms lev e l tr ansla t ion. w h i l e e n = 0, t h e ad g3 301 en t e rs in t o tr i-st a t e m o de . i n this m o d e , th e cu rr e n t c o n s um p t i o n fr o m bo th th e v cc a and v cc y s u p p li es is r e d u ced , allo wi n g t h e use r t o s a v e po w e r , w h ich is c r it i c a l e s p e c i a l l y on b a tte r y - o p e r a te d s y s t e m s . t h e e n i n put pi n ca n b e d r i v en wi th ei t h e r v cc a - or v ccy - c om p a t i ble log i c l e ve ls . power supplies f o r p r o p er o p era t io n o f t h e ad g3301, the v o l t a g e a p p l ied t o th e v cc a m u s t b e al wa ys les s than o r eq ual t o the v o l t a g e a p p l ie d to v cc y . t o m e e t t h is con d i t ion, t h e r e co m m e nde d p o w e r - u p seq u en c e i s v ccy f i rst a nd t h e n v cc a . th e ad g 3301 o p era t es p r op e r ly on ly af te r b o t h su p p ly vol t age s re ach t h e i r nom i na l val u es. i t is n o t r e co mm e nde d to us e t h e p a r t i n a sys t e m w h ere , du r i n g p o w e r - u p , v cc a ma y b e g r e a ter t h a n v cc y du e t o a sig n if ican t i n cr e a s e i n t h e c u r r e n t t a ken f r o m t h e v cc a su p p ly f o r opt i m u m p e r f or m a nc e, t h e v cc a a nd v cc y pi ns s h ou l d b e de co u p le d t o gnd , an d place d as clos e as p o ssib le t o t h e d e vic e .
ADG3301 rev. 0 | page 17 of 20 data rate the maximum data rate at which the device is guaranteed to operate is a function of the v cca and v ccy supply voltage combi- nation and the load capacitance. it represents the maximum frequency of a square wave that can be applied to the i/o pins, which ensures that the device operates within the datasheet specifications in terms of output voltage (v ol and v oh ) and power dissipation (the junction temperature does not exceed the value specified under the absolute maximum ratings section). table 5 shows the guaranteed data rates at which the ADG3301 can operate in both directions (a y or y a level translation) for various v cca and v ccy supply combinations. table 5. guaranteed data rate (mbps) 1 v ccy v cca 1.8 v (1.65 v to 1.95 v) 2.5 v (2.3 v to 2.7 v) 3.3 v (3.0 v to 3.6 v) 5 v (4.5 v to 5.5 v) 1.2 v (1.15 v to 1.3 v) 25 30 40 40 1.8 v (1.65 v to 1.95 v) C 45 50 50 2.5 v (2.3 v to 2.7 v) C C 60 50 3.3 v (3.0 v to 3.6 v) C C C 50 5 v (4.5 v to 5.5 v) C C C C 1 the load capacitance used is 50 pf when translating in the a ? y direction and 15 pf when translating in the y ? a direction.
ADG3301 rev. 0 | page 18 of 20 appli c a t ions the ad g3301 is desig n ed f o r dig i tal c i r c ui ts tha t o p era t e a t dif f er en t s u p p l y v o l t a g es; t h er efo r e , log i c le v e l t r a n s l a t io n is r e q u ir e d . the lo w e r v o l t a g e log i c sig n als a r e co nn e c t e d t o t h e a p i n, an d t h e hig h er v o l t a g e lo g i c sig n als a r e co nn e c t e d t o t h e y p i n. th e ad g3301 ca n p r o v ide leve l tra n s l a t io n in bo th dir e c t io n s f r o m a y o r y a, e l im in a t in g t h e n e e d fo r a le v e l tra n s l a t o r i c f o r eac h dir e c t ion. t h e in t e rn al a r ch i t ec t u r e allo ws th e ad g3301 to p e r f o r m b i direc t io nal leve l tr a n s l a t ion wi t h ou t a n a d d i ti o n a l s i gn a l t o s e t th e d i r e ct i o n i n w h i c h th e t r a n s l a t i o n is made . this si m p lif i es t h e desig n b y e l i m in a t i n g t h e t i min g r e q u ir emen t s fo r t h e dir e c t ion sig n al an d r e d u c e s t h e n u m b er of i c s us e d fo r le v e l tra n sla t io n. f i gur e 38 sh o w s a n a p p l ica t io n wher e a 1.8 v micr o p r o ces s o r tra n sf ers da t a t o o r f r o m a 3.3 v p e r i p h eral device usin g t h e ad g3301 leve l tra n s l a t o r . 1 2 3 6 5 4 ADG3301 v ccy y en v cca a gnd peripheral device 3.3v 1.8v i/o h i/o l microprocessor/ microcontroller/ dsp gnd gnd 100nf 100nf 05517-038 fi gur e 38 1 . 8 v to 3.3 v le vel tr ansla t io n ci r c ui t layout gu idelines a s w i th a n y h i g h s p ee d di gi tal i c , th e p r i n t e d ci r c ui t boa r d la yo u t is im p o r t a n t fo r t h e o v eral l p e r f o r ma n c e o f t h e cir c u i t. c a re s h ou l d b e t a ke n to e n su re p r op e r p o we r s u p p ly b y p a ss and r e t u r n p a t h s fo r th e hig h s p e e d sig n als. e a c h v cc pi n ( v cc a and v cc y ) s h o u ld b e b y p a s s e d usin g lo w ef fe c t i v e s e r i es r e sis t a n c e (es r ) a nd ef f e c t i v e ser i es in d u c t a n c e (es i ) ca p a ci t o r s p l ace d as clos e as p o s s i b l e t o t h e v cc a and v cc y pi ns . t h e p a r a s i t i c i n du c - t a n c e o f t h e hi g h -sp e e d s i g n al t r ack mig h t ca us e sig n if ican t o v ersh o o t. this ef fe c t ca n b e r e d u ce d b y k e epi n g t h e len g t h o f t h e t r acks as sho r t as p o ssi b le. a s o lid cop p er pla n e fo r t h e r e t u r n p a t h (g nd) is a l s o r e co mmende d .
ADG3301 rev. 0 | page 19 of 20 outline dimensions compliant to jedec standards mo-203-ab 0. 2 2 0. 0 8 0. 30 0. 10 0. 30 0. 15 1. 00 0. 90 0. 70 se a t i n g pl a n e 4 5 6 3 2 1 pin 1 0. 65 bs c 1. 30 bs c 0. 10 m a x 0.10 coplanarity 0. 4 0 0. 1 0 1. 10 0. 80 2. 2 0 2. 0 0 1. 8 0 2. 4 0 2. 1 0 1. 8 0 1. 35 1. 25 1. 15 fig u re 3 9 . 6-le ad t h in s h ri nk s m a ll o u t lin e tr ans i s t o r pa ck ag e [ s c 70] (k s-6) dim e nsio ns sho w n i n mi ll im e t er s ordering guide m o d e l t e mper a t ur e r a n g e p a ck a g e descri p t i o n br anding 1 p a ck age o p tion ADG3301bksz - reel 2 ?40c to +85c 6-l e ad thin shr i nk smal l o utline t r ansistor p a c k age s0h ks -6 ADG3301bksz - reel7 2 ?40c to +85c 6-l e ad thin shr i nk smal l o utline t r ansistor p a c k age s0h ks -6 1 brand i ng on this p a ckage is l imited to three characters due to s p ace cons tra i nts . 2 z = pb-free part.
ADG3301 rev. 0 | page 20 of 20 notes ? 2005 analo g de v i ces, inc. all rights reserve d . tr adem ar ks and registered tra d emar ks are the prop erty of their respective o w ners . d05517-0-12/05(0)

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