View PCS3P73U00A_5760943.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

may 2008 PCS3P73U00A rev 0.3 notice: the information in this document is subject to change without notice. pulsecore semiconductor corporation 1715 s. bascom ave suite 200 campbell, ca 95008 ? tel: 408-879-9077 ? fax: 408-879-9018 www. p ulsecoresemi.com usb 2.0 peak emi reduction ic general features ? 1x peak emi reduction ic ? input frequency: 10mhz - 60mhz @ 2.5v 10mhz - 70mhz @ 3.3v ? output frequency: 10mhz - 60mhz @ 2.5v 10mhz - 70mhz @ 3.3v ? supply voltage: 2.5v0.2v ? 3.3v 0.3v ? analog spread selection up to 0.5% ? modrate selection option ? commercial temperature range ? 8pin tssop, soic and tdfn(2x2) col package ? conforms to usb2.0 compliance standards ? the first true drop-in solution product description PCS3P73U00A is a versatile, 3.3v / 2.5v peak emi reduction ic. PCS3P73U00A accepts an input clock either from a crystal or from an external reference (ac or dc coupled to xin / clkin) and locks on to it delivering a 1x modulated clock output. PCS3P73U00A has a frequency selection (fs) control that fa cilitates selecting one of the two frequency ranges within the operating frequency range. refer to the frequency selection table for details. PCS3P73U00A has an ssextr pin to select different deviations depending upon the value of an external resistor connected between ssextr and gnd. modulation rate (mr) control selects two different modulation rates. PCS3P73U00A operates from a 3.3v / 2.5v supply and is available in an 8 pin tssop, soic, and tdfn(2x2) col packages, over commercial temperature range. applications PCS3P73U00A is targeted for usb applications. refer to ssextr resistance table for usb2.0 compliance for commonly used frequencies. block diagram vdd gnd fs modout ssextr pll crystal oscillato r xout xin / clkin mr
may 2008 PCS3P73U00A rev 0.3 usb 2.0 peak emi reduction ic 2 of 13 notice: the information in this document is subject to change without notice. fs 1 2 3 4 5 6 7 8 modout xin / clkin ssextr vdd gnd mr PCS3P73U00A xout pin configuration pin description pin # pin name pin type description 1 xin / clkin i crystal connection or external reference clock input. 2 xout o crystal connection. if using an external reference, this pin should be left open. 3 fs i frequency select.pull low to select low frequency range. selects high frequency range when pulled high. has an internal pull-up resistor ( see frequency selection table for details ) 4 gnd p ground 5 modout o buffered modulated clock output 6 mr i modulation rate select. when low selects low modulation rate. selects high modulation rate when pulled high. has an internal pull-down resistor 7 ssextr i analog spread selection through external resistor to gnd. 8 vdd p 3.3v / 2.5v supply voltage frequency selection table vdd(v) fs frequency (mhz) 0 10-20 2.5v 1 20-60 0 10-27 3.3v 1 20-70
may 2008 PCS3P73U00A rev 0.3 usb 2.0 peak emi reduction ic 3 of 13 notice: the information in this document is subject to change without notice. absolute maximum rating symbol parameter rating unit v dd voltage on any pin with respect to ground -0.5 to +4.6 v t stg storage temperature -65 to +125 c t s max. soldering temperature (10 sec) 260 c t j junction temperature 150 c t dv static discharge voltage (as per jedec std22- a114-b) 2 kv note: these are stress ratings only and are not implied for functional use. exposure to absolute maximum ratings for prolonged periods of time may affect device reliability. operating conditions parameter description min max unit v dd(3.3v) supply voltage 3.0 3.6 v v dd(2.5v) supply voltage 2.3 2.7 v t a operating temperature (amb ient temperature) 0 +70 c c l load capacitance 10 pf c in input capacitance 7 pf electrical characteristics for 3.3v supply voltage parameter description test conditions min typ max unit v dd supply voltage 3.0 3.3 3.6 v v il input low voltage 0.8 v v ih input high voltage 2.0 v i il input low current v in = 0v -50 a i ih input high current v in = v dd 50 a v ol output low voltage i ol =8ma 0.4 v v oh output high voltage i oh = -8ma 2.4 v i cc static supply current xin / clkin pulled to gnd 750 a fs=0; @ 12mhz 8 i dd dynamic supply current unloaded outputs fs=1; @ 48mhz 12 ma z o output impedance 30 ?
may 2008 PCS3P73U00A rev 0.3 usb 2.0 peak emi reduction ic 4 of 13 notice: the information in this document is subject to change without notice. switching characteristics for 3.3 supply voltage parameter test conditions min typ max unit fs=0 10 12 27 input frequency fs=1 20 48 70 fs=0 10 12 27 modout fs=1 20 48 70 mhz duty cycle 1,2 measured at v dd /2 45 50 55 % rise time 1,2 measured between 20% to 80% 1.1 ns fall time 1,2 measured between 80% to 20% 0.7 ns cycle-cycle jitter 1,2 loaded outputs 150 ps pll lock time 2 stable power supply, valid clock presented on xin / clkin pin 3 ms notes: 1. all parameters are specified with 10pf loaded outputs. 2. parameter is guaranteed by desig n and characterization. not 100% tested in production electrical characteristics for 2.5v supply voltage parameter description test conditions min typ max unit v dd supply voltage 2.3 2.5 2.7 v v il input low voltage 0.7 v v ih input high voltage 1.7 v i il input low current v in = 0v -50 a i ih input high current v in = v dd 50 a v ol output low voltage i ol = 8ma 0.6 v v oh output high voltage i oh = -8ma 1.8 v i cc static supply current xin / clkin pulled to gnd 500 a fs=0; @ 12mhz 5 i dd dynamic supply current unloaded outputs fs=1; @ 48mhz 8 ma z o output impedance 40 ? switching characteristics for 2.5v supply voltage parameter test conditions min typ max unit fs=0 10 12 20 input frequency fs=1 20 48 60 fs=0 10 12 20 modout fs=1 20 48 60 mhz duty cycle 3,4 measured at v dd /2 45 50 55 % rise time 3,4 measured between 20% to 80% 1.6 ns fall time 3,4 measured between 80% to 20% 0.8 ns cycle-cycle jitter 3,4 loaded outputs 200 ps pll lock time 2 stable power supply, valid clock presented on xin / clkin pin 3 ms notes: 3. all parameters are specified with 10pf loaded outputs. 4. parameter is guaranteed by desig n and characterization. not 100% tested in production
may 2008 PCS3P73U00A rev 0.3 usb 2.0 peak emi reduction ic 5 of 13 notice: the information in this document is subject to change without notice. fig1: typical crystal interface circuit note: for ac coupled interface refer to application brief: ct100801 typical crystal specifications fundamental at cut parallel resonant crystal nominal frequency 48mhz frequency tolerance 50 ppm or better at 25c operating temperature range -25c to +85c storage temperature -40c to +85c load capacitance 18pf shunt capacitance 7pf maximum esr 25 ? r compliance the value of the compliance resistor , r compliance sets the usb2.0 signaling rate (frequency) deviation to 1000ppm peak-to-peak (+/-500ppm). it causes a -4db peak power emi reduction at the 480mhz fundamental usb2.0 frequency. higher harmonics are reduced more. if the r compliance is set to a lower value than its compliance limit, it will set the usb2.0 signaling rate (frequency) deviation to above 1000ppm peak-to-peak. for settings above 1000ppm the usb2.0 compliance pass/fail becomes gradually intermittent. usb2.0 functionality is maintained upto 3000ppm peak-to-peak signaling rate (frequency) deviation. the emi tradeoff in the system is attenuatio n/compliance. while fully functional (and compliant intermittent) the 2000ppm frequency deviation can provi de -7db of emi attenuation at the 480mhz fundamental. r1 = 510 ? c1 = 27 pf c2 = 27 pf cr y stal r
may 2008 PCS3P73U00A rev 0.3 usb 2.0 peak emi reduction ic 6 of 13 notice: the information in this document is subject to change without notice. deviation vs resistance (mr=0) 500 600 700 800 900 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 0 5 10 15 20 25 30 35 40 resistance (kohms) pk-pk deviation (ppm) 12mhz_fs=0 15mhz_fs=0 24mhz_fs=0 24mhz_fs=1 25mhz_fs=0 25mhz_fs=1 30mhz_fs=1 48mhz_fs=1 usb 2.0 compliance 480mhz fundamental frequency attenuation[db ] -4db -7db -2db deviation vs resistance (mr=1) 500 600 700 800 900 1000 1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 0 102030405060708090100 resistance (kohms) pk-pk deviation (ppm) 12mhz_fs=0 15mhz_fs=0 24mhz_fs=0 24mhz_fs=1 25mhz_fs=0 25mhz_fs=1 30mhz_fs=1 48mhz_fs=1 usb compliance 480mhz fundamental frequency attenuation[db ] -4db -7db -2db ssextr resistance table for usb2.0 compliance (r compliance ) vdd=3.3v; mr=0 frequency (mhz) fs (mhz) ssextr* resistance (k ? ) 12 0 10 15 0 8.87 0 6.81 24 1 13.7 0 6.98 25 1 13.7 30 1 12.1 48 1 10 vdd=3.3v; mr=1 frequency (mhz) fs (mhz) ssextr* resistance (k ? ) 12 0 17.8 15 0 13 0 6.49 24 1 39.2 0 6.49 25 1 35.7 30 1 29.4 48 1 19.1 vdd=2.5v; mr=0 frequency (mhz) fs (mhz) ssextr* resistance (k ? ) 12 0 10 15 0 8.87 24 1 13.7 25 1 13.7 30 1 12.1 48 1 10 vdd=2.5v; mr=1 frequency (mhz) fs (mhz) ssextr* resistance (k ? ) 12 0 17.8 15 0 13 24 1 39.2 25 1 35.7 30 1 29.4 48 1 19.1 fig2: deviation vsresistance for usb 2.0 com p liance ( mr=0 ) fig3: deviation vsresistance for usb 2.0 com p liance ( mr=1 ) note: * standard 1% tolerance resistors device to device variation of deviation is 10%
may 2008 PCS3P73U00A rev 0.3 usb 2.0 peak emi reduction ic 7 of 13 notice: the information in this document is subject to change without notice. fig4:eye diagram example (480mhz) computed from the usb-if test pattern during usb2.0 compliance verification of an existing host phy asic clocked at 48mhz by PCS3P73U00A.
may 2008 PCS3P73U00A rev 0.3 usb 2.0 peak emi reduction ic 8 of 13 notice: the information in this document is subject to change without notice. fig5: emi radiated emission test circuit (requires usb phy asic, not shown here) fig6: typical application circuit switching waveforms duty cycle timing output rise/fall time xin /clkin xtal c l c l p c s 3 p 7 3 u 0 0 a xin / clkin xout modout usb asic xout t 3 output 0v t 4 vdd 20% 80% 20% 80% t 2 t 1 v dd /2 v dd / 2 v dd / 2 output
may 2008 PCS3P73U00A rev 0.3 usb 2.0 peak emi reduction ic 9 of 13 notice: the information in this document is subject to change without notice. e h a a1 a2 d b c l e package information 8-lead tssop (4.40-mm body) dimensions inches millimeters symbol min max min max a 0.043 1.10 a1 0.002 0.006 0.05 0.15 a2 0.033 0.037 0.85 0.95 b 0.008 0.012 0.19 0.30 c 0.004 0.008 0.09 0.20 d 0.114 0.122 2.90 3.10 e 0.169 0.177 4.30 4.50 e 0.026 bsc 0.65 bsc h 0.252 bsc 6.40 bsc l 0.020 0.028 0.50 0.70 0 8 0 8
may 2008 PCS3P73U00A rev 0.3 usb 2.0 peak emi reduction ic 10 of 13 notice: the information in this document is subject to change without notice. 8-pin soic d e h d a1 a2 a l c b e dimensions inches millimeters symbol min max min max a1 0.004 0.010 0.10 0.25 a 0.053 0.069 1.35 1.75 a2 0.049 0.059 1.25 1.50 b 0.012 0.020 0.31 0.51 c 0.007 0.010 0.18 0.25 d 0.193 bsc 4.90 bsc e 0.154 bsc 3.91 bsc e 0.050 bsc 1.27 bsc h 0.236 bsc 6.00 bsc l 0.016 0.050 0.41 1.27 0 8 0 8
may 2008 PCS3P73U00A rev 0.3 usb 2.0 peak emi reduction ic 11 of 13 notice: the information in this document is subject to change without notice. tdfn col 2x2 8l package outline drawing dimensions inches millimeters symbol min max min max a 0.027 0.0315 0.70 0.80 a3 0.008 bsc 0.203 bsc b 0.008 0.012 0.20 0.30 d 0.079 bsc 2.00 bsc e 0.078 bsc 2.00 bsc e 0.020 bsc 0.50 bsc l 0.020 0.024 0.50 0.60
may 2008 PCS3P73U00A rev 0.3 usb 2.0 peak emi reduction ic 12 of 13 notice: the information in this document is subject to change without notice. ordering code part number marking package temperature PCS3P73U00Ag-08-sr 3p73u00ag 8- pin soic, tape & reel, green commercial PCS3P73U00Ag -08-st 3p73u00ag 8- pin soic, tube, green commercial PCS3P73U00Ag -08-tr 3p73u00ag 8- pin tssop, tape & reel, green commercial PCS3P73U00Ag -08-tt 3p73u00ag 8- pin tssop, tube, green commercial PCS3P73U00Ag -08-cr ag1ll 8- pin 2-mm tdfn, col-tape & reel, green commercial ll = 2 character lot # device ordering information PCS3P73U00Ag-08-st o = tsot23 u = msop j=tsot26 s = soic e = tqfp c=tdfn (2x2) col t = tssop l = lqfp a = ssop u = msop v = tvsop p = pdip b = bga d = qsop q = q fn x = sc-70 device pin count x= automotive i= industrial p or n/c = commercial (-40c to +125c) (-40c to +85c) (0c to +70c) 1 = reserved 6 = power management 2 = non pll based 7 = power management 3 = emi reduction 8 = power management 4 = ddr support products 9 = hi performance 5 = std zero delay buffer 0 = reserved pulsecore semiconductor mixed signal product part number f = lead free and rohs compliant part g = green package, lead free, and rohs r = tape & reel, t = tube or tray
may 2008 PCS3P73U00A rev 0.3 usb 2.0 peak emi reduction ic 13 of 13 notice: the information in this document is subject to change without notice. ? copyright 2006 pulsecore semiconductor cor poration. all rights reserved. our logo and name are trademarks or registered trade marks of pulsecore semiconductor. all other brand and product names may be the trademarks of their respective companies. pulsecore re serves the right to make changes to this document and its products at any time without notice. pulsecore assumes no responsibility for any errors that may appear in this document. the data c ontained herein represents pulsecore?s best dat a and/or estimates at the time of is suance. pulsecore reserves the right to change or correct this data at any time, without notice. if the product described herein is und er development, significant changes to these s pecifications are possible. the information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not int ended to operate as, or provide, any guarantee or warrantee to any user or customer. pulsecore does not assume any responsibility or liab ility arising out of the application or use of any product descri bed herein, and disclaims any express or implied warranties related to the sale and/or use of pulsecore produc ts including liability or warrant ies related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as express agree d to in pulsecore?s terms and conditions of sale (whi ch are available from pulsecore). all sale s of pulsecore products are made exclusi vely according to pulsecore?s terms and conditions of sale. the purc hase of products from pulsecor e does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or an y other intellectual property right s of pulsecore or third parti es. pulsecore does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may re asonably be expected to result in significant injury to the user, and the inclusion of pulsecore products in such life-supporting systems i mplies that the manufacturer assumes all risk of such use and agrees to indemni fy pulsecore against all claims arising from such use. pulsecore semiconductor corporation 1715 s. bascom ave suite 200 campbell, ca 95008 tel: 408-879-9077 fax: 408-879-9018 www.pulsecoresemi.com copyright ? pulsecore semiconductor all rights reserved part number: PCS3P73U00A document version: 0.3 note: this product utilizes us patent # 6,646,463 impedance emulator patent issued to pulsecore semiconductor, dated 11-11-2003 many pulsecore semiconductor products are pr otected by issued patents or by applications for patent

▲Up To Search▲

Price & Availability of PCS3P73U00A

	To Download PCS3P73U00A Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .