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1 LT1630/lt1631 sn16301 16301fs 30mhz, 10v/ m s, dual/quad rail-to-rail input and output precision op amps features n gain-bandwidth product: 30mhz n slew rate: 10v/ m s n low supply current per amplifier: 3.5ma n input common mode range includes both rails n output swings rail-to-rail n input offset voltage, rail-to-rail: 525 m v max n input offset current: 150na max n input bias current: 1000na max n open-loop gain: 1000v/mv min n low input noise voltage: 6nv/ ? hz typ n low distortion: C 91dbc at 100khz n wide supply range: 2.7v to 15v n large output drive current: 35ma min n dual in 8-pin pdip and so packages n quad in narrow 14-pin so package the lt ? 1630/lt1631 are dual/quad, rail-to-rail input and output op amps with a 30mhz gain-bandwidth product and a 10v/ m s slew rate. the LT1630/lt1631 have excellent dc precision over the full range of operation. input offset voltage is typically less than 150 m v and the minimum open-loop gain of one million into a 10k load virtually eliminates all gain error. to maximize common mode rejection, the LT1630/lt1631 employ a patented trim technique for both input stages, one at the negative supply and the other at the positive supply, that gives a typical cmrr of 106db over the full input range. the LT1630/lt1631 maintain their performance for sup- plies from 2.7v to 36v and are specified at 3v, 5v and 15v supplies. the inputs can be driven beyond the supplies without damage or phase reversal of the output. the output delivers load currents in excess of 35ma. the LT1630 is available in 8-pin pdip and so packages with the standard dual op amp pinout. the lt1631 features the standard quad op amp configuration and is available in a 14-pin plastic so package. these devices can be used as plug-in replacements for many standard op amps to improve input/output range and performance. descriptio n u , ltc and lt are registered trademarks of linear technology corporation. typical applicatio n u + 1/2 LT1630 2.32k v in v s /2 v out 1630/31 ta01 220pf 2.32k 6.65k + 1/2 LT1630 2.74k 22pf 470pf 5.62k 2.74k 47pf frequency (hz) 0.1k gain (db) 1k 10k 100k 1m 10m 1630/31 ta02 10 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 v s = 3v, 0v v in = 2.5v p-p frequency response single supply, 400khz, 4th order butterworth filter applicatio n s u n active filters n rail-to-rail buffer amplifiers n driving a/d converters n low voltage signal processing n battery-powered systems
2 LT1630/lt1631 sn16301 16301fs absolute m axi m u m ratings w ww u total supply voltage (v + to v C ) ............................. 36v input current ..................................................... 10ma output short-circuit duration (note 2) ........ continuous operating temperature range ............... C 40 c to 85 c specified temperature range (note 4) ... C 40 c to 85 c junction temperature .......................................... 150 c storage temperature range ................. C 65 c to 150 c lead temperature (soldering, 10 sec).................. 300 c electrical characteristics consult factory for military and industrial grade parts. package/order i n for m atio n w u u order part number LT1630cn8 LT1630cs8 LT1630in8 LT1630is8 order part number t jmax = 150 c, q ja = 150 c/ w t jmax = 150 c, q ja = 130 c/ w (n8) t jmax = 150 c, q ja = 190 c/ w (s8) lt1631cs lt1631is symbol parameter conditions min typ max units v os input offset voltage v cm = v + 150 525 m v v cm = v C 150 525 m v d v os input offset shift v cm = v C to v + 150 525 m v input offset voltage match (channel-to-channel) v cm = v C , v + (note 5) 200 950 m v i b input bias current v cm = v + 0 540 1000 na v cm = v C C1000 C 540 0 na d i b input bias current shift v cm = v C to v + 1080 2000 na input bias current match (channel-to-channel) v cm = v + (note 5) 25 300 na v cm = v C (note 5) 25 300 na i os input offset current v cm = v + 20 150 na v cm = v C 20 150 na d i os input offset current shift v cm = v C to v + 40 300 na input noise voltage 0.1hz to 10hz 300 nv p-p e n input noise voltage density f = 1khz 6 nv/ ? hz i n input noise current density f = 1khz 0.9 pa/ ? hz c in input capacitance 5pf a vol large-signal voltage gain v s = 5v, v o = 300mv to 4.7v, r l = 10k 500 3500 v/mv v s = 3v, v o = 300mv to 2.7v, r l = 10k 400 2000 v/mv s8 part marking 1 2 3 4 8 7 6 5 top view out a in a + in a v v + out b in b + in b s8 package 8-lead plastic so n8 package 8-lead pdip a b 1630 1630i top view s package 14-lead plastic so 1 2 3 4 5 6 7 14 13 12 11 10 9 8 outa in a + in a v + + in b in b out b out d in d + in d v + in c in c out c a d b c t a = 25 c, v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. (note 1)
3 LT1630/lt1631 sn16301 16301fs electrical characteristics t a = 25 c, v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. symbol parameter conditions min typ max units cmrr common mode rejection ratio v s = 5v, v cm = v C to v + 79 90 db v s = 3v, v cm = v C to v + 75 86 db cmrr match (channel-to-channel) (note 5) v s = 5v, v cm = v C to v + 72 96 db v s = 3v, v cm = v C to v + 67 88 db psrr power supply rejection ratio v s = 2.7v to 12v, v cm = v o = 0.5v 87 105 db psrr match (channel-to-channel) (note 5) v s = 2.7v to 12v, v cm = v o = 0.5v 80 107 db minimum supply voltage (note 9) v cm = v o = 0.5v 2.6 2.7 v v ol output voltage swing low (note 6) no load 14 30 mv i sink = 0.5ma 31 60 mv i sink = 25ma, v s = 5v 600 1200 mv i sink = 20ma, v s = 3v 500 1000 mv v oh output voltage swing high (note 6) no load 15 40 mv i source = 0.5ma 42 80 mv i source = 20ma, v s = 5v 900 1800 mv i source = 15ma, v s = 3v 680 1400 mv i sc short-circuit current v s = 5v 20 41 ma v s = 3v 15 30 ma i s supply current per amplifier 3.5 4.4 ma gbw gain-bandwidth product (note 7) f = 100khz 15 30 mhz sr slew rate (note 8) v s = 5v, a v = C 1, r l = open, v o = 4v 4.6 9.2 v/ m s v s = 3v, a v = C 1, r l = open 4.2 8.5 v/ m s t s settling time v s = 5v, a v = 1, r l = 1k, 520 ns 0.01%, v step = 2v symbol parameter conditions min typ max units v os input offset voltage v cm = v + C 0.1v l 175 700 m v v cm = v C + 0.2v l 175 700 m v v os tc input offset voltage drift (note 3) l 2.5 5.5 m v/ c v cm = v + C 0.1v l 1 3.5 m v/ c d v os input offset voltage shift v cm = v C + 0.2v to v + C 0.1v l 175 750 m v input offset voltage match (channel-to-channel) v cm = v C + 0.2v, v + C 0.1v (note 5) l 200 1200 m v i b input bias current v cm = v + C 0.1v l 0 585 1100 na v cm = v C + 0.2v l C 1100 C 585 0 na d i b input bias current shift v cm = v C + 0.2v to v + C 0.1v l 1170 2200 na input bias current match (channel-to-channel) v cm = v + C 0.1v (note 5) l 25 340 na v cm = v C + 0.2v (note 5) l 25 340 na i os input offset current v cm = v + C 0.1v l 20 170 na v cm = v C + 0.2v l 20 170 na d i os input offset current shift v cm = v C + 0.2v to v + C 0.1v l 40 340 na a vol large-signal voltage gain v s = 5v, v o = 300mv to 4.7v, r l = 10k l 450 3500 v/mv v s = 3v, v o = 300mv to 2.7v, r l = 10k l 350 2000 v/mv cmrr common mode rejection ratio v s = 5v, v cm = v C + 0.2v to v + C 0.1v l 75 89 db v s = 3v, v cm = v C + 0.2v to v + C 0.1v l 71 83 db cmrr match (channel-to-channel) (note 5) v s = 5v, v cm = v C + 0.2v to v + C 0.1v l 70 90 db v s = 3v, v cm = v C + 0.2v to v + C 0.1v l 65 85 db 0 c < t a < 70 c, v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted.
4 LT1630/lt1631 sn16301 16301fs electrical characteristics symbol parameter conditions min typ max units psrr power supply rejection ratio v s = 3v to 12v, v cm = v o = 0.5v l 82 101 db psrr match (channel-to-channel) (note 5) v s = 3v to 12v, v cm = v o = 0.5v l 78 102 db minimum supply voltage (note 9) v cm = v o = 0.5v l 2.6 2.7 v v ol output voltage swing low (note 6) no load l 17 40 mv i sink = 0.5ma l 36 80 mv i sink = 25ma, v s = 5v l 700 1400 mv i sink = 20ma, v s = 3v l 560 1200 mv v oh output voltage swing high (note 6) no load l 16 40 mv i source = 0.5ma l 50 100 mv i source = 15ma, v s = 5v l 820 1600 mv i source = 10ma, v s = 3v l 550 1100 mv i sc short-circuit current v s = 5v l 18 36 ma v s = 3v l 13 25 ma i s supply current per amplifier l 4.0 5.1 ma gbw gain-bandwidth product (note 7) f = 100khz l 14 28 mhz sr slew rate (note 8) v s = 5v, a v = C 1, r l = open, v o = 4v l 4.2 8.3 v/ m s v s = 3v, a v = C 1, r l = open l 3.9 7.7 v/ m s 0 c < t a < 70 c, v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. symbol parameter conditions min typ max units v os input offset voltage v cm = v + C 0.1v l 250 775 m v v cm = v C + 0.2v l 250 775 m v v os tc input offset voltage drift (note 3) l 2.5 5.5 m v/ c v cm = v + C 0.1v l 1 3.5 m v/ c d v os input offset voltage shift v cm = v C + 0.2v to v + C 0.1v l 200 750 m v input offset voltage match (channel-to-channel) v cm = v C + 0.2v, v + (note 5) l 210 1500 m v i b input bias current v cm = v + C 0.1v l 0 650 1300 na v cm = v C + 0.2v l C 1300 C 650 0 na d i b input bias current shift v cm = v C + 0.2v to v + C 0.1v l 1300 2600 na input bias current match (channel-to-channel) v cm = v + C 0.1v (note 5) l 25 390 na v cm = v C + 0.2v (note 5) l 25 390 na i os input offset current v cm = v + C 0.1v l 25 195 na v cm = v C + 0.2v l 25 195 na d i os input offset current shift v cm = v C + 0.2v to v + C 0.1v l 50 390 na a vol large-signal voltage gain v s = 5v, v o = 300mv to 4.7v, r l = 10k l 400 3500 v/mv v s = 3v, v o = 300mv to 2.7v, r l = 10k l 300 1800 v/mv cmrr common mode rejection ratio v s = 5v, v cm = v C + 0.2v to v + C 0.1v l 75 87 db v s = 3v, v cm = v C + 0.2v to v + C 0.1v l 71 83 db cmrr match (channel-to-channel) (note 5) v s = 5v, v cm = v C + 0.2v to v + C 0.1v l 69 89 db v s = 3v, v cm = v C + 0.2v to v + C 0.1v l 65 85 db psrr power supply rejection ratio v s = 3v to 12v, v cm = v o = 0.5v l 82 98 db psrr match (channel-to-channel) (note 5) v s = 3v to 12v, v cm = v o = 0.5v l 78 102 db minimum supply voltage (note 9) v cm = v o = 0.5v l 2.6 2.7 v v ol output voltage swing low (note 6) no load l 18 40 mv i sink = 0.5ma l 38 80 mv i sink = 25ma, v s = 5v l 730 1500 mv i sink = 20ma, v s = 3v l 580 1200 mv C40 c < t a < 85 c, v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. (note 4)
5 LT1630/lt1631 sn16301 16301fs electrical characteristics C40 c < t a < 85 c, v s = 5v, 0v; v s = 3v, 0v; v cm = v out = half supply, unless otherwise noted. (note 4) symbol parameter conditions min typ max units v oh output voltage swing high (note 6) no load l 15 40 mv i source = 0.5ma l 55 110 mv i source = 15ma, v s = 5v l 860 1700 mv i source = 10ma, v s = 3v l 580 1200 mv i sc short-circuit current v s = 5v l 17 34 ma v s = 3v l 12 24 ma i s supply current per amplifier l 4.1 5.2 ma gbw gain-bandwidth product (note 7) f = 100khz l 14 28 mhz sr slew rate (note 8) v s = 5v, a v = C1, r l = open, v o = 4v l 3.5 7 v/ m s v s = 3v, a v = C1, r l = open l 3.3 6.5 v/ m s symbol parameter conditions min typ max units v os input offset voltage v cm = v + 220 1000 m v v cm = v C 220 1000 m v d v os input offset voltage shift v cm = v C to v + 150 1000 m v input offset voltage match (channel-to-channel) v cm = v C , v + (note 5) 200 1500 m v i b input bias current v cm = v + 0 550 1100 na v cm = v C C 1100 C 550 0 na d i b input bias current shift v cm = v C to v + 1100 2200 na input bias current match (channel-to-channel) v cm = v + (note 5) 20 300 na v cm = v C (note 5) 20 300 na i os input offset current v cm = v + 20 150 na v cm = v C 20 150 na d i os input offset current shift v cm = v C to v + 40 300 na input noise voltage 0.1hz to 10hz 300 nv p-p e n input noise voltage density f = 1khz 6 nv/ ? hz i n input noise current density f = 1khz 0.9 pa/ ? hz c in input capacitance f = 100khz 3 pf a vol large-signal voltage gain v o = C 14.5v to 14.5v, r l = 10k 1000 5000 v/mv v o = C 10v to 10v, r l = 2k 650 3500 v/mv channel separation v o = C 10v to 10v, r l = 2k 112 134 db cmrr common mode rejection ratio v cm = v C to v + 89 106 db cmrr match (channel-to-channel) (note 5) v cm = v C to v + 86 110 db psrr power supply rejection ratio v s = 5v to 15v 87 105 db psrr match (channel-to-channel) (note 5) v s = 5v to 15v 82 107 db v ol output voltage swing low (note 6) no load 16 35 mv i sink = 5ma 150 300 mv i sink = 25ma 600 1200 mv v oh output voltage swing high (note 6) no load 15 40 mv i source = 5ma 250 500 mv i source = 25ma 1200 2400 mv t a = 25 c, v s = 15v, v cm = 0v, v out = 0v, unless otherwise noted.
6 LT1630/lt1631 sn16301 16301fs electrical characteristics t a = 25 c, v s = 15v, v cm = 0v, v out = 0v, unless otherwise noted. 0 c < t a < 70 c, v s = 15v, v cm = 0v, v out = 0v, unless otherwise noted. symbol parameter conditions min typ max units i sc short-circuit current 35 70 ma i s supply current per amplifier 4.1 5.0 ma gbw gain-bandwidth product (note 7) f = 100khz 15 30 mhz sr slew rate a v = C 1, r l = open, v o = 10v, 5 10 v/ m s measure at v o = 5v t s settling time 0.01%, v step = 10v, a v = 1, r l = 1k 1.2 m s symbol parameter conditions min typ max units v os input offset voltage v cm = v + C 0.1v l 300 1250 m v v cm = v C + 0.2v l 300 1250 m v v os tc input offset voltage drift (note 3) l 4.5 7 m v/ c v cm = v + C 0.1v l 1.5 4 m v/ c d v os input offset voltage shift v cm = v C + 0.2v to v + C 0.1v l 180 1100 m v input offset voltage match (channel-to-channel) v cm = v C + 0.2v, v + C 0.1v (note 5) l 300 2000 m v i b input bias current v cm = v + C 0.1v l 0 600 1200 na v cm = v C + 0.2v l C 1200 C 600 0 na d i b input bias current shift v cm = v C + 0.2v to v + C 0.1v l 1200 2400 na input bias current match (channel-to-channel) v cm = v + C 0.1v (note 5) l 30 350 na v cm = v C + 0.2v (note 5) l 30 350 na i os input offset current v cm = v + C 0.1v l 25 175 na v cm = v C + 0.2v l 25 175 na d i os input offset current shift v cm = v C + 0.2v to v + C 0.1v l 50 350 na a vol large-signal voltage gain v o = C 14.5v to 14.5v, r l = 10k l 900 6000 v/mv v o = C 10v to 10v, r l = 2k l 600 4000 v/mv channel separation v o = C 10v to 10v, r l = 2k l 112 132 db cmrr common mode rejection ratio v cm = v C + 0.2v to v + C 0.1v l 88 104 db cmrr match (channel-to-channel) (note 5) v cm = v C + 0.2v to v + C 0.1v l 84 104 db psrr power supply rejection ratio v s = 5v to 15v l 86 100 db psrr match (channel-to-channel) (note 5) v s = 5v to 15v l 80 104 db v ol output voltage swing low (note 6) no load l 19 45 mv i sink = 5ma l 175 350 mv i sink = 25ma l 670 1400 mv v oh output voltage swing high (note 6) no load l 15 40 mv i source = 5ma l 300 600 mv i source = 25ma l 1400 2800 mv i sc short-circuit current l 28 57 ma i s supply current per amplifier l 4.6 5.6 ma gbw gain-bandwidth product (note 7) f = 100khz l 14 28 mhz sr slew rate a v = C 1, r l = open, v o = 10v, l 4.5 9 v/ m s measured at v o = 5v
7 LT1630/lt1631 sn16301 16301fs electrical characteristics C40 c < t a < 85 c, v s = 15v, v cm = 0v, v out = 0v, unless otherwise noted. (note 4) symbol parameter conditions min typ max units v os input offset voltage v cm = v + C 0.1v l 350 1400 m v v cm = v C + 0.2v l 350 1400 m v v os tc input offset voltage drift (note 3) l 4.5 7 m v/ c v cm = v + C 0.1v l 1.5 4 m v/ c d v os input offset voltage shift v cm = v C + 0.2v to v + C 0.1v l 180 1200 m v input offset voltage match (channel-to-channel) v cm = v C + 0.2v, v + C 0.1v (note 5) l 350 2200 m v i b input bias current v cm = v + C 0.1v l 0 690 1400 na v cm = v C + 0.2v l C 1400 C 690 0 na d i b input bias current shift v cm = v C + 0.2v to v + C 0.1v l 1380 2800 na input bias current match (channel-to-channel) v cm = v + C 0.1v (note 5) l 30 420 na v cm = v C + 0.2v (note 5) l 30 420 na i os input offset current v cm = v + C 0.1v l 30 210 na v cm = v C + 0.2v l 30 210 na d i os input offset current shift v cm = v C + 0.2v to v + C 0.1v l 60 420 na a vol large-signal voltage gain v o = C 14.5v to 14.5v, r l = 10k l 700 6000 v/mv v o = C 10v to 10v, r l = 2k l 400 4000 v/mv channel separation v o = C 10v to 10v, r l = 2k l 112 132 db cmrr common mode rejection ratio v cm = v C + 0.2v to v + C 0.1v l 87 104 db cmrr match (channel-to-channel) (note 5) v cm = v C + 0.2v to v + C 0.1v l 84 104 db psrr power supply rejection ratio v s = 5v to 15v l 84 100 db psrr match (channel-to-channel) (note 5) v s = 5v to 15v l 80 100 db v ol output voltage swing low (note 6) no load l 22 50 mv i sink = 5ma l 180 350 mv i sink = 25ma l 700 1400 mv v oh output voltage swing high (note 6) no load l 15 40 mv i source = 5ma l 300 600 mv i source = 25ma l 1500 3000 mv i sc short-circuit current l 27 54 ma i s supply current per amplifier l 4.8 5.9 ma gbw gain-bandwidth product (note 7) f = 100khz l 14 27 mhz sr slew rate a v = C 1, r l = open, v o = 10v, l 4.2 8.5 v/ m s measure at v o = 5v note 5: matching parameters are the difference between amplifiers a and d and between b and c on the lt1631; between the two amplifiers on the LT1630. note 6: output voltage swings are measured between the output and power supply rails. note 7: v s = 3v, v s = 15v gbw limit guaranteed by correlation to 5v tests. note 8: v s = 3v, v s = 5v slew rate limit guaranteed by correlation to 15v tests. note 9: minimum supply voltage is guaranteed by testing the change of v os to be less than 250 m v when the supply voltage is varied from 3v to 2.7v. the l denotes specifications that apply over the full operating temperature range. note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: a heat sink may be required to keep the junction temperature below the absolute maximum rating when the output is shorted indefinitely. note 3: this parameter is not 100% tested. note 4: the LT1630c/lt1631c are guaranteed to meet specified performance from 0 c to 70 c and are designed, characterized and expected to meet these extended temperature limits, but are not tested at C40 c and 85 c. guaranteed i grade parts are available, consult factory.
8 LT1630/lt1631 sn16301 16301fs typical perfor m a n ce characteristics u w input bias current vs common mode voltage input offset voltage ( v) 500 percent of units (%) 50 40 30 20 10 0 300 1630/31 g34 300 100 100 500 v s = 5v, 0v supply current vs supply voltage input bias current vs temperature v os distribution, v cm = 0v (pnp stage) input offset voltage ( v) 500 percent of units (%) 50 40 30 20 10 0 300 1630/31 g32 300 100 100 500 v s = 5v, 0v v cm = 0v input offset voltage ( v) 500 percent of units (%) 50 40 30 20 10 0 300 1630/31 g33 300 100 100 500 v s = 5v, 0v v cm = 5v d v os shift for v cm = 0v to 5v v os distribution, v cm = 5v (npn stage) total supply votage (v) 04 supply current per amplifier (ma) 36 1630/31 g01 812 16 20 24 28 32 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 t a = 125 c t a = 55 c t a = 25 c temperature ( c) ?5 supply current per amplifier (ma) 0 1630/31 g02 50 ?5 25 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 50 75 125 100 v s = 15v v s = 5v, 0v supply current vs temperature common mode voltage (v) ? input bias current (na) 23456 1630/31 g03 ? 0 1 600 400 200 0 200 400 600 800 ?000 t a = 125 c v s = 5v, 0v t a = 25 c t a = 55 c temperature ( c) ?0 input bias current ( a) 1.0 0.8 0.6 0.4 0.2 0 0.2 0.4 0.6 0.8 1.0 70 1630/31 g04 ?0 10 40 ?5 85 ? 25 55 100 v s = 5v, 0v v cm = 0v v s = 15v v cm = 15v v s = 15v v cm = 15v v s = 5v, 0v v cm = 5v output saturation voltage vs load current (output low) load current (ma) saturation voltage (v) 0.01 1 10 100 1630/31 g05 0.1 10 1 0.1 0.01 v s = 5v, 0v t a = 55 c t a = 125 c t a = 25 c load current (ma) saturation voltage (v) 0.01 1 10 100 1630/31 g06 0.1 10 1 0.1 0.01 v s = 5v, 0v t a = 55 c t a = 125 c t a = 25 c output saturation voltage vs load current (output high)
9 LT1630/lt1631 sn16301 16301fs typical perfor m a n ce characteristics u w total supply voltage (v) 1 0 change in offset voltage ( m v) 50 100 150 200 23 4 5 1630/31 g07 250 300 t a = 125 c t a = 55 c t a = 25 c minimum supply voltage noise voltage spectrum frequency (hz) 1 noise voltage (nv/ ? hz) 10 100 1000 11630/31 g09 35 30 25 20 15 10 5 0 v s = 5v, 0v v cm = 2.5v pnp active v cm = 4.25v npn active frequency (hz) 1 4 current noise (pa/ ? hz) 5 6 7 8 10 100 1000 1630/31 g10 3 2 1 0 9 10 v s = 5v, 0v v cm = 2.5v pnp active v cm = 4.25v npn active current noise spectrum 0.1hz to 10hz output voltage noise time (1s/div) output voltage (200nv/div) 1630/31 g25 v s =5v, 0v v cm = v s /2 total supply voltage (v) 0 gain bandwidth (mhz) phase margin (deg) 5 10 15 20 1630/31 g14 25 50 45 40 35 30 25 20 15 10 5 0 100 90 80 70 60 50 40 30 20 10 0 30 phase margin gain bandwidth v cm = v s /2 gain bandwidth and phase margin vs supply voltage gain and phase vs frequency frequency (mhz) voltage gain (db) phase shift (deg) 80 70 60 50 40 30 20 10 0 ?0 ?0 180 135 90 45 0 ?5 ?0 135 180 225 270 0.01 1 10 100 1630/31 g11 0.1 phase gain r l = 1k v s = 3v, 0v v s = 15v frequency (hz) 40 common mode rejection ratio (db) 60 80 70 100 120 30 50 90 110 1k 100k 1m 10m 1630/31 g12 20 10k v s = 15v v s = 5v, 0v cmrr vs frequency psrr vs frequency frequency (hz) power supply rejection ratio (db) 100 90 80 70 60 50 40 30 20 10 0 1k 100k 1m 10m 1630/31 g13 10k v s = 15v positive supply negative supply frequency (hz) 10 channel separation (db) 100 1k 10k 100k 1m 1630/31 g15 ?0 ?0 ?0 ?0 ?0 ?0 100 110 120 130 140 channel separation vs frequency
10 LT1630/lt1631 sn16301 16301fs typical perfor m a n ce characteristics u w output voltage (v) 0 input voltage ( m v) 3 5 1630/31 g20 12 4 8 6 4 2 0 ? ? ? ? 6 v s = 5v, 0v r l = 1k r l = 10k open-loop gain output voltage (v) ?0 15 input voltage ( m v) 0 10 20 1630/31 g19 ?0 ?0 ?0 5 05 10 15 20 ? 5 ?5 15 v s = 15v r l = 1k r l = 10k open-loop gain time after power-up (sec) 0 change in offset voltage ( m v) 40 0 ?0 ?0 120 160 200 60 100 160 1630/31 g22 20 40 80 120 140 s8 package v s = 15v lt1631cs v s = 15v n8 package v s = 5v, 0v n8 package v s = 15v s8 package v s = 5v, 0v lt1631cs v s = 5v, 0v warm-up drift vs time output voltage (v) ? ? ? ? ? input voltage ( v) 200 150 100 50 0 ?0 100 150 200 3 1630/31 g21 1 0246 57 v s = 15v r l = 100 open-loop gain capacitive load (pf) 1 overshoot (%) 10 100 1000 1630/31 g16 60 50 40 30 20 10 0 v s = 5v, 0v a v = 1 r l = 1k capacitive load handling total supply voltage (v) 0 slew rate (v/ s) 8122028 416 24 32 1630/31 g17 14 13 12 11 10 9 8 rising edge falling edge v out = 80% of v s a v = 1 slew rate vs supply voltage output step vs settling time to 0.01% maximum undistorted output signal vs frequency frequency (khz) 1 output voltage swing (v p-p ) 10 100 1000 1630/31 g24 5 4 3 2 1 0 v s = 5v, 0v a v = 1 v s = 5v, 0v a v = 1 frequency (khz) thd + noise (%) 1 0.1 0.01 0.001 0.0001 0.1 10 100 163031 g23 1 v in = 2v p-p r l = 10k v s = 3v, 0v a v = 1 v s = 5v, 0v a v = 1 v s = 5v, 0v and 3v, 0v a v = 1 total harmonic distortion + noise vs frequency settling time ( m s) 0 0.25 ?0 output step (v) ? ? ? 0 10 4 0.50 0.75 1.00 1630/31 g18 ? 6 8 2 1.25 1.50 v s = 15v noninverting inverting inverting noninverting
11 LT1630/lt1631 sn16301 16301fs typical perfor m a n ce characteristics u w harmonic distortion vs frequency frequency (khz) 100 harmonic distortion (dbc) 0 ?0 ?0 ?0 ?0 100 1000 1630/31 g30 1000 200 500 3rd 2nd 2nd 3rd v s = 5v, 0v a v = 1 v in = 2v p-p r l = 150 r l = 1k harmonic distortion vs frequency 5v large-signal response 1630/31 g27 v s = 5v, 0v a v = 1 r l = 1k 5v small-signal response 1630/31 g26 v s = 5v, 0v a v = 1 r l = 1k frequency (khz) 100 harmonic distortion (dbc) 0 ?0 ?0 ?0 ?0 100 1000 1630/31 g31 1000 200 500 3rd 2nd 3rd v s = 5v, 0v a v = 1 v in = 2v p-p r l = 150 r l = 1k 2nd 15v small-signal response v s = 15v a v = 1 r l = 1k 15v large-signal response 1630/31 g29 v s = 15v a v = 1 r l = 1k 1630/31 g28 applicatio n s i n for m atio n wu u u rail-to-rail input and output the LT1630/lt1631 are fully functional for an input and output signal range from the negative supply to the posi- tive supply. figure 1 shows a simplified schematic of the amplifier. the input stage consists of two differential amplifiers, a pnp stage q1/q2 and an npn stage q3/q4 that are active over different ranges of input common mode voltage. the pnp differential input pair is active for input common mode voltages v cm between the negative supply to approximately 1.4v below the positive supply. as v cm moves closer toward the positive supply, the transistor q5 will steer the tail current i 1 to the current mirror q6/q7, activating the npn differential pair and the pnp pair becomes inactive for the rest of the input com- mon mode range up to the positive supply. the output is configured with a pair of complementary common emitter stages q14/q15 that enables the output to swing from rail to rail. these devices are fabricated on linear technologys proprietary complementary bipolar process to ensure similar dc and ac characteristics. capacitors c1 and c2 form local feedback loops that lower the output impedance at high frequencies.
12 LT1630/lt1631 sn16301 16301fs applicatio n s i n for m atio n wu u u q4 q6 v bias d6 d5 +in d2 q3 q7 q1 i 1 i 2 + + q9 q2 d4 d1 d3 ?n out v v + q5 q12 q8 q14 1630/31 f01 c1 r1 r6 225 r7 225 r3 v c c r4 r5 c2 r2 q11 q13 q15 buffer and output bias figure 1. LT1630 simplified schematic diagram power dissipation the LT1630/lt1631 amplifiers combine high speed and large output current drive in a small package. because the amplifiers operate over a very wide supply range, it is possible to exceed the maximum junction temperature of 150 c in plastic packages under certain conditions. junc- tion temperature t j is calculated from the ambient tem- perature t a and power dissipation p d as follows: LT1630cn8: t j = t a + (p d ? 130 c/w) LT1630cs8: t j = t a + (p d ? 190 c/w) lt1631cs: t j = t a + (p d ? 150 c/w) the power dissipation in the ic is the function of the supply voltage, output voltage and load resistance. for a given supply voltage, the worst-case power dissipation p dmax occurs at the maximum supply current and when the output voltage is at half of either supply voltage (or the maximum swing if less than 1/2 supply voltage). there- fore p dmax is given by: p dmax = (v s ? i smax ) + (v s /2) 2 /r l to ensure that the LT1630/lt1631 are used properly, calculate the worst-case power dissipation, get the ther- mal resistance for a chosen package and its maximum junction temperature to derive the maximum ambient temperature. example: an LT1630cs8 operating on 15v supplies and driving a 500 w , the worst-case power dissipation per amplifier is given by: p dmax = (30v ? 4.75ma) + (15v C 7.5v)(7.5/500) = 0.143 + 0.113 = 0.256w if both amplifiers are loaded simultaneously, then the total power dissipation is 0.512w. the so-8 package has a junction-to-ambient thermal resistance of 190 c/w in still air. therefore, the maximum ambient temperature that the part is allowed to operate is: t a = t j C (p dmax ? 190 c/w) t a = 150 c C (0.512w ? 190 c/w) = 53 c for a higher operating temperature, lower the supply voltage or use the dip package part.
13 LT1630/lt1631 sn16301 16301fs applicatio n s i n for m atio n wu u u input offset voltage the offset voltage changes depending upon which input stage is active, and the maximum offset voltages are trimmed to less than 525 m v. to maintain the precision characteristics of the amplifier, the change of v os over the entire input common mode range (cmrr) is guaranteed to be less than 525 m v on a single 5v supply. input bias current the input bias current polarity depends on the input common mode voltage. when the pnp differential pair is active, the input bias currents flow out of the input pins. they flow in the opposite direction when the npn input stage is active. the offset voltage error due to input bias currents can be minimized by equalizing the noninverting and inverting input source impedance. output the outputs of the LT1630/lt1631 can deliver large load currents; the short-circuit current limit is 70ma. take care to keep the junction temperature of the ic below the absolute maximum rating of 150 c (refer to the power dissipation section). the output of these amplifiers have reverse-biased diodes to each supply. if the output is forced beyond either supply, unlimited current will flow through these diodes. if the current is transient and limited to several hundred ma, no damage to the part will occur. overdrive protection to prevent the output from reversing polarity when the input voltage exceeds the power supplies, two pairs of crossing diodes d1 to d4 are employed. when the input voltage exceeds either power supply by approximately 700mv, d1/d2 or d3/d4 will turn on, forcing the output to the proper polarity. for this phase reversal protection to work properly, the input current must be limited to less than 5ma. if the amplifier is to be severely overdriven, an external resistor should be used to limit the overdrive current. the LT1630/lt1631s input stages are protected against large differential input voltages by a pair of back-to-back diodes d5/d6. when a differential voltage of more than 0.7v is applied to the inputs, these diodes will turn on, preventing the emitter-base breakdown of the input transistors. the current in d5/d6 should be limited to less than 10ma. internal 225 w resistors r6 and r7 will limit the input current for differential input signals of 4.5v or less. for larger input levels, a resistor in series with either or both inputs should be used to limit the current. worst-case differential input voltage usually occurs when the output is shorted to ground. in addition, the amplifier is protected against esd strikes up to 3kv on all pins. capacitive load the LT1630/lt1631 are wideband amplifiers that can drive capacitive loads up to 200pf on 15v supplies in a unity-gain configuration. on a 3v supply, the capacitive load should be kept to less than 100pf. when there is a need to drive larger capacitive loads, a resistor of 20 w to 50 w should be connected between the output and the capacitive load. the feedback should still be taken from the output so that the resistor isolates the capacitive load to ensure stability. feedback components the low input bias currents of the LT1630/lt1631 make it possible to use the high value feedback resistors to set the gain. however, care must be taken to ensure that the pole formed by the feedback resistors and the total capacitance at the inverting input does not degrade stability. for instance, the LT1630/lt1631 in a noninverting gain of 2, set with two 20k resistors, will probably oscillate with 10pf total input capacitance (5pf input capacitance and 5pf board capacitance). the amplifier has a 5mhz cross- ing frequency and a 52 phase margin at 6db of gain. the feedback resistors and the total input capacitance form a pole at 1.6mhz that induces a phase shift of 72 at 5mhz! the solution is simple: either lower the value of the resistors or add a feedback capacitor of 10pf or more.
14 LT1630/lt1631 sn16301 16301fs typical applicatio n s u figure 2. single supply, 40db gain instrumentation amplifier v vr rr v a odc v () . = ()( ) + = = 511 11 10 25 2 f khz f rc o o = = 98 1 2 p + a2 1/2 LT1630 v in v out 1630/31 f04 5v 5v r2 1k r9 1k r8 5k r11 10k r10 10k r6 1k r1 500 r5 1k r7 1k r 1.62k r 1.62k c 1000pf c 1000pf + a1 1/2 LT1630 c2 4.7 f c5 4.7 f c1 2.2 f + 1/2 LT1630 v in v in + out1 v out 1630/31 f02 r1 20k r2 2k r4 20k r5 432 r3 2k + 1/2 LT1630 v s lower limi v a r r v v a r r vv out v out v s t common mode input voltage v upper limit common mode input voltage v where v is the supply voltage cml cmh s = ? ? ? ? + ? ? = ? ? ? ? +- () ? ? 2 5 01 10 11 2 5 015 10 11 . . . . . . bw khz a r r r r rr r vvva v out in in v = =++ + ? ? ? ? = =- ? ? ? ? +- 355 4 3 1 2 1 32 5 100 single supply, 40db gain, 350khz instrumentation amplifier an instrumentation amplifier with a rail-to-rail output swing, operating from a 3v supply can be constructed with the LT1630 as shown in figure 2. the amplifier has a nominal gain of 100, which can be adjusted with resistor r5. the dc output level is set by the difference of the two inputs multiplied by the gain of 100. common mode range can be calculated by the equations shown with figure 2. for example, the common mode range is from 0.15v to 2.65v if the output is set at one half of the 3v supply. the common mode rejection is greater than 110db at 100hz when trimmed with resistor r1. the amplifier has a bandwidth of 355khz as shown in figure 3. figure 3. frequency response frequency (hz) voltage gain (db) 50 40 30 20 10 0 ?0 ?0 ?0 ?0 ?0 ?0 ?0 100 10k 100k 10m 1630/31 f03 1k 1m common mode input differential input v s = 3v a v = 100 figure 5. frequency response frequency (khz) 40 20 0 ?0 ?0 gain (v out /v in )(db) 13630/31 f05 0 20 40 60 140 160 180 200 80 100 120 increasing r8 decreasing r8 figure 4. tunable q notch filter tunable q notch filter a single supply, tunable q notch filter as shown in figure 4 is built with LT1630 to maximize the output swing. the filter has a gain of 2, and the notch frequency (f o ) is set by the values of r and c. the resistors r10 and r11 set up the dc level at the output. the q factor can be adjusted by varying the value of r8. the higher value of r8 will decrease q as depicted in figure 5, because the output induces less of feedback to amplifier a2. the value of r7 should be equal or greater than r9 to prevent oscillation. if r8 is a short and r9 is larger than r7, then the positive feedback from the output will create phase inversion at the output of amplifier a2, which will lead to oscillation.
15 LT1630/lt1631 sn16301 16301fs information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. dimensions in inches (millimeters) unless otherwise noted. package descriptio n u n8 package 8-lead pdip (narrow 0.300) (ltc dwg # 05-08-1510) 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) s14 0695 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 14 13 0.337 ?0.344* (8.560 ?8.738) 0.228 ?0.244 (5.791 ?6.197) 12 11 10 9 5 6 7 8 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * ** n8 1197 0.009 ?0.015 (0.229 ?0.381) 0.300 ?0.325 (7.620 ?8.255) 0.325 +0.035 0.015 +0.889 0.381 8.255 () 0.100 0.010 (2.540 0.254) 0.065 (1.651) typ 0.045 ?0.065 (1.143 ?1.651) 0.130 0.005 (3.302 0.127) 0.020 (0.508) min 0.018 0.003 (0.457 0.076) 0.125 (3.175) min 12 3 4 87 6 5 0.255 0.015* (6.477 0.381) 0.400* (10.160) max *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.254mm) s package 14-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) s8 package 8-lead plastic small outline (narrow 0.150) (ltc dwg # 05-08-1610) so8 0996 0.016 ?0.050 0.406 ?1.270 0.010 ?0.020 (0.254 ?0.508) 45 0 ?8 typ 0.008 ?0.010 (0.203 ?0.254) 0.053 ?0.069 (1.346 ?1.752) 0.014 ?0.019 (0.355 ?0.483) 0.004 ?0.010 (0.101 ?0.254) 0.050 (1.270) typ 1 2 3 4 0.150 ?0.157** (3.810 ?3.988) 8 7 6 5 0.189 ?0.197* (4.801 ?5.004) 0.228 ?0.244 (5.791 ?6.197) dimension does not include mold flash. mold flash shall not exceed 0.006" (0.152mm) per side dimension does not include interlead flash. interlead flash shall not exceed 0.010" (0.254mm) per side * **
16 LT1630/lt1631 sn16301 16301fs lt/tp 0998 4k ? printed in usa ? linear technology corporation 1998 typical applicatio n s u rf amplifier control biasing and dc restoration taking advantage of the rail-to-rail input and output, and the large output current capability of the LT1630, the circuit, shown in figure 6, provides precise bias currents for the rf amplifiers and restores dc output level. to ensure optimum performance of an rf amplifier, its bias point must be accurate and stable over the operating temperature range. the op amp a1 combined with q1, q2, r1, r2 and r3 establishes two current sources of 21.5ma to bias rf1 and rf2 amplifiers. the current of q1 is determined by the voltage across r2 over r1, which is replicated in q2. these current sources are stable and precise over temperature and have a low dissipated power due to a low voltage drop between their terminals. the amplifier a2 is used to restore the dc level at the output. with a large output current of the LT1630, the output can be set at 1.5vdc on 5v supply and 50 w load. this circuit has a 3db bandwidth from 2mhz to 2ghz and a power gain of 25db. linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com + a1 1/2 LT1630 v out 1630/31 f06 5v 5v hp-msa0785 hp-msa0785 r3 10k l1 220 h c5 0.01 f l2 220 h q1 2n3906 q2 2n3906 c6 0.01 f r5 50 r1 10 r2 453 r4 10 c3 1500pf + a2 1/2 LT1630 c4 1500pf c2 1500pf c1 0.01 f v in l4 3.9 h l3 3.9 h + + + rf1 rf2 figure 6. rf amplifier control biasing and dc restoration related parts part number descripton comments lt1211/lt1212 dual/quad 14mhz, 7v/ m s, single supply precision op amps input common mode includes ground, 275 m v v os(max) , 6 m v/ c max drift, max supply current 1.8ma per op amp lt1213/lt1214 dual/quad 28mhz, 12v/ m s, single supply precision op amps input common mode includes ground, 275 m v v os(max) , 6 m v/ c max drift, max supply current 3.5ma per op amp lt1215/lt1216 dual/quad 23mhz, 50v/ m s, single supply precision op amps input common mode includes ground, 450 m v v os(max) , 6 m v/ c max drift, max supply current 6.6ma per op amp lt1498/lt1499 dual/quad 10mhz, 6v/ m s rail-to-rail input and output high dc accuracy, 475 m v v os(max) , 4 m v/ c max drift, c-load tm op amps max supply current 2.2ma per amp lt1632/lt1633 dual/quad 45mhz, 45v/ m s rail-to-rail input and output op amps high dc accuracy, 1.35mv v os(max) , 70ma output current, max supply current 5.2ma per amp c-load is a trademark of linear technology corporation.

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