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? e97944-te sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. absolute maximum ratings (ta = 25 ?) supply voltage v cc 1,v cc 2 ?.3 to +5.5 v v cc 3 ?.3 to +10.0 v storage temperature tstg ?5 to +150 ? allowable power dissipation p d 880 mw (when mounted on a substrate) operating conditions supply voltage v cc 1, v cc 2 4.75 to 5.3 v v cc 3 4.75 to 9.45 v operating temperature topr ?0 to +75 ? description the cxa3185/3186n is a monolithic tv tuner ic which integrates local oscillator and mixer circuits for vhf band, local oscillator and mixer circuits for uhf band, an if amplifier and a tuning pll onto a single chip, enabling further miniaturization of the tuner. features low noise figure low power consumption (5 v, 54 ma typ.) on-chip tuning pll (3-wire bus format) selection of frequency steps 31.25 khz, 50 khz and 62.5 khz on-chip 4-output band switch applications tv tuners vcr tuners catv tuners structure bipolar silicon monolithic ic all band tv tuner ic with on-chip pll 30 pin ssop (plastic) cxa3185/3186n note) electrostatic discharge strength is weak, and care should be taken in handling this ic.
2 cxa3185/3186n block diagram and pin configuration i n p u t b u f f e r b i a s u s w i f a m p c l d a c e f m t b v l b v h b u v c c 1 m i x o u t 1 m i x o u t 2 g n d 1 m s v h f i n u h f i n 1 u h f i n 2 s h i f t r e g i s t e r b a n d s w d r i v e r v . r e g v h f m i x u h f m i x b u f f e r v h f o s c u h f o s c b u f f e r b u f f e r p h a s e d e t e c t o r c h a r g e p u m p l o c k d e t d i v i d e r 1 4 / 1 5 b i t p r e s c a l e r 1 / 8 r e f o s c d i v i d e r 1 / 5 1 2 , 6 4 0 , 1 0 2 4 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 v o s c 1 g n d v o s c 2 u o s c b 1 u o s c e 1 u o s c e 2 u o s c b 2 v c c 2 c p e v c c 3 c p o r e f o s c g n d i f o u t l o c k 1 6 1 7 1 8 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 2 0 2 1 2 2 1 9
3 cxa3185/3186n pin description pin symbol equivalent circuit pin voltage description no. (v) 1 2 3 4 5 6 7 8 9 10 11 cl da ce fmt bvl bvh bu v cc 1 mixout1 mixout2 gnd1 1.25 (when open) on : vcc3 off : 0 clock input. data input. enable pin. 4 : output for fm trap. 5 : power supply output for vl band. 6 : power supply output for vh band. 7 : power supply output for uhf band. the selected band pin goes high. analog circuit power supply. mixer outputs. analog circuit gnd. 5 k 1 0 0 k 1 2 2 v c c 2 5 k 1 0 0 k 2 2 2 v c c 2 3 1 5 0 k 5 0 k v c c 2 2 2 4 5 6 7 3 0 v c c 3 2 0 k 9 1 0
4 cxa3185/3186n pin symbol equivalent circuit pin voltage description no. (v) 12 13 14 15 16 18 17 19 20 21 22 ms vhfin uhfin1 uhfin2 vosc1 vosc2 gnd uoscb1 uosce1 uosce2 uoscb2 1.5 (when open) 2.3 (vhf) 0 (uhf) 0 (vhf) 2.3 (uhf) 0 (vhf) 2.3 (uhf) 3.0 (vhf) 3.1 (uhf) 3.5 (vhf) 5.0 (uhf) 3.2 (vhf) 2.9 (uhf) (vhf) 2.4 (uhf) (vhf) 2.4 (uhf) 3.2 (vhf) 2.9 (uhf) frequency step mode selection. five modes can be selected according to the applied voltage. vhf input. the input format is unbalanced input. uhf input. the input method can be selected from balanced input or unbalanced input. external resonance circuit connection for vhf oscillator. gnd external resonance circuit connection for uhf oscillator. 5 0 k v c c 2 1 2 0 k 1 2 1 3 1 4 1 5 3 k 3 k 1 8 1 6 8 8 p 3 k 3 k 1 5 p 5 0 v c c 1 6 0 0 1 9 2 2 2 0 2 1 3 k 3 k v c c 1
5 cxa3185/3186n pin symbol equivalent circuit pin voltage description no. (v) 23 24 25 26 27 28 29 30 v cc 2 gnd2 ifout lock cpe cpo refosc v cc 3 2.3 5.0 (lock) 0.2 (unlock) 0.6 2.0 4.3 pll circuit power supply. pll circuit gnd. if output. lock detection. high when locked, low when unlocked. npn transistor connection for varicap diode drive. charge pump output. connect a loop filter. crystal connection for reference oscillator. power supply for external supply. 2 5 8 4 0 v c c 1 2 6 2 2 v c c 2 4 0 k 2 8 2 7 2 2 v c c 2 2 0 0 5 0 0 2 0 k 2 9 6 0 k 3 0 p 3 0 p
6 cxa3185/3186n electrical characteristics see the electrical characteristics measurement circuit. circuit current (v cc =5 v, ta=25 c) item circuit current a circuit current d symbol ai ccv ai ccu di cc measurement conditions v cc 1 current, band switch output open during vhf operation v cc 1 current, band switch output open during uhf operation v cc 2 current min. typ. max. unit 30 41 55 ma 31 42 56 ma 7 11 15 ma item conversion gain * 1 noise figure * 1 , * 2 1 % cross modulation * 1 , * 3 maximum output power switch on drift * 4 supply voltage drift * 4 symbol cg1 cg2 cg3 cg4 nf1 nf2 nf3 nf4 cm1 cm2 cm3 cm4 pomax ? fsw1 ? fsw2 ? fsw3 ? fsw4 ? fst1 ? fst2 ? fst3 ? fst4 measurement conditions vhf operation f rf = 55 mhz vhf operation f rf = 360 mhz uhf operation f rf = 360 mhz uhf operation f rf = 800 mhz vhf operation f rf = 55 mhz vhf operation f rf = 360 mhz uhf operation f rf = 360 mhz uhf operation f rf = 800 mhz vhf operation f d = 55 mhz, f ud = 12 mhz vhf operation f d = 360 mhz, f ud = 12 mhz uhf operation f d = 360 mhz, f ud = 12 mhz uhf operation f d = 800 mhz, f ud = 12 mhz 50 load saturation output vhf operation f osc = 100 mhz ? f from 3 s to 3 min after switch on vhf operation f osc = 405 mhz ? f from 3 s to 3 min after switch on uhf operation f osc = 405 mhz ? f from 3 s to 3 min after switch on uhf operation f osc = 845 mhz ? f from 3 s to 3 min after switch on vhf operation f osc = 100 mhz ? f when v cc 5 v changes 5 % vhf operation f osc = 405 mhz ? f when v cc 5 v changes 5 % uhf operation f osc = 405 mhz ? f when v cc 5 v changes 5 % uhf operation f osc = 845 mhz ? f when v cc 5 v changes 5 % min. typ. max. unit 21 24 27 db 22 25 28 db 26 29 32 db 27 30 33 db 12 15 db 11 14 db 8.5 12.5 db 9.5 13.5 db 97 101 db 96 100 db 92 96 db 88 92 db +5 +10 dbm 300 khz 400 khz 400 khz 500 khz 150 khz 250 khz 200 khz 250 khz osc/mix/if amplifier block
7 cxa3185/3186n * 1 measured value for untuned inputs. * 2 noise figure is the direct-reading value of nf meter in dsb. * 3 desired signal (f d ) input level is ?0 dbm. undesired signal (f ud ) is 100 khz, 30 % am. the measurement value is undesired signal level, it measured with a spectrum analyzer at s/i=46 dbm. * 4 value when the pll is not operating. item cl and da pins ??level input voltage ??level input voltage ??level input current ??level input current ce pins ??level input voltage ??level input voltage ??level input current ??level input current cpo (charge pump) output current leak current lock ??output voltage ??output voltage refosc oscillator frequency range input capacitance drive level bvl, bvh, bu (band sw) output current saturation voltage leak current fmt (band sw) output current saturation voltage leak current bus timing data setup time data hold time enable waiting time enable setup time enable hold time symbol v ih v il i ih i il v ihe v ile i ihe i ile i cpo leakcp v lockh v lockl f xtosc c xtosc v xtosc i bs 1 v sat 1 leakbs1 i bs 2 v sat 2 leakbs2 t sd t hd t we t se t he measurement conditions v ih = v cc v il = gnd v ihe =v cc v ile =gnd when locked when unlocked when on when on sink current = 20 ma when off when on when on sink current = 5 ma when off see timing chart on page 15 see timing chart on page 15 see timing chart on page 15 see timing chart on page 15 see timing chart on page 15 min. typ. max. unit 3 v cc v gnd 1.5 v 0 ?.1 a ? ? a 3 v cc v gnd 1.5 v 100 130 a ?0 ?5 a 35 50 75 a 30 na v cc ?.5 v cc v 0 0.5 v 3 12 mhz 17.5 19 20.5 pf 200 400 mvp-p ?5 ma 100 200 mv 0.5 3 a ? ma 75 150 mv 0.03 0.1 a 300 ns 600 ns 300 ns 300 ns 600 ns pll block
8 cxa3185/3186n electrical characteristics measurement circuit c x a 3 1 8 5 / 3 1 8 6 n c l d a c e f m t b v l b v h b u v c c 1 m i x o u t 1 m i x o u t 2 g n d 1 m s v h f i n u h f i n 1 u h f i n 2 v c c 3 r e f o s c c p o c p e l o c k i f o u t g n d 2 v c c 2 u o s c b 2 u o s c e 2 u o s c e 1 u o s c b 1 v o s c 2 g n d v o s c 1 1 0 0 p x t a l 1 n l o c k i f o u t 4 7 k 0 . 0 4 7 8 2 0 0 p 2 s c 2 7 8 5 3 3 p 2 2 k + 3 0 v 3 . 3 1 n + 5 v 5 6 p 4 7 k 7 p 4 7 k 1 t 3 6 3 1 t 3 6 3 0 . 5 p 0 . 5 p 4 7 k 4 7 k 1 6 p 1 n c l o c k d a t a e n a b l e f m t b v l b v h b u 2 k 5 6 p 5 6 p 1 0 0 1 n 1 n + 5 v 3 . 3 1 n 1 n 1 n v h f i n 1 n u h f i n 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 4 . 5 t 4 . 5 t 1 t 3 6 3 1 t 3 6 2 4 7 k 1 5 0 p 4 7 k 3 . 0 2 . 5 t 1 n 4 7 k 5 1 b v h 3 . 2 5 . 5 t 1 n 4 7 k 5 1 0 . 5 p 4 m h z 1 . 2 k 1 p 8 p 4 p 8 p 5 6 p 2 . 5 2 . 5 t 1 6 1 7 1 8 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 2 9 3 0 1 9 b v l
9 cxa3185/3186n description of functions the cxa3185/3186n is a terrestrial wave broadcast tuner ic which converts frequencies to if in order to tune and detect only the desired reception frequency of vhf, catv and uhf band signals. in addition to the mixer, local oscillator and if amplifier circuits required for frequency conversion to if, this ic also integrates a pll circuit for local oscillator frequency control onto a single chip. the functions of the various circuits are described below. 1. mixer circuit this circuit outputs the frequency difference between the signal input to vhfin or uhfin and the local oscillation signal. 2. local oscillator circuit a vco is formed by externally connecting an lc resonance circuit composed of a varicap diode and inductance. 3. if amplifier circuit this circuit amplifies the mixer if output, and consists of an amplifier stage and low impedance output stage. 4. pll circuit this pll circuit fixes the local oscillator frequency to the desired frequency. it consists of a prescaler, main divider, reference divider, phase comparator, charge pump and reference oscillator. the control format supports the 3-wire bus format. the following four modes can be selected according to the combination of the frequency division values of the main and reference dividers. mode main divider reference divider a-0 15 bit 1024 fixed a-1 14 bit 512 fixed a-2 15 bit 640 fixed a-3/4 15 bit 512 fixed
10 cxa3185/3186n description of analog block operation (see the electrical characteristics measurement circuit.) vhf oscillator circuit this circuit is a differential amplifier type oscillator circuit. pin 18 is the output and pin 16 is the input. oscillation is performed by connecting an lc resonance circuit including a varicap to pin 18 via coupled capacitance, inputting to pin 16 with feedback capacitance, and applying positive feedback. the amplifier between pins 16 and 18 has an extremely high gain. therefore, care should be taken to avoid creating parasitic capacitance, resistance or other feedback loops as this may produce abnormal oscillation. vhf mixer circuit the mixer circuit employs a double balance mixer with little local oscillation signal leakage. the input format is base input type, with pin 12 grounded and the rf signal input to pin 13. the rf signal is inserted from the oscillator, converted to if frequency and output from pins 9 and 10. pins 9 and 10 are open collectors, so power must be supplied externally. the electric potential of pins 9 and 10 at this time must be dc 4.0 v or more. uhf oscillator circuit this oscillator circuit is designed so that two collector ground type colpitts oscillators perform differential oscillation operation via an lc resonance circuit including a varicap. connect resonance capacitance which consists of colpitts oscillator between pins 19 and 20, pins 20 and 21, and pins 21 and 22. then an lc resonance circuit including a varicap diode is connected between pins 19 and 22. uhf mixer circuit this circuit employs a double balance mixer like the vhf mixer circuit. the input format is base input type, with pins 14 and 15 as the rf input pins. the input method can be selected from balanced input consisting of differential input to pins 14 and 15 or unbalanced input consisting of grounding pin 14 via a capacitor and input to pin 15. pins 9 and 10 are the mixer outputs. pins 9 and 10 are open collectors, so power must be supplied externally. the electric potential of pins 9 and 10 at this time must be dc 4.0 v or more. if amplifier circuit the signals frequency converted by the mixer are output from pins 9 and 10, and at the same time are ac coupled inside the ic and input to the if amplifier. single-tuned filters are connected to pins 9 and 10 in order to improve the interference characteristics of the if amplifier. the signal amplified by the if amplifier is output from pin 25. the output impedance is approximately 75 .
11 cxa3185/3186n description of pll block the pll on this ic supports the 3-wire bus control format. the serial data is input to the da, cl and ce pins. the data is loaded to the shift register at the clock rise, and latched at the enable fall. 1) mode setting method the modes for each frequency step are set according to the ms pin voltage. symbol ce cl da lock 3-wire bus control enable input clock input data input lock signal output mode a-0 a-1 a-2 a-3 a-4 ms pin voltage 0 to 0.15v cc open 0.45v cc to 0.55v cc 0.65v cc to 0.75v cc 0.85v cc to v cc main divider 15 bit 14 bit 15 bit 15 bit 15 bit reference divider 1024 512 640 512 512 reference frequency * 3.90625 khz 7.8125 khz 6.25 khz 7.8125 khz 7.8125 khz frequency step * 31.25 khz 62.5 khz 50 khz 62.5 khz 62.5 khz control word length total 19 bits total 18 bits total 19 bits total 19 bits total 27 bits * frequency step is for when x?al osc = 4 mhz. 2) programming the vco lock frequency is obtained according to the following formula. fosc = fref 8 (32 m + s) fosc : local oscillator frequency fref : reference frequency 8 : prescaler fixed frequency division ratio m : main divider frequency division ratio s : swallow counter frequency division ratio the variable frequency division ranges of m and s are as follows, and are set as binary. 32 m 1023 (32 m 511 for a-1 mode) 0 s 31 the pll control data is comprised of the above frequency data and the band switch control data.
12 cxa3185/3186n 2-1) the CXA3185N control format is as follows. 2-1-1 : a-0/a-2/a-3 modes (19-bit data format) front bit ? msb lsb ? 2-1-2 : a-1 mode (18-bit data format) front bit ? msb lsb ? 2-1-3 : a-4 mode (27-bit data format) front bit ? msb lsb ? bu fmt bvh bvl m9 m8 m7 m6 m5 m4 m3 m2 m1 m0 s4 s3 s2 s1 s0 bu fmt bvh bvl m8 m7 m6 m5 m4 m3 m2 m1 m0 s4 s3 s2 s1 s0 * ) x: don? care s0 to : swallow counter frequency division ratio setting m0 to : main divider frequency division ratio setting bvl : vl band switch control (output pnp tr on when ?? bvh : vh band switch control (output pnp tr on when ?? fmt : fm trap switch control (output pnp tr on when ?? bu : uhf band switch control (output pnp tr on when ?? cp : charge pump current switching (200 a when ?? 50 a when ?? t1 : test mode selection (when ?? cd : charge pump off (when ?? r0, r1 : reference divider frequency division ratio setting (see the table below.) reference divider frequency division ratio table bu fmt bvh bvl m9 m8 m7 m6 m5 m4 m3 m2 m1 m0 s4 s3 s2 s1 s0 x cp t1 cd x r1 r0 x r1 0 1 x r0 1 1 0 reference divider 1024 512 640 * ) x: don? care
13 cxa3185/3186n 2-2) the cxa3186n control format is as follows. the bu and fmt data order is switched for the CXA3185N. in this case the control format is as follows. 2-2-1 : a-0/a-2/a-3 modes (19-bit data format) front bit ? msb lsb ? 2-2-2 : a-1 mode (18-bit data format) front bit ? msb lsb ? 2-2-3 : a-4 mode (27-bit data format) front bit ? msb lsb ? s0 to : swallow counter frequency division ratio setting m0 to : main divider frequency division ratio setting bvl : vl band switch control (output pnp tr on when ?? bvh : vh band switch control (output pnp tr on when ?? fmt : fm trap switch control (output pnp tr on when ?? bu : uhf band switch control (output pnp tr on when ?? cp : charge pump current switching (200 a when ?? 50 a when ?? t1 : test mode selection (when ?? cd : charge pump off (when ?? r0, r1 : reference divider frequency division ratio setting (see the table below.) reference divider frequency division ratio table fmt bu bvh bvl m9 m8 m7 m6 m5 m4 m3 m2 m1 m0 s4 s3 s2 s1 s0 fmt bu bvh bvl m8 m7 m6 m5 m4 m3 m2 m1 m0 s4 s3 s2 s1 s0 fmt bu bvh bvl m9 m8 m7 m6 m5 m4 m3 m2 m1 m0 s4 s3 s2 s1 s0 x cp t1 cd x r1 r0 x * ) x: don? care * ) x: don't care r1 0 1 x r0 1 1 0 reference divider 1024 512 640
14 cxa3185/3186n 3) 3-wire bus data format b a n d s w i t c h d a t a f r e q u e n c y d a t a d a t a c l o c k e n a b l e b u / f m t f m t / b u b v h b v l m 8 m 7 m 6 m 5 m 4 m 3 m 2 m 1 m 0 s 4 s 3 s 2 s 1 s 0 1 4 5 1 8 b a n d s w i t c h d a t a f r e q u e n c y d a t a d a t a c l o c k e n a b l e b u / f m t f m t / b u b v h b v l m 8 m 7 m 6 m 5 m 4 m 3 m 2 m 1 m 0 s 4 s 3 s 2 s 1 s 0 1 4 5 m 9 1 9 b a n d s w i t c h d a t a f r e q u e n c y d a t a d a t a c l o c k e n a b l e b u / f m t f m t / b u b v h b v l m 8 s 3 s 2 s 1 s 0 x c p t 1 c d x r 1 r 0 x 1 4 5 m 9 2 7 t e s t d a t a 2 0 1 9 a - 1 m o d e ( 1 8 - b i t d a t a f o r m a t ) a - 0 / a - 2 / a - 3 m o d e s ( 1 9 - b i t d a t a f o r m a t ) a - 4 m o d e ( 2 7 - b i t d a t a f o r m a t )
15 cxa3185/3186n 4) bus timing chart t s d t h d 3 v 1 . 5 v 3 v 1 . 5 v 3 v 1 . 5 v t h e d a t a c l o c k e n a b l e t s e t s d = d a t a s e t u p t i m e t h d = d a t a h o l d t i m e t s e = e n a b l e s e t u p t i m e t h e = e n a b l e h o l d t i m e t w e = e n a b l e w a i t i n g t i m e t w e
16 cxa3185/3186n c i r c u i t c u r r e n t v s . s u p p l y v o l t a g e 1 a i c c - c i r c u i t c u r r e n t [ m a ] v c c 1 - s u p p l y v o l t a g e [ v ] c i r c u i t c u r r e n t v s . s u p p l y v o l t a g e 2 d i c c - c i r c u i t c u r r e n t [ m a ] v c c 2 - s u p p l y v o l t a g e [ v ] b a n d s w o u t p u t v o l t a g e v s . o u t p u t c u r r e n t ( b u , b v h , b v l ) o u t p u t v o l t a g e [ v ] o u t p u t c u r r e n t [ m a ] b a n d s w o u t p u t v o l t a g e v s . o u t p u t c u r r e n t ( f m t ) o u t p u t v o l t a g e [ v ] o u t p u t c u r r e n t [ m a ] 0 1 2 3 4 6 5 i / o c h a r a c t e r i s t i c s ( u n t u n e d i n p u t ) i f o u t p u t l e v e l [ d b m ] r f i n p u t l e v e l [ d b m ] 4 5 4 0 3 5 u h f 4 . 7 4 . 8 4 . 9 5 . 0 5 . 2 5 . 3 5 . 4 1 5 1 0 5 4 . 7 4 . 8 4 . 9 5 . 0 5 . 1 5 . 2 5 . 3 5 . 4 v c c 3 = 9 v v c c 3 = 5 v 9 . 2 9 . 0 8 . 8 8 . 6 5 . 0 4 . 8 4 . 6 4 . 4 0 5 1 0 1 5 2 0 2 5 9 . 2 9 . 0 8 . 8 8 . 6 5 . 0 4 . 8 4 . 6 4 . 4 v c c 3 = 9 v v c c 3 = 5 v 2 0 0 2 0 4 0 6 0 6 0 5 0 4 0 3 0 2 0 1 0 0 1 0 5 . 1 v h f f r f = 1 0 0 m h z ( v h f ) f r f = 4 5 0 m h z ( u h f ) f i f i s b o t h f = 4 5 m h z
17 cxa3185/3186n c o n v e r s i o n g a i n v s . r e c e p t i o n f r e q u e n c y ( u n t u n e d i n p u t ) c g - c o n v e r s i o n g a i n [ d b ] p c s b e a t c h a r a c t e r i s t i c s i f o u t p u t l e v e l [ d b m ] s g o u t p u t l e v e l [ d b m ] ( f p l e v e l ) n o i s e f i g u r e v s . r e c e p t i o n f r e q u e n c y ( u n t u n e d i n p u t , i n d s b ) n f - n o i s e f i g u r e [ d b ] r e c e p t i o n f r e q u e n c y [ m h z ] n e x t a d j a c e n t c r o s s m o d u l a t i o n v s . r e c e p t i o n f r e q u e n c y ( u n t u n e d i n p u t ) c m - c r o s s m o d u l a t i o n [ d b ] r e c e p t i o n f r e q u e n c y [ m h z ] o s c i l l a t i o n f r e q u e n c y p o w e r s u p p l y f l u c t u a t i o n ( p l l o f f ) + b d r i f t [ k h z ] o s c i l l a t i o n f r e q u e n c y [ m h z ] r e c e p t i o n f r e q u e n c y [ m h z ] f i f = 4 5 m h z 4 0 3 5 3 0 2 5 2 0 1 5 1 0 5 0 v h f ( l o w ) v h f ( h i g h ) u h f 0 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 8 0 0 9 0 0 0 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 8 0 0 9 0 0 2 0 1 5 1 0 5 0 v h f ( l o w ) v h f ( h i g h ) u h f f i f = 4 5 m h z 1 2 0 1 0 0 8 0 6 0 4 0 2 0 0 f u d = f d + 1 2 m h z f u d = f d 1 2 m h z ( 1 0 0 k h z , 3 0 % a m ) 0 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 8 0 0 9 0 0 f i f = 4 5 m h z 4 0 0 3 0 0 2 0 0 1 0 0 0 1 0 0 2 0 0 3 0 0 4 0 0 0 1 0 0 2 0 0 3 0 0 4 0 0 5 0 0 6 0 0 7 0 0 8 0 0 9 0 0 v h f ( l o w ) v h f ( h i g h ) ( v c c = 5 v ) v c c + 5 % v c c 5 % u h f f i f f b e a t + 2 0 + 1 0 0 1 0 2 0 3 0 4 0 5 0 6 0 7 0 8 0 3 0 2 0 1 0 0 + 1 0 + 2 0 f l o c a l = 1 2 9 m h z f p = 8 3 . 2 5 m h z f c = 8 6 . 8 3 m h z , ( f p 1 2 d b ) f s = 8 7 . 7 5 m h z , ( f p 1 . 7 d b ) f i f = 4 5 . 7 5 m h z f b e a t = f i f 9 2 0 k h z
18 cxa3185/3186n v h f ( l o w ) 9 5 m h z ? v h f ( h i g h ) 3 9 5 m h z u h f 4 1 3 m h z ? u h f 8 4 7 m h z v a r i c a p v o l t a g e [ v ] 3 0 2 0 0 1 0 v a r i c a p v o l t a g e [ v ] 3 0 2 0 0 1 0 t = 7 0 m s 9 0 , 0 0 0 0 m s 1 0 , 0 0 0 0 m s 2 0 . 0 m s / d i v 1 1 0 , 0 0 0 m s t = 7 0 m s 9 0 , 0 0 0 0 m s 1 0 , 0 0 0 0 m s 2 0 . 0 m s / d i v 1 1 0 , 0 0 0 m s 5 . 0 v / d i v o f f s e t 1 0 . 0 v 5 . 0 v / d i v o f f s e t 1 0 . 0 v tuning response time
19 cxa3185/3186n i f o u t p u t s p e c t r u m i f o u t p u t s p e c t r u m r f i n p u t l e v e l : 4 0 d b m c e n t e r 4 5 . 0 m h z r e s b w 1 . 0 k h z v b w 1 0 h z s p a n 1 0 0 . 0 k h z s w p 3 0 . 0 s r f i n p u t l e v e l : 4 0 d b m r l = 0 d b m 1 0 d b / d i v v h f ( h i g h ) f r f = 3 5 0 m h z f l o = 3 9 5 m h z c e n t e r 4 5 . 0 m h z r e s b w 1 . 0 k h z v b w 1 0 h z s p a n 1 0 0 . 0 k h z s w p 3 0 . 0 s v h f ( l o w ) f r f = 5 5 m h z f l o = 1 0 0 m h z r l = 0 d b m 1 0 d b / d i v i f o u t p u t [ d b m ] i f o u t p u t [ d b m ]
20 cxa3185/3186n i f o u t p u t s p e c t r u m r f i n p u t l e v e l : 4 0 d b m u h f ( l o w ) f r f = 8 0 0 m h z f l o = 8 4 5 m h z r l = 0 d b m 1 0 d b / d i v c e n t e r 4 5 . 0 m h z r e s b w 1 . 0 k h z v b w 1 0 h z s p a n 1 0 0 . 0 k h z s w p 3 0 . 0 s i f o u t p u t [ d b m ]
21 cxa3185/3186n 1 2 1 3 j 1 0 0 j 5 0 j 2 5 0 5 0 j 2 5 j 5 0 j 1 0 0 3 5 0 m h z 5 0 m h z 1 0 0 0 p s 1 1 b y p v h f i n 1 4 1 5 j 1 0 0 j 5 0 j 2 5 0 5 0 3 5 0 m h z j 1 0 0 8 0 0 m h z j 5 0 j 2 5 1 0 0 0 p s 1 1 u h f i n 1 u h f i n 2 vhf input impedance uhf input impedance
22 cxa3185/3186n j 5 0 j 2 5 0 j 2 5 j 5 0 j 1 0 0 5 0 4 5 m h z j 1 0 0 if output impedance
s o n y c o d e e i a j c o d e j e d e c c o d e p a c k a g e s t r u c t u r e p a c k a g e m a t e r i a l l e a d t r e a t m e n t l e a d m a t e r i a l p a c k a g e m a s s e p o x y r e s i n s o l d e r / p a l l a d i u m 4 2 / c o p p e r a l l o y 3 0 p i n s s o p ( p l a s t i c ) * 9 . 7 0 . 1 * 5 . 6 0 . 1 0 . 6 5 0 . 2 2 0 . 0 5 3 0 1 1 5 1 6 1 . 2 5 + 0 . 2 0 . 1 7 . 6 0 . 2 0 . 1 5 + 0 . 0 5 0 . 0 2 0 . 1 0 . 1 0 . 5 0 . 2 0 t o 1 0 a d e t a i l a s s o p - 3 0 p - l 0 1 s s o p 0 3 0 - p - 0 0 5 6 0 . 1 g n o t e : d i m e n s i o n * d o e s n o t i n c l u d e m o l d p r o t r u s i o n . p l a t i n g 0 . 1 0 0 . 1 3 m + 0 . 1 package outline unit : mm cxa3185/3186n 23 n o t e : p a l l a d i u m p l a t i n g t h i s p r o d u c t u s e s s - p d p p f ( s o n y s p e c . - p a l l a d i u m p r e - p l a t e d l e a d f r a m e ) .

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