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? 1 ? CXD3172AR 100 pin lqfp (plastic) description the CXD3172AR is a signal processor lsi for ye, cy, mg and g single ccd color cameras. in addition to basic camera signal processing functions, it includes an ae/awb detection circuit, a sync signal generation circuit and an external sync circuit, etc. this chip also has a built-in microcontroller to realize basic camera functions such as ae/awb without an external microcomputer. features ? generates timing pulses to drive the single ccd image sensor built-in h/v driver for ccd image sensor luminance/chroma signal processing supports ntsc/pal modes supports 510h/760h system ccd image sensor built-in 10-bit a/d converter built-in evr (3ch) analog composite output ? built-in digital encoder ? 10-bit d/a converter output digital output ? conforms to itu-rec656/itu-rec601 format supports external sync functions ? sync separation circuit ? phase comparator ae/awb detector block control functions with a built-in microcontroller ? ae/awb/clamp/blemish detection and compensation peripheral ic control function ? evr/eeprom communication control serial communication function (2 mode selection) ? microcomputer communication/start-stop synchronous system communication (rs232c) auto blemish detection and compensation function mirror function applications industrial ccd cameras (surveillance/fa/image input cameras) multimedia ccd cameras (teleconferencing/personal computer cameras) signal processor lsi for single ccd color camera absolute maximum ratings supply voltage v dd v ss ? 0.5 to +4.6 v avd v ss ? 0.5 to +4.6 v vh vl ? 0.5 to vl + 26.0 v vm vl ? 0.5 to vl + 26.0 v input voltage v i v ss ? 0.5 to v dd + 0.5 v output voltage v o v ss ? 0.5 to v dd + 0.5 v operating temperature topr ?20 to +75 c storage temperature tstg ?55 to +150 c recommended operating conditions supply voltage v dd 3.0 to 3.6 v avd1, 3, 4, 5, 6 3.0 to 3.6 v avd2 3.0 to 5.5 v vh 11.64 to 15.45 v vl ?7.5 to ?4.5 v vm 0 v operating temperature topr ?20 to +75 c applicable ccd image sensors ? 510h color ccds (type 1/3, 1/4, ntsc/pal) 760h color ccds (type 1/3, 1/4, ntsc/pal) supported relates lsis agc cxa2096n evr mb88347 (fujitsu limited.) eeprom ak6480a (asahi kasei microsystems co.,ltd.) br9080a (rohm) ? applicable ccd image sensors are applicable products as of preparing this data sheet. they may be changed according to the version up and production stop of ccd image sensor. e04643-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. http://www..net/ datasheet pdf - http://www..net/
? 2 ? CXD3172AR block diagram y_intg rgb_cnt rgb_intg ref gate wind gen opd pll vco phase comp sync/bst sep evr (3ch) lpf x'tal esci/esco eck tg v-dr pck cpout vctrlin tghd/tgvd pcomp ln mtx gam wb rgb mtx lpf cds agc cxa2096n ccd a/d ref/var sel ref ccu mode pll scomp var sync gen fsc phase comp master hd gen hd/vd sep ex-sync ex-bst sg ckgen mck pre 1hdl cprocess mcrcon sys man ypocess dl3 dl2 dl1 dl13 dl1 dl2 dl3 dl1 blemish comp CXD3172AR agccont dl2 dl3 lpf vh apc gam gain d/a hl apc wclp msk dadj apc mix res enh a/d pg ob int addr stor hv cnt addr cmp 1hdl 1hdl def det def cor sfc enc sfc sfc dif d_by d_ry d_y internal bus e_y y lpf rec656 rec601 dif hlapc gain ext-video ioy e_ry nosync_y yout d/a ioc dck d_yo rec601 (y) or rec656 d_co rec601 (c) cout sync_y ycmix e_by blk sync enc ry by bst mod ycmix init sg awb port dr clmp ae yc sprs blemish comp ext-sif rs232c microcom cam-sif eeprom evr eeprom evr peri csrom/csevr casi/caso/casck xcs si so sok http://www..net/ datasheet pdf - http://www..net/
? 3 ? CXD3172AR pin configuration 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 52 51 54 53 56 55 58 59 57 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 24 25 22 23 20 21 18 17 19 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 xrs avs2 h2 h1 refc xrst vrt avd1 vin avs1 vrb csrom casi caso casck v ss 1 avd2 test1 sifsel v dd 1 xcs (xcts) si (rxd) so (txd) sck (xrts) rg mck vh v3 v2 v4 vm avd3 xshp xshd avs3 s0 pcomp pblk clpob clpdm v ss 2 vl sub v1 svd1 s4 s3 s2 s1 v dd 2 test3 avs5 test2 avs6 ioc vgc irefc irefy vgy ioy avd6 vrefy avs4 evr1 cpout avd4 exvideoy vctrlin avd5 vrefc evr2 bias pck exvideo evr0 p0 (co0) p1 (co1) v dd 3 p2 (co2) p5 (co5) p4 (co4) v dd 4 v ss 4 svd2 p3 (co3) p9 (yo9) p8 (yo8) esco v ss 3 p15 (yo15) p6 (co6) eck esci p10 (yo10) p12 (yo12) p11 (yo11) p13 (yo13) p14 (yo14) dck p7 (co7) note) symbols in parentheses are the signal names when the function is switched by the communication parameter settings. http://www..net/ datasheet pdf - http://www..net/
? 4 ? CXD3172AR pin description pin no. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 symbol vrt avd1 vin avs1 vrb csrom casi caso casck v ss 1 xrst test1 sifsel v dd 1 xcs si so sck rg refc avd2 h1 h2 avs2 xrs avs3 xshd xshp avd3 vm v4 v2 v3 vh v1 sub vl description a/d converter reference voltage (top) input. power supply for a/d converter. analog signal input. (for a/d converter) gnd a/d converter reference voltage (bottom) input. chip select output for camera peripheral ics. (to eeprom) serial data input for system communication. serial data output for system communication. serial clock output for system communication. gnd reset input. test serial interface mode switching. 0: microcomputer (3 wires) 1: rs232c power supply for logic. chip select input for 3 wires serial interface. (clear to send) serial data input for 3 wires serial interface. (received data) serial data output for 3 wires serial interface. (transmitted data) serial clock input for 3 wires serial interface. (request to send) reset gate pulse output. capacitor connection. power supply for horizontal driving pulse. (3.3v/5.0v) ccd horizontal register transfer pulse output. ccd horizontal register transfer pulse output. gnd resampling pulse output. gnd data sample-and-hold pulse output. precharge level sample-and-hold pulse output. power supply for sample-and-hold pulse. v-driver middle level power supply. ccd vertical register transfer pulse output. ccd vertical register transfer pulse output. ccd vertical register transfer pulse output. v-driver high level power supply. ccd vertical register transfer pulse output. ccd electronic shutter pulse output. v-driver low level power supply. power supply avd1 avs1 v dd 1 v ss 1 avd2 avs2 avd3 avs3 vh vl vm i/o i ? i ? i o i o o ? i i i ? i i o i (o) o i ? o o ? o ? o o ? ? o o o ? o o ? http://www..net/ datasheet pdf - http://www..net/
? 5 ? CXD3172AR pin no. 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 symbol v ss 2 clpdm clpob pblk pcomp mck s0 v dd 2 s1 s2 s3 s4 svd1 pck avs4 vctrlin cpout avd4 avd5 exvideoy exvideo avs5 bias test2 test3 evr0 evr1 avs6 evr2 ioc vrefc vgc irefc irefy vgy vrefy avd6 ioy description gnd dummy data clamp pulse output. optical black clamp pulse output. preblanking pulse output. phase comparator output. system drive clock input. sync signal input/output 0. power supply for logic. sync signal input/output 1. sync signal input/output 2. sync signal input/output 3. sync signal output. sub power supply. pll clock output. gnd built-in vco input. built-in charge pump output. analog power supply for pll. power supply for burst separator. y signal input for external synchronization. video signal input for external synchronization. gnd bias current source. test test evr0 analog output. evr1 analog output. gnd evr2 analog output. analog chroma output. reference voltage setting. (for chroma signal d/a converter) capacitor connection. (approx. 0.1f) (for chroma signal d/a converter) reference current setting. (for chroma signal d/a converter) reference current setting. (for luminance signal d/a converter) capacitor connection. (approx. 0.1f) (for luminance signal d/a converter) reference voltage setting. (for luminance signal d/a converter) power supply for da converter/evr. analog y output/compostite video output. power supply v dd 2 v ss 2 avd4 avs4 avd5 avs5 avd6 avs6 i/o ? o o o o i i/o ? i/o i/o i/o o ? o ? i o ? ? i i ? i i i o o ? o o i i i i i i ? o http://www..net/ datasheet pdf - http://www..net/
? 6 ? CXD3172AR pin no. 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 symbol p8 (yo8) p9 (yo9) p10 (yo10) p11 (yo11) p12 (yo12) v ss 3 p13 (yo13) p14 (yo14) p15 (yo15) v dd 3 esci esco eck v ss 4 dck p0 (co0) p1 (co1) p2 (co2) p3 (co3) v dd 4 p4 (co4) p5 (co5) p6 (co6) p7 (co7) svd2 description port 8 input or y digital signal output or yuv digital signal output. port 9 input or y digital signal outout or yuv digital signal output. port 10 input or y digital signal outout or yuv digital signal output. port 11 input or y digital signal outout or yuv digital signal output. port 12 input or y digital signal outout or yuv digital signal output. gnd port 13 input or y digital signal outout or yuv digital signal output. port 14 input or y digital signal outout or yuv digital signal output. port 15 input or y digital signal outout or yuv digital signal output. power supply. oscillation cell input. oscillaton cell output. encoder clock input. gnd clock output for digital output. port 0 input or c digital signal output. port 1 input or c digital signal output. port 2 input or c digital signal output. port 3 input or c digital siganl output power supply. port 4 input or c digital signal output or eeeprom busy signal input or opd frame pulse output. port 5 input or c digital signal output or vd output. port 6 input or c digital signal output or hd output. port 7 input or c digital signal output. sub power supply. power supply v dd 3 v ss 3 v dd 4 v ss 4 i/o i/o i/o i/o i/o i/o ? i/o i/o i/o ? i o i ? o i/o i/o i/o i/o ? i/o i/o i/o i/o ? http://www..net/ datasheet pdf - http://www..net/
? 7 ? CXD3172AR electrical characteristics dc characteristics (within recommended operating range) v dd 1, 2, 3, 4 avd1 avd2 avd3, 4, 5 avd6 svd1, 2 vh vl vm v oh 1 ? 1 v ol 1 ? 1 v oh 2 ? 2 , ? 3 v ol 2 ? 2 , ? 3 v oh 3 ? 4 v ol 3 ? 4 v oh 4 ? 5 v ol 4 ? 5 v oh 5 ? 6 v ol 5 ? 6 v oh 6 ? 7 v om 61 ? 7 v om 62 ? 7 v ol 6 ? 7 v t + ? 1 , ? 3 , ? 8 v t ? ? 1 , ? 3 , ? 8 v t + ? v t ? ? 1 , ? 3 , ? 8 i ih ? 8 supply voltage 1 supply voltage 2 supply voltage 3 output voltage 1 output voltage 2 output voltage 3 output voltage 4 output voltage 5 output voltage 6 input voltage hysteresis input leak current a/d input amplitude = 1vp-p d/a output amplitude = 1vp-p i oh = 1.0ma i ol = 1.0ma i oh = 4.0ma i ol = 4.0ma i oh = 12.0ma i ol = 12.0ma i oh = 4.0ma i ol = 5.4ma i oh = 5.0ma i ol = 10.0ma i oh = 7.2ma i ol = 5.0ma i oh = 5.0ma i ol = 10.0ma v in = v dd 3.0 3.0 3.0 3.0 3.0 ? 11.64 ?7.5 ? v dd ? 0.4 v dd ? 0.4 v dd /2 vh ? 0.25 vm ? 0.25 vh ? 0.25 vm ? 0.25 0.7v dd 40 3.3 3.3 ? 3.3 3.3 3.3 ? ? 0 0.5 100 3.6 3.6 5.5 3.6 3.6 ? 15.45 ?4.5 ? 0.4 0.4 v dd /2 vl + 0.25 vl + 0.25 vm + 0.25 vl + 0.25 0.2v dd 240 v v v v v v v v v v v v v v v v v v v v v v v v v v a item symbol conditions min. typ. max. unit ? 1 s0, s1, s2, s3, p0, p1, p2, p3, p4, p5, p6, p7, p8, p9, p10, p11, p12, p13, p14, p15 ? 2 csrom, caso, casck, so, clpdm, clpob, pblk, s4, pck, dck ? 3 sck ? 4 esci, esco ? 5 sub ? 6 v2, v4 ? 7 v1, v3 ? 8 casi, xrst, sifsel, xcs, si, test2, test3 ? 9 test1 http://www..net/ datasheet pdf - http://www..net/
? 8 ? CXD3172AR i/o pin capacitance (v dd = v i = 0v, f = 1mhz) item symbol min. typ. max. unit input pin capacitance output pin capacitance i/o pin capacitance c in c out c i/o 9 11 11 pf pf pf ac characteristics (within recommended operating range) min. low time of reset operation of xrst pin p0 to p15 output delay time against dck s0 output delay time against dck s1 output delay time against dck dck output delay time against eck hd, vd, fld and sync output delay time against eck sck input pulse width (high period) sck input pulse width (low period) xce input setup time against sck xce input hold time against sck si input setup time against sck si input hold time against sck so output transit time against xce (hi-z data active) so transit time against xce (data active hi-z) so output delay time against sck reset input digital output sync block sync output serial communication i/o twrst tpdp tpds0 tpds1 tpddck tpdsy twhsck twlsck tsuxce thxce tsusi thsi tzdso tdzso tpdso 500 5 6 6 7 10 ? ? 580 580 0 0 0 0 ? ? ? ? ? ? ? 580 580 ? ? ? ? ? ? ? ? 20 28 30 24 45 ? ? ? ? ? ? ? ? 580 ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns classification item symbol min. typ. max. unit http://www..net/ datasheet pdf - http://www..net/
? 9 ? CXD3172AR ac characteristics diagram 1. reset input twrst xrst 2. dck output tpddck dck eck tpdp dck p0 to p15 s0 (dhd) s1 (dvd) tpds0 tpds1 tpdsy hd, vd fld, sync eck xce sck so si twhsck twlsck tsuxce thxce tsusi thsi tzdso tdzso tpdso 3. digital output 4. sync block output 5. serial communication i/o http://www..net/ datasheet pdf - http://www..net/
? 10 ? CXD3172AR relationship between modesel and each clock eck and mck are connected internally. eck and mck are connected internally. eck and mck are connected internally. eck and mck are connected internally. tv system ccd type modesel eck mck dspck ? 1 remarks mck/4 mck/2 mck/4 mck/2 (eck = mck) 38.13986mhz (eck = mck) 28.63636mhz (eck = mck) 37.87500mhz (eck = mck) 28.37500mhz 38.13986mhz 28.63636mhz 27.00000mhz 28.63636mhz 27.00000mhz 37.87500mhz 35.46895mhz 27.00000mhz 28.37500mhz 35.46895mhz 27.00000mhz 0 1 2 6 8 3 4 5 9 a b 510h 760h 510h 760h ntsc pa l ? 1 dspck: clock which is not output by external pins see the above table for the relationship between encoder clock (eck) and system drive clock (mck). http://www..net/ datasheet pdf - http://www..net/
? 11 ? CXD3172AR vertical timing chart modesel 0, 1, 2 [510h ntsc] applicable ccd image sensor: icx206ak/226ak/254ak/404ak vd hd sub v1 v2 v3 ccd out pblk clpob clpdm 490 491 492 487 488 2 3 4 5 6 7 4 5 2 3 1 489 262 (524) 258 (520) 10 0 8 9 6 1 4 5 6 13 17 0 (262) 1 (263) 9 (271) 1 2 3 1 2 3 4 5 6 7 8 489 8 1 6 490 491 492 487 488 2 2 (264) fld v4 9 10 11 12 9 10 11 12 10 (272) 12 (274) 18 (280) 261 odd even ... ... ... odsubv setting value ? 2 evsubv setting value ? 2 ... odsgv setting value ? 2 odsubv setting value ? 2 evsubv setting value ? 2 evsgv setting value ? 2 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 250 251 252 253 254 255 256 257 258 259 260 261 262 250 251 252 253 254 255 256 257 258 259 260 261 0 1 2 3 4 5 6 7 8 9 the shaded area shows the position variable range of the read sg pulse. however, note that the range may over depending on the setting. ? 2 the value changes by the parameter (category6: tg) setting. http://www..net/ datasheet pdf - http://www..net/
? 12 ? CXD3172AR vertical timing chart modesel 3, 4, 5 [510h pal] applicable ccd image sensor: icx207ak/227ak/255ak/405ak sub v1 v2 v3 ccd out pblk clpob clpdm 580 581 582 577 578 2 3 4 5 6 7 4 5 2 3 1 579 312 (624) 208 (520) 10 0 8 9 6 1 4 5 6 13 21 0 (312) 1 (313) 9 (321) 1 2 3 1 2 3 4 5 6 7 8 579 8 1 6 580 581 582 577 578 2 2 (314) fld v4 9 10 11 13 9 10 11 12 10 (322) 13 (325) 18 (330) 311 odd even 12 14 22 (334) 13 14 ... ... ... ... vd hd odsubv setting value ? 3 odsubv setting value ? 3 evsubv setting value ? 3 evsubv setting value ? 3 odsgv setting value ? 3 evsgv setting value ? 3 the shaded area shows the position variable range of the read sg pulse. however, note that the range may over depending on the setting. ? 3 the value changes by the parameter (category6: tg) setting. 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 311 312 0 1 2 3 4 5 6 7 8 298 299 300 301 302 303 304 305 306 307 308 309 310 300 299 298 297 301 302 303 304 305 306 307 308 309 310 311 0 1 2 3 4 5 6 7 8 9 http://www..net/ datasheet pdf - http://www..net/
? 13 ? CXD3172AR vertical timing chart modesel 6, 8 [760h ntsc] applicable ccd image sensor: icx228ak/258ak/278ak/408ak vd hd sub v1 v2 v3 ccd out pblk clpob clpdm 490 491 492 487 488 2 3 4 5 6 7 4 5 2 3 1 491 262 (524) 258 (520) 10 0 8 9 6 1 4 5 6 13 16 0 (262) 1 (263) 9 (271) 1 2 3 1 2 3 4 5 6 7 8 489 8 1 6 492 493 494 489 490 2 2 (264) fld v4 9 10 11 12 9 10 11 12 11 (273) 12 (274) 17 (279) 261 odd even 493 494 ... ... ... evsgv setting value ? 4 the shaded area shows the position variable range of the read sg pulse. however, note that the range may over depending on the setting. ? 4 the value changes by the parameter (category6: tg) setting. odsubv setting value ? 4 evsubv setting value ? 4 odsubv setting value ? 4 evsubv setting value ? 4 odsgv setting value ? 4 ... 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 250 251 252 253 254 255 256 257 258 259 260 261 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 250 251 252 253 254 255 256 257 258 259 260 261 262 http://www..net/ datasheet pdf - http://www..net/
? 14 ? CXD3172AR vertical timing chart modesel 9, a, b [760h pal] applicable ccd image sensor: icx229ak/259ak/279ak/409ak vd hd sub v1 v2 v3 ccd out pblk clpob clpdm 580 581 582 577 578 2 3 4 5 6 7 4 5 2 3 1 579 312 (624) 208 (520) 10 0 8 9 6 1 4 5 6 14 21 0 (312) 1 (313) 6 (318) 1 2 3 1 2 3 4 5 6 7 8 579 8 1 6 580 581 582 577 578 2 2 (314) fld v4 9 10 11 9 10 11 12 10 (322) 12 (324) 311 odd even 12 14 (326) 16 (328) 22 (334) ... ... ... ... the shaded area shows the position variable range of the read sg pulse. however, note that the range may over depending on the setting. ? 5 the value changes by the parameter (category6: tg) setting. odsubv setting value ? 5 odsubv setting value ? 5 evsubv setting value ? 5 evsubv setting value ? 5 odsgv setting value ? 5 evsgv setting value ? 5 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 311 312 0 1 2 3 4 5 6 7 8 298 297 296 299 300 301 302 303 304 305 306 307 308 309 310 300 299 298 297 296 301 302 303 304 305 306 307 308 309 310 311 0 1 2 3 4 5 6 7 8 9 http://www..net/ datasheet pdf - http://www..net/
? 15 ? CXD3172AR horizontal timing chart modesel 0, 1, 2 [510h ntsc] dspck: 606f h (9.534965mhz: 104.88ns) applicable ccd image sensor: icx206ak/226ak/254ak/404ak hd sub v1 v2 v3 pblk clpdm (606) 0 36 h1 h2 10 88 104 106 36 66 54 72 78 65 82 63 34 103 103 89 11 34 clpob v4 42 60 dspck ? 6 50 100 120 150 ? 6 dspck is a clock which is not output by external pins. see the previously described table (relationship between modesel and ea ch clock). dummy: 16ck blank: 53ck back ob: 25ck 48 http://www..net/ datasheet pdf - http://www..net/
? 16 ? CXD3172AR horizontal timing chart modesel 3, 4, 5 [510h pal] dspck: 606f h (9.46875mhz: 105.60ns) applicable ccd image sensor: icx207ak/227ak/255ak/405ak hd sub v1 v2 v3 pblk clpdm 41 h1 h2 10 93 109 116 41 71 59 53 77 83 70 87 108 94 11 39 clpob v4 47 65 dspck ? 7 dummy: 16ck blank: 53ck back ob: 30ck ? 7 dspck is a clock which is not output by external pins. see the previously described table (relationship between modesel and ea ch clock). (606) 0 64 50 100 120 150 108 39 http://www..net/ datasheet pdf - http://www..net/
? 17 ? CXD3172AR horizontal timing chart modesel 6, 8 [760h ntsc] dspck: 910f h (14.31818mhz: 69.84ns) applicable ccd image sensor: icx228ak/258ak/278ak/408ak hd sub v1 v2 v3 pblk clpdm 51 h1 h2 10 127 149 152 51 96 78 105 114 95 121 148 148 11 49 clpob v4 60 87 dspck ? 8 dummy: 22ck blank: 77ck back ob: 40ck ? 8 dspck is a clock which is not output by external pins. see the previously described table (relationship between modesel and ea ch clock). (910) 0 63 50 100 120 150 69 49 128 http://www..net/ datasheet pdf - http://www..net/
? 18 ? CXD3172AR horizontal timing chart modesel 9, a, b [760h pal] dspck: 908f h (14.1875mhz: 70.48ns) applicable ccd image sensor: icx229ak/259ak/279ak/409ak hd sub v1 v2 v3 pblk clpdm 51 h1 h2 10 141 163 166 51 96 78 105 114 95 121 63 49 162 11 49 clpob v4 60 dspck ? 9 ? 9 dspck is a clock which is not output by external pins. see the previously described table (relationship between modesel and ea ch clock). dummy: 22ck blank: 91ck back ob: 40ck (908) 0 50 100 120 150 170 87 69 162 142 http://www..net/ datasheet pdf - http://www..net/
? 19 ? CXD3172AR horizontal timing chart modesel 0, 1, 2 [510h ntsc] applicable ccd image sensor: icx206ak/226ak/254ak/404ak hd v1 v2 v3 (606) 0 odd field even field v4 (606) 0 hd v1 v2 v3 v4 (606) 0 (0) {0} {48} [6] [12] [18] [0] [24] [36] {96} (606) 0 (606) 0 (0) (3) (13) (37) (51) (75) {0} (606) 0 {48} {96} [24] [30] [36] [30] 48 [0] the shaded pulse area shifts while keeping the relative position relationship during shutter setting. (13) (37) 10 24 14 24 19 (3) (51) (75) (94) (94) http://www..net/ datasheet pdf - http://www..net/
? 20 ? CXD3172AR horizontal timing chart modesel 3, 4, 5 [510h pal] applicable ccd image sensor: icx207ak/227ak/255ak/405ak hd v1 v2 v3 (606) 0 odd field even field v4 (606) 0 hd v1 v2 v3 v4 (606) 0 (0) {0} {48} [6] [12] [18] [0] [24] [36] {96} (606) 0 (606) 0 (0) (3) (13) (37) (51) (75) {0} (606) 0 {48} {96} [24] [30] [36] [30] 48 the shaded pulse area shifts while keeping the relative position relationship during shutter setting. (13) (37) 10 24 14 24 19 (3) (51) (75) (94) (94) http://www..net/ datasheet pdf - http://www..net/
? 21 ? CXD3172AR horizontal timing chart modesel 6, 8 [760h ntsc] applicable ccd image sensor: icx228ak/258ak/278ak/408ak hd v1 v2 v3 (910) 0 odd field even field v4 (910) 0 hd v1 v2 v3 v4 (910) 0 (0) (26) (62) {0} {64} [0] [17] [26] [35] [8] {128} (910) 0 (0) (3) (910) 0 {64} [0] {128} [44] [53] [62] (910) 0 (26) (62) (98) (134) {0} [44] [53] [62] 23 36 36 36 36 the shaded pulse area shifts while keeping the relative position relationship during shutter setting. (3) (98) (134) (170) 72 (170) http://www..net/ datasheet pdf - http://www..net/
? 22 ? CXD3172AR horizontal timing chart modesel 9, a, b [760h pal] applicable ccd image sensor: icx229ak/259ak/279ak/409ak hd v1 v2 v3 (908) 0 odd field even field v4 (908) 0 hd v1 v2 v3 v4 (908) 0 (0) (25) (62) {0} {64} [0] [17] [26] [35] [8] {128} (908) 0 (0) (3) (908) 0 {64} [0] {128} [44] [53] [62] (908) 0 (25) (62) (99) (136) {0} [44] [53] [62] 22 37 37 37 37 the shaded pulse area shifts while keeping the relative position relationship during shutter setting. (3) (99) (136) (173) 72 (173) http://www..net/ datasheet pdf - http://www..net/
? 23 ? CXD3172AR high-speed waveform pulse modesel 0, 1, 2, 3, 4, 5 [510h ntsc/pal] applicable ccd image sensor: icx206ak/226ak/254ak/404ak icx207ak/227ak/255ak/405ak hd h2 dspck ? 10 xshd rg mck xrs h1 xshp 1 36/41 88/93 ? 10 dspck is a clock which is not output by external pins. see the previously described table (relationship between modesel and ea ch clock). ? the phase relationship of each pulse shows the logical position relationship. for the actual output, a delay is added to each pulse. ? high-speed pulse pin setting shown above indicates the state of initial setting (delay, duty) of the parameter (category 6: tg ) http://www..net/ datasheet pdf - http://www..net/
? 24 ? CXD3172AR high-speed waveform pulse modesel 6, 8, 9, a, b [760h ntsc/pal] applicable ccd image sensor: icx228ak/258ak/278ak/408ak icx229ak/259ak/279ak/409ak ? 11 dspck is a clock which is not output by external pins. see the previously described table (relationship between modesel and eac h clock). ? the phase relationship of each pulse shows the logical position relationship. for the actual output, a delay is added to each pulse. ? high-speed pulse pin setting shown above indicates the state of initial setting (delay, duty) of the parameter (category 6: tg ) hd h2 dspck ? 11 xshd rg mck xrs h1 xshp 1 51/51 127/141 http://www..net/ datasheet pdf - http://www..net/
? 25 ? CXD3172AR 100pin lqfp (plastic) 25 26 51 50 75 76 1 100 sony code eiaj code jedec code package material lead treatment lead material package mass epoxy resin palladium plating copper alloy package structure detail a lqfp-100p-l01 p-lqfp100-14x14-0.5 16.0 0.2 14.0 0.1 0.5 b (0.22) a 1.5 ? 0.1 + 0.2 0.5 0.2 (15.0) 0? to 10? 0.1 0.1 0.5 0.2 0.1 note: dimension " ? " does not include mold protrusion. 0.7g 0.13 m b = 0.18 0.03 0.125 0.04 detail b : palladium ? b package outline unit: mm sony corporation http://www..net/ datasheet pdf - http://www..net/

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