specifications of any and all sanyo semiconductor co.,l td. products described or contained herein stipulate the performance, characteristics, and functions of the described products in the independent state, and are not guarantees of the performance, characteristics, and functions of the described products as mounted in the customer ' s products or equipment. to verify symptoms and states that cannot be evaluated in an independent device, the customer should always evaluate and test devices mounted in the customer ' sproductsor equipment. any and all sanyo semiconductor co.,ltd. products described or contained herein are, with regard to "standard application", intended for the use as general electronics equipment (home appliances, av equipment, communication device, office equipment, industrial equ ipment etc.). the products mentioned herein shall not be intended for use for any "special application" (medica l equipment whose purpose is to sustain life, aerospace instrument, nuclear control device, burning appliances, t ransportation machine, traffic signal system, safety equipment etc.) that shall require extremely high level of re liability and can directly threaten human lives in case of failure or malfunction of the product or may cause har m to human bodies, nor shall they grant any guarantee thereof. if you should intend to use our products for app lications outside the standard applications of our customer who is considering such use and/or outside the scope of our intended standard applications, please consult with us prior to the intended use. if there is n o consultation or inquiry before the intended use, our customer shall be solely responsible for the use. 21611 sy 20110204-s00003 no.a1927-1/7 LV51139T overview the LV51139T is a protection ic for 2-cell lithium-ion secondary batteries. features ? monitoring function for each cell: detects overcharge and over-discharge conditions and controls the charging and discharging operation of each cell. ? high detection voltage accuracy: over-charge detection accuracy 25mv over-discharge detection accuracy 100mv ? hysteresis cancel function: the hysteresis of over-discharge detection voltage is made small by sensing the connection of a load afte r overcharging has been detected. ? discharge current monitoring function: detects over-currents, load shorting, and excessively high voltage of a charger . ? low current consumption: normal operation mode typ. 6.0 a stand by mode max. 0.2 a ? 0v cell charging function: charging is enabled even when the cell voltage is 0v by giving a potential difference between the v dd pin and v - pin. absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit power supply voltage v dd -0.3 to +12 v input voltage charger minus voltage v - v dd -28 to v dd +0.3 v cout pin voltage vcout v dd -28 to v dd +0.3 v output voltage dout pin voltage vdout v ss -0.3 to v dd +0.3 v allowable power dissipation pd max independent ic 170 mw operating ambient temperature topr -30 to +85 c storage temperature tstg -40 to +125 c ordering number : ena1927 cmos ic 2-cell lithium-ion secondary battery protection ic
LV51139T no.a1927-2/7 electrical characteristics at ta = 25 q c, unless especially specified. ratings parameter symbol conditions min typ max unit operation input voltage vcell between v dd and v ss 1.5 10 v 0v cell charging minimum operation voltage vmin between v dd -v ss =0 and v dd -v - 1.5 v 4.285 4.310 4.335 v ta=0 q c to 45 q c *2 4.275 4.310 4.345 v over-charge detection voltage vd1 ta=0 q c to 60 q c *2 4.270 4.310 4.350 v vm d vd3 4.060 4.110 4.160 v over-charge reset voltage vh1 vm ! vd3 4.210 4.320 v over-charge detection delay time td1 v dd -vc=3.5v o 4.5v, vc-v ss =3.5v 0.5 1.0 1.5 s over-charge reset delay time tr1 v dd -vc=4.5v o 3.5v, vc-v ss =3.5v 20.0 40.0 60.0 ms over-discharge detection voltage vd2 2.2 2.3 2.4 v over-discharge reset hysteres is voltage vh2 10.0 20.0 40.0 mv over-discharge detection delay time td2 v dd -vc=3.5v o 2.2v, vc-v ss =3.5v 50 100 150 ms over-discharge reset delay time tr2 v dd -vc=2.2v o 3.5v, vc-v ss =3.5v 0.5 1.0 1.5 ms over-current detection voltage vd3 v dd -vc=3.5v, vc-v ss =3.5v 0.11 0.13 0.15 v over-current reset hysteresis voltage vh3 v dd -vc=3.5v, vc-v ss =3.5v 5.0 10.0 20.0 mv over-current detection delay time td3 v dd -vc=3.5v, vc-v ss =3.5v 10.0 20.0 30.0 ms over-current reset delay time tr3 v dd -vc=3.5v, vc-v ss =3.5v 0.5 1.0 1.5 ms short circuit detection voltage vd4 v dd -vc=3.5v, vc-v ss =3.5v 1.0 1.3 1.6 v short circuit detection delay time td4 v dd -vc=3.5v, vc-v ss =3.5v 0.2 0.5 0.8 ms excessive charger detection voltage vd5 v dd -vc=3.5v, vc-v ss =3.5v voltage between (v - )-v ss -0.275 -0.200 -0.125 v excessive charger return hysteresis voltage vh5 v dd -vc=3.5v, vc-v ss =3.5v 10 30 50 mv standby reset voltage vstb v dd -vc=2.0v, vc-v ss =2.0v voltage between (v - )-v ss v dd u 0.4 v dd u 0.5 v dd u 0.6 v excessive charger detection delay time td5 v dd -vc=3.5v, vc-v ss =3.5v *1 0.5 1.5 3.0 ms excessive charger return delay time tr5 v dd -vc=3.5v, vc-v ss =3.5v 0.5 1.5 3.0 ms reset resistance (connected to v dd ) r dd 100 200 400 k : reset resistance (connected to v ss ) r ss 5 10 18 k : cout nch on voltage v o l1 i o l=50 p a, v dd -vc=4.4v, vc-v ss =4.4v 0.5 v cout pch on voltage v o h1 i o l=50 p a, v dd -vc=3.9v, vc-v ss =3.9v v dd -0.5 v dout nch on voltage v o l2 i o l=50 p a, v dd -vc=vd2(min), vc-v ss =vd2(min) 0.5 v dout pch on voltage v o h2 i o l=50 p a, v dd -vc=3.9v, vc-v ss =3.9v v dd -0.5 v vc input current ivc v dd -vc=3.5v, vc-v ss =3.5v 0.0 1.0 p a current drain i dd v dd -vc=3.5v, vc-v ss =3.5v 6.0 13.0 p a standby current istb v dd -vc=2.2v, vc-v ss =3.5v 0.2 p a t pin input on-voltage vtest v dd -vc=3.5v, vc-v ss =3.5v v dd u 0.4 v dd u 0.5 v dd u 0.6 v *1: upon connecting to charger upon over-discharge, the delay time after recovery from over-discharge. *2: the ratings of the table above is a design targets and are not measured.
LV51139T no.a1927-3/7 package dimensions unit : mm (typ) 3245b pin assignment pin functions block diagram pd max -- ta -30 -20 0 20 40 60 80 100 68 0 50 100 150 200 170 independent ic ambient temperature, ta -- 1 v dd 2 cout 3 v - 4 v ss 8 7 6 5 dout t vc sense top view sanyo : msop8(150mil) 3.0 1.1max 3.0 0.5 4.9 12 8 0.25 0.65 (0.53) (0.85) 0.125 0.08 6 + - + - + - + - 4 5 + - 3 td1,tr1 td2,tr2 td3,tr3 + - 1 td4 2 8 v ss v - sence v dd vc cout dout 7 t td5,tr5 + - level shift delay control logic pin no. symbol description 1 v dd v dd pin 2 cout overcharge detection output pin 3 v - charger minus voltage input pin 4 v ss v ss pin 5 sense sense pin 6 vc intermediate voltage input pin 7 t pin to shorten detection time (?h?: short-circuit mode, ?l or open?: normal mode) 8 dout overdischarge detection output pin
LV51139T no.a1927-4/7 functional description over-charge detection if either of the cell voltage is equal to or more than the over-charge detection voltage, stop further charging by turning ?l? the cout pin and turning off external nch mo s fet after the over-charge detection delay time. this delay time is set by the internal counter. the over-charge detection comparator ha s the hysteresis function. note that this hysteresis can be cancelled by connecting the load after detection of over-charge detection. and it become s small to hysteresis peculiar to a comparator. note that shor t-circuit can be detected. over-charge return if both cell voltages become equal to or less than the over-charge release voltage Q over-discharge detection when either cell voltage is equal to or less than over-discharge voltage, the ic stops further discharging by turning the dout pin ?l? and turning off external nch mos fet after the over-charge detection delay time. the ic goes into stand-by mode after detecting over-discharge and its consumption current is kept at about 0a. after over-discharge detection, the v- pin will be connected to v dd pin via internal resistor (typ 200k ? over-discharge release release from over-discharge is made by only connecting charger. if the v- pin voltage becomes equal to or lower than the stand-by release voltage by connecting charger after detecting over-discharge, the ic is released from the stand-by state to start cell voltage monitoring. if both cell voltages become equal to or more than the over-discharge detection voltage by charging, the dout pin returns to ?h ? after the over-discharge release delay time set by the internal counter. over-current detection when excessive current flows through the battery, the v- pin voltage rises by the on resister of external mos fet and becomes equal to or more than the over-current detection voltage, the dout pin turns to ?l? after the over-current detection delay time and the external nch mos fet is turn ed off to prevent excessive current in the circuit. the detection delay time is set by the internal counter. after detection, the v- pin will be connected to v ss via internal resistor (typ 10k ? short circuit detection if greater discharging current flows through the battery and the v- pin voltage becomes equal to or more than the short-circuit detection voltage, it will go into short-circuit de tection state after the short circuit delay time shorter than the over-current detection delay time. wh en short-circuit is detected, just like the time of over-current detection, the dout pin turns to ?l? and external nch mos fet is turned of f to prevent high current in the circuit. the v- pin will be connected to v ss after detection via internal resistor (typ 10k ? over-current/short-detection return after detecting over-current or short circuit, the return resistor (typ.10km ?
LV51139T no.a1927-5/7 excessive charger detection/release if the voltage between v- pin and v ss pin becomes equal to or less than the excessive charger detection voltage by connecting a charger, no charging can be made by turning the cout pin ?l? after delay time and turning off the external nch mos fet. if that voltage returns to equal to or more than the excessive charger detection voltage during detection delay time, the excessive charger detection will be stopped. if the voltage between v- pin and v ss pin becomes equal to or more than the excessive charger detection voltage after excessive charger detection, the cout returns to ?h? after delay time. the detection/return delay time is set internally. if dout pin is ?l?, charging will be made through the parasitic diode of external nch fet on dout pin. in that case, the voltage between v- pin and v ss pin is nearly -vf which is less than the over-charger detection voltage, therefore no excessive charger detection will be made during ov er-discharge, over-current and short-circuit detection. furthermore, if excessive voltage char ger is connected to the over-discharge d battery, no excessive charger detection is made while the dout pin is ?l?. but the battery is continued charging through the parasitic diode. if the battery voltage rises to the over-discharge detection voltage and the voltage between v- pin and v ss pin remains equal to or less than the excessive charger detection voltage, the dela y operation will be started afte r dout pin turns to ?h?. 0v cell charging operation if voltage between v dd and v becomes equal to or more than the 0v cell charging lowest operation voltage when the cell voltage is 0v, the cout pin turns to ?h? and charging is enabled. shorten the test time by turning t pin to the v dd , the delay times set by the internal counter can be cut. if t pin is ?open?, ?l? the delay times are normal. delay time not set by the counter just like as short circuit detection delay cannot be controlled by this pin. by the substrate layout, the power-supply voltage is lowered due to an excessive current at the load short. therefore, we recommend that the t pi n is connected to the vss pin because the problem that this ic enters a standby mode might be caused. operation in case of detection overlap overlap state operation in case of detection overlap state after detection when, during over- charge detection, over-discharge detection is made, over-charge detection is preferred. if over- discharge state continues even after over- charge detection, over-discharge detection is resumed. when over-charge detection is made first, v - is released. when over-discharge is detected after over-charge detection, the standby state is not effectuated. note that v - is connected to v dd via 200k ? . over-current detection is made, (*1) both detections? can be made in parallel. over-charge detection continues even when the over-current state occu rs. if the over-charge state occurs first, ove r-current detection is interrupted. (*2) when over-current is detected first, v - is connected to v ss via 10k ? . when over-charge detection is made first, v - is released. during over-discharge detection, over-charge detection is made, over-discharge detection is interrupted and over-charge detection is preferred. when over- discharge state continues even after over- charge detection, over-discharge detection is resumed. the standby state is not effectuated when over- discharge detection is made after over-charge detection. note that v - is connected to v dd via 200k ? . over-current detection is made, (*3) both detections can be made in parallel. over-discharge detection continues even when the over-current state is effectuated first. over- current detection is interrupted when the over- discharge state is effectuated first, (*4) if over-current state is made first, v- will be connected to v ss via 10k ? . if over-discharge detection is made next, v- will be disconnected from v ss and connected to v dd via 200k ? to get into stand-by mode. if over-discharge state is made first, v- will be connected to v dd via 200k ? to get into stand-by mode. over-charge detection is made, (*1) (*2) when, during over- current detection, over-discharge detection is made, (*3) (*4) (note) short-circuit detection can be made independently. excessive charger detection cannot be made during over -discharge, over-current and short-circuit detection. and its delay time starts after the dout pin returns to ?h?.
LV51139T no.a1927-6/7 timing chart [cout output system] [dout output system] v dd v - vd1 vr1 vd2 vd3 vd4 v dd v ss v ss v dd dout td2 tr2 td3 tr3 td4 tr3 v dd v - cout vd1 vr1 vd2 vd3 vd4 v dd v ss v- v dd td1 tr1 td1 tr1 vd5 v - v dd cout vd5 td2 td5 tr5 td2 td5 charger connection charger connection charger connection load connection hysteresis cancellation by load connection load connection load connection excessive charger connection the charge return is decided by the voltage of the charger in the charger connection discharging via fet parasite di. discharging via fet parasite di. over-charge detection state over-charge detection state state of excessive charger detection load connection load connection load connection load connection excessive charger connection charger connection discharging via fet parasite di. over-current occurrence load short-circuit occurrence to standby to standby over-charge detection state over-charge detection state short-circuit detection state the excessive charger detection when the over-electrical discharge battery is charged operates after the over-electrical discharge returns.
LV51139T ps no.a1927-7/7 sanyo semiconductor co.,ltd. assumes no responsib ility for equipment failures that result from using products at values that exceed, even momentarily, rate d values (such as maximum ra tings, operating condition ranges, or other parameters) listed in products specif ications of any and all sanyo semiconductor co.,ltd. products described or contained herein. sanyo semiconductor co.,ltd. strives to supply high-qual ity high-reliability products, however, any and all semiconductor products fail or malfunction with some probabi lity. it is possible that these probabilistic failures or malfunction could give rise to acci dents or events that could endanger human lives, trouble that could give rise to smoke or fire, or accidents that could cause dam age to other property. when designing equipment, adopt safety measures so that these kinds of accidents or e vents cannot occur. such measures include but are not limited to protective circuits and error prevention c ircuits for safe design, redundant design, and structural design. upon using the technical information or products descri bed herein, neither warranty nor license shall be granted with regard to intellectual property rights or any other rights of sanyo semiconductor co.,ltd. or any third party. sanyo semiconductor co.,ltd. shall not be liable f or any claim or suits with regard to a third party's intellctual property rights which has resulted from the use of the technical information and products mentioned above. information (including circuit diagr ams and circuit parameters) herein is for example only; it is not guaranteed for volume production. any and all information described or contained herein are subject to change without notice due to product/technology improvement, etc. when designing equi pment, refer to the "delivery specification" for the sanyo semiconductor co.,ltd. product that you intend to use. in the event that any or all sanyo semiconductor c o.,ltd. products described or contained herein are controlled under any of applicable local export control laws and regulations, such products may require the export license from the authorities conc erned in accordance with the above law. no part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, or any in formation storage or retrieval system, or otherwise, without the prior written consent of sanyo semiconductor co.,ltd. application circuit example components recommended value max unit r1, r2 100 500 : r3 2k 4k : r4 100 1k : c1, c2, c3 0.1 p 1 p f * these numbers don't mean to guara ntee the characteristic of the ic. * in addition to the components in the upper diagram, it is necessary to insert a capacitor with enough capacity between v dd and v ss of the ic as near as possible to stab ilize the power supply voltage to the ic. * it is advisable to connect the t pin with the vss pin. there is no problem even if the t pin is left open. this catalog provides information as of february, 2 011. specifications and information herein are subject to change without notice. v dd cout v - v ss dout vc sense LV51139T + r1 r2 c1 c2 r4 r3 v ss c3 t
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