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ltm8020 1 8020fd typical application features applications description 200ma, 36v dc/dc module regulator the ltm ? 8020 is a complete 200ma, dc/dc step-down power supply. included in the package are the switch- ing controller, power switches, inductor, and all support components. operating over an input voltage range of 4v to 36v, the ltm8020 supports an output voltage range of 1.25v to 5v, set by a single resistor. only bulk capacitors are needed to finish the design. the ltm8020 meets the radiated emissions requirements of en55022. conducted emission requirements can be met by adding standard filter components. the low profile (2.32mm) tiny package enables utilization of unused space on the bottom of pc boards for high density point of load regulation. the ltm8020 is packaged in a thermally enhanced, compact (6.25mm 6.25mm) and low profile (2.32mm) over-molded land grid array (lga) package suitable for automated assembly by standard surface mount equip- ment. the ltm8020 is pb-free and rohs compliant. l , lt, ltc, ltm, module, linear technology, the linear logo and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. efficiency and power loss vs load current n complete step-down switch mode power supply n wide input voltage range: 4v to 36v n 1.25v to 5v output voltage n en55022 class b compliant n 200ma output current n current mode control n C55c to 125c operating temperature (ltm8020mpv) n pb-free (e4) rohs compliant package with gold pad finish n tiny, low profile (6.25mm 6.25mm 2.32mm) surface mount lga package n automotive battery regulation n power for portable products n distributed supply regulation n industrial supplies n wall transformer regulation 6.5v in to 36v in , 5v at 200ma dc/dc module ? regulator v in v out ltm8020 bias shdn 10f 165k 1% 2.2f v in *6.5v to 36v 8020 ta01 gnd adj v out 5v 200ma load current (ma) 30 efficiency (%) power loss (mw) 40 60 80 90 0.1 10 100 3470 ta01b 20 1 70 50 10 1 1000 100 10 0.1 *running voltage range. please refer to applications information for start-up details
ltm8020 2 8020fd pin configuration absolute maximum ratings v in , shdn voltage ....................................................40v adj voltage ................................................................5v bias voltage .............................................................25v v in + bias voltage ....................................................47v v out voltage .............................................................10v internal operating temperature range .. C40c to 125c storage temperature range .................. C55c to 125c maximum solder temperature .............................. 260c (note 1) electrical characteristics symbol parameter conditions min typ max units v in input dc voltage l 436v v out output dc voltage 0 < i out 200ma; 167k < r adj < 1.2 5 v r adj(min) minimum allowable r adj (note 3) 163 k i lk leakage from in to out v shdn = 0v, bias = 0v 1.2 6 a i out continuous output dc current 5.5v v in 36v, r adj = 301k, v o = 3.3v 0 200 ma i q(vin) quiescent current into in shdn = 0.2v, bias open bias = 3v, not switching bias = 0v, not switching l 10 35 1 18 50 a a a i q(bias) quiescent current into bias shdn = 0.2v, bias = 0v bias = 3v, not switching bias = 0v, not switching l 25 0.5 60 1.5 a a a v out /v out line regulation 5v v in 36v, i out = 200ma, r adj open 1 % v out /v out load regulation v in = 24v, 0 i out 200ma, v out = 3.3v 2 % the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 10v, v shdn = 10v, v bias = 3v, external c in = 2.2f, c out = 4.7f. (note 2) top view 5 1 2 3 4 e ab c d shdn gnd adj v out bias v in lga package 21-lead (6.25mm s 6.25mm s 2.32mm) t jmax = 125c, ja = 23.1c/w ja derived from 5cm 5cm pcb with 4 layers weight = 0.25g lead free finish part marking* package description temperature range (note 2) ltm8020ev#pbf ltm8020v 21-lead (6.25mm 6.25mm) C40c to 85c ltm8020iv#pbf ltm8020v 21-lead (6.25mm 6.25mm) C40c to 85c ltm8020mpv#pbf ltm8020mpv 21-lead (6.25mm 6.25mm) C55c to 125c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a l abel on the shipping container. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ this product is only offered in trays. for more information go to: http://www.linear.com/packaging/ order information
ltm8020 3 8020fd i load (ma) efficiency (%) 90 80 70 60 50 40 30 20 10 0 0.1 10 100 1000 8020 g03 1 12v in 24v in 36v in i load (ma) efficiency (%) 90 80 70 60 50 40 30 20 10 0 0.1 10 100 1000 8020 g01 1 5v in 12v in 24v in 36v in electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltm8020e is guaranteed to meet performance specifications from 0c to 85c ambient. specifications over the full C40c to 85c ambient operating temperature range are assured by design, characterization and correlation with statistical process controls. the the l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25c. v in = 10v, v shdn = 10v, v bias = 3v, external c in = 2.2f, c out = 4.7f. (note 2) symbol parameter conditions min typ max units v out(ac_rms) output ripple (rms) i out = 100ma, v out = 3.3v, v in = 24v 7.5 mv f sw switching frequency i out = 200ma 450 khz i sc output short-circuit current v in = 36v, v out = 0v 350 ma v adj voltage at adj pin l 1.228 1.265 v v bias(min) minimum bias voltage for proper operation l 3v i adj current out of adj pin adj = 0v, v out = 5v, v shdn = 0v l 9.65 10.35 a i shdn shdn pin current v shdn = 2.5v 1 5 a v ih( shdn ) shdn input high voltage 2.5 v v il( shdn ) shdn input low voltage 0.2 v ltm8020i is guaranteed to meet specifications over the full C40c to 85c ambient operating temperature range. the ltm8020mp is guaranteed to meet specifications over the full C55c to 125c internal operating temperature range. note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. note 3: guaranteed by design. typical performance characteristics 3.3v out efficiency 3.3v out power loss 5v out efficiency i out (ma) power loss (mw) 1000 100 10 1 0.1 0.1 10 100 1000 8020 g02 1 5v in 12v in 24v in 36v in t a = 25c unless otherwise noted.
ltm8020 4 8020fd output voltage (v) 1 2 input voltage (v) 3 4 5 6 2345 4356 g12 7 8 to start i out = 200ma to run input voltage (v) 0 0 input current (ma) 20 40 60 80 10 20 30 40 4356 g10 100 0.18 0.16 0.14 0.12 0.10 0.08 0.06 0.04 0.02 0 output current (a) 0 input current (a) 0.05 0.10 0.15 0.20 4356 g05 1.8v out 2.5v out 3.3v out output current (a) 0 0 input current (a) 0.010 0.020 0.030 0.040 0.05 0.10 0.15 0.20 4356 g07 0.050 0.060 1.8v out 2.5v out 3.3v out 5v out i out (ma) power loss (mw) 1000 100 10 1 0.1 0.1 10 100 1000 8020 g04 1 12v in 24v in 36v in typical performance characteristics input current vs output current (24v in ) input quiescent current vs input voltage input current vs input voltage (output short) minimum required input voltage vs load (v out = 3.3v) 5v out power loss input current vs output current (5v in ) input current vs output current (12v in ) output current (a) 0 0 input current (a) 0.020 0.040 0.060 0.080 0.05 0.10 0.15 0.20 4356 g06 0.100 0.120 1.8v out 2.5v out 3.3v out 5v out output current (a) 0 0 input current (a) 0.010 0.020 0.005 0.015 0.025 0.030 0.040 0.05 0.10 0.15 0.20 4356 g08 0.035 0.045 1.8v out 2.5v out 3.3v out 5v out input current vs output current (36v in ) input voltage (v) 0 0 quiescent current (a) 1 2 3 4 10 20 30 40 4356 g09 5 minimum required input voltage vs output voltage load current (ma) 0 3.0 input voltage (v) 3.5 4.0 4.5 5.0 50 100 150 200 4356 g11 5.5 6.0 shdn control to start to run t a = 25c unless otherwise noted.
ltm8020 5 8020fd pin functions v in (pins a1, a2): the v in pins supply current to the ltm8020s internal regulator and to the internal power switch. these pins must be locally bypassed with an external, low esr capacitor of at least 1f. v out (pins a4, a5, b4, b5, c4, c5): power output pins. an external capacitor is connected from v out to gnd in most applications. apply output load between these pins and gnd. bias (pin c3): the bias pin connects to the internal boost schottky diode and to the internal regulator. tie to v out when v out > 3v or to another dc voltage greater than 3v otherwise. when bias > 3v the internal circuitry will be powered from this pin to improve efficiency. main regulator power will still come from v in . shdn (pin c1): the shdn pin is used to put the ltm8020 in shutdown mode. tie to ground to shut down the ltm8020. apply 2v or more for normal operation. if the shutdown feature is not used, tie this pin to v in . gnd (pins c2, d1, d2, d3, d4, d5, e2, e3, e4, e5): the gnd connections serve as the main signal return and the primary heat sink for the ltm8020. tie the gnd pins to a local ground plane below the ltm8020 and the circuit components. return the feedback divider to this signal. adj (pin e1): the ltm8020 regulates its adj pin to 1.25v. connect the adjust resistor from this pin to gnd. the value of this adjust resistor is determined by the equation r adj = 623.75/(v out C 1.25), where r adj is in k . note that the adj pin is open circuit if v out = 1.25v. typical performance characteristics t a = 25c unless otherwise noted. input voltage (v) 0 0 temperature rise (c) 5 10 15 20 10 20 30 50 40 8020 g13 25 3.3v out 5v out temperature rise vs input voltage (full load, t a = 25c) turn-on behavior (6v in , 3.3v out , no load) v out 2v/div shdn 5v/div input current 100ma/div 50s/div 8020 g14 frequency (mhz) 0 emissions level (dbv/m) 50 70 90 800 8020 g15 30 10 40 60 80 20 0 C10 200 400 600 1000 36v in 5v out full load en55022 class b limit radiated emissions
ltm8020 6 8020fd current mode controller 8020 bd 22h 0.1f 10f 15pf 499k bias adj gnd shdn v in v out block diagram
ltm8020 7 8020fd operation the ltm8020 is a standalone nonisolated step-down switching dc/dc power supply. it can deliver up to 200ma of dc output current with only bulk external input and output capacitors. this module provides a precisely regulated output voltage programmable via one external resistor from 1.25vdc to 5vdc. the input voltage range is 4v to 36v. given that the ltm8020 is a step-down con- verter, make sure that the input voltage is high enough to support the desired output voltage and load current. see block diagram. the ltm8020 contains a current mode controller, power switching element, power inductor, power schottky diode and a modest amount of input and output capacitance. for some applications, as shown in table 1, no output capacitor is necessary. with its high performance current mode controller and internal feedback loop compensation, the ltm8020 module has sufficient stability margin and good transient perfor- mance under a wide range of operating conditions with a wide range of output capacitors, even all ceramic ones (x5r or x7r). current mode control provides cycle-by-cycle fast current limit, and automatic current limiting protects the module in the event of a short circuit or overload fault. the ltm8020 is built upon a variable frequency control- ler. the on time, off time and switching frequency are dependent upon the input voltage, output voltage and load current. the drive circuit for the internal power switching element is powered through the bias pin. power this pin with at least 3v. the ltm8020 is equipped with two operating modes, dependant upon the load current. when the load current is sufficiently high, the ltm8020 will switch continuously (see figure 1a). if the load is very light, or if the input voltage is high relative to the output voltage, the part will operate in burst mode ? operation, alternating between its micropower and switching states to keep the output in regulation and hold the power dissipation to a minimum (see figure 1b). if the shdn pin is grounded, all internal circuits are turned off and v in current reduces to the device leakage current, typically a few nanoamps. figure 1. output voltage and internal inductor current v out 20mv/div i l 100ma/div 1ms/div v out 20mv/div i l 100ma/div 5s/div 8020 f01b no load 10ma load (1b) burst mode operation v out 20mv/div i l 100ma/div 1s/div v out 20mv/div i l 100ma/div 1s/div (1a) continuous operation 8020 f1a 200ma load 150ma load
ltm8020 8 8020fd for most applications, the design process is straight forward, summarized as follows: 1. look at table 1 and find the row that has the desired input range and output voltage. 2. apply the c in , c out , r adj and bias connection indicated on that row. while these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. if an output voltage other than those listed in table 1 is desired, use the equation r adj = 623.75/(v out C 1.25), where r adj is in k . as a starting point, use values for c in and c out that correspond to the input voltage and output voltage that most closely matches the intended application, and verify proper operation over the systems line, load and environmental conditions. capacitor selection considerations the c in and c out capacitor values in table 1 are the minimum recommended values for the associated oper- ating conditions. applying capacitor values below those indicated in table 1 is not recommended, and may result in undesirable operation. an input system bulk capacitor is assumed. using larger values is generally acceptable, and can yield improved dynamic response, if it is neces- sary. again, it is incumbent upon the user to verify proper operation over the intended systems line, load and envi- ronmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and ap- plied voltage and give dependable service. other types, including y5v and z5u have very large temperature and voltage coefficients of capacitance. in an application cir- cuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. ceramic capacitors are also piezoelectric. the ltm8020s switching frequency depends on the load current, and at light loads it can excite a ceramic capacitor at audio applications information frequencies, generating audible noise. since the ltm8020 operates at a lower current limit during burst mode opera- tion, the noise is typically very quiet to a casual ear. if this audible noise is unacceptable, use a high performance electrolytic capacitor at the output. the input capacitor can be a parallel combination of a 2.2f ceramic capacitor and a low cost electrolytic capacitor. a final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the ltm8020. a ceramic input capacitor combined with trace or cable inductance forms a high q (under damped) tank circuit. if the ltm8020 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possi- bly exceeding the devices rating. this situation is easily avoided; see the hot-plugging safely section. shorted input protection care needs to be taken in systems where the output will be held high when the input to the ltm8020 is absent. this may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode ored with the ltm8020s output. if the v in pin is allowed to float and the shdn pin is held high (either by a logic signal or because it is tied to v in ), then the ltm8020s internal circuitry will pull its quiescent current from its output. this is fine if your system can tolerate a few milliamps in this state. if you ground the shdn pin, this quiescent current will drop to essentially zero. how- ever, if the v in pin is grounded while the output is held high, then parasitic diodes inside the ltm8020 can pull large currents from the output through the internal power switch, possibly damaging the device. figure 2 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. figure 2. diode d1 prevents a shorted input from discharging a backup battery tied to the output, as well as protecting the ltm8020 from a reversed input v in ltm8020 shdn v in 8020 f02 gnd d1 100k 1m
ltm8020 9 8020fd applications information pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the ltm8020. the ltm8020 is never-the- less a switching power supply, and care must be taken to minimize emi and ensure proper operation. even with the high level of integration, you may fail to achieve specified operation with a haphazard or poor layout. see figure 3 for a suggested layout. ensure that the grounding and heat sinking are acceptable. a few rules to keep in mind are: 1. place the c in capacitor as close as possible to the v in and gnd connection of the ltm8020. 2. place the c out capacitor as close as possible to the v out and gnd connection of the ltm8020. 3. place the c in and c out capacitors such that their ground current flows directly adjacent or underneath the ltm8020. 4. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the ltm8020. 5. the copper pours also serve as the heat sink for the ltm8020. place several vias in the gnd plane to act as heat pipes to other layers of the printed circuit board. positive-to-negative voltage regulation the ltm8020 can generate a negative output by tying the v out pads to system ground and connecting gnd as shown in the typical applications section. in this configuration, shdn must be level shifted or referenced to gnd, and the available output current may be reduced. hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of ltm8020. however, these capacitors can cause problems if the ltm8020 is plugged into a live supply (see linear technology application note 88 for a complete discussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an under damped tank circuit, and the volt- age at the v in pin of the ltm8020 can ring to twice the nominal input voltage, possibly exceeding the ltm8020s rating and damaging the part. if the input supply is poorly controlled or the user will be plugging the ltm8020 into an energized supply, the input network should be designed to prevent this overshoot. figure 4 shows the waveforms that result when an ltm8020 circuit is connected to a 24v supply through six feet of 24-gauge twisted pair. the first plot is the response with a 2.2f ceramic capacitor at the input. the input voltage rings as high as 35v and the input current peaks at 20a. one method of damping the tank circuit is to add another capacitor with a series resistor to the circuit. in figure 4b an aluminum electrolytic capacitor has been added. this capacitors high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. an alternative solution is shown in figure 4c. a 1 resistor is added in series with the input to eliminate the voltage overshoot (it also reduces the peak input current). a 0.1f capacitor improves high frequency filtering. this solution is smaller and less expensive than the electrolytic capacitor. for high input voltages its impact on efficiency is minor, reducing efficiency less than one-half percent for a 5v output at full load operating from 24v. figure 3. layout showing suggested external components, gnd plane and thermal vias gnd vias to gnd plane v out adj copper bias shdn v in c out r adj c in 8020 f03
ltm8020 10 8020fd high temperature considerations the die temperature of the ltm8020 must be lower than the maximum rating of 125c, so care should be taken in the layout of the circuit to ensure good heat sinking of the ltm8020. to estimate the junction temperature, ap- proximate the power dissipation within the ltm8020 by applying the typical efficiency stated in this data sheet to the desired output power, or, if you have an actual module, by taking a power measurement. then calculate the inter- nal temperature rise of the ltm8020 above the surface of the printed circuit board by multiplying the modules power dissipation by the thermal resistance. the actual thermal resistance of the ltm8020 to the printed circuit board depends upon the layout of the circuit board, but the thermal resistance given in the pin configuration, which is based upon a 25cm 2 4-layer fr4 pc board, and the typical performance characteristics can be used a guide. finally, be aware that at high ambient temperatures the internal schottky diode will have significant leakage current increasing the quiescent current of the ltm8020. bias pin considerations the bias pin is used to provide drive power for the internal power switching stage and operate internal circuitry. for proper operation, it must be powered by at least 3v. if the output voltage is programmed to be 3v or higher, simply tie bias to v out . if v out is less than 3v, bias can be tied to v in or some other voltage source. in all cases, ensure that the maximum voltage at the bias pin is both less than 25v and the sum of v in and bias is less than 47v. if bias power is applied from a remote or noisy voltage source, it may be necessary to apply a decoupling capacitor locally to the ltm8020. applications information figure 4. a well chosen input network prevents input voltage overshoot and ensures reliable operation when the ltm8020 is connected to a live supply + ltm8020 2.2f v in 10v/div i in 10a/div v in 10v/div i in 10a/div v in 10v/div i in 10a/div 10s/div 10s/div 10s/div v in closing switch simulates hot plug i in (4a) (4b) (4c) low impedance energized 24v supply stray inductance due to 6 feet (2 meters) of twisted pair + ltm8020 2.2f 10f 35v ai.ei. ltm8020 2.2f 0.1f 1 8020 f04
ltm8020 11 8020fd applications information table 1. recommended external component values and configuration v in range v out c in c out r adj bias connection 4.5v - 36v 1.25v 2.2f 50v 1206 x7r 47f 6.3v 1206 x5r open >2v, < 25v 4.5v - 36v 1.5v 2.2f 50v 1206 x7r 47f 6.3v 1206 x5r 2.43m >2v, < 25v 4.5v - 36v 1.8v 2.2f 50v 1206 x7r 47f 6.3v 1206 x5r 1.1m >2v, < 25v 4.5v - 36v 2.5v 2.2f 50v 1206 x7r 22f 6.3v 1206 x7r 499k v out 4.5v - 36v 3.3v 2.2f 50v 1206 x7r 10f 6.3v 1206 x7r 301k v out 6.5v - 36v 5v 2.2f 50v 1206 x7r 10f 6.3v 1206 x7r 165k v out 4.5v - 15v 1.25v 2.2f 16v 0805 x7r 22f 6.3v 1206 x7r open v in 4.5v - 15v 1.5v 2.2f 16v 0805 x7r 10f 6.3v 0805 x7r 2.43m v in 4.5v - 15v 1.8v 2.2f 16v 0805 x7r 10f 6.3v 0805 x7r 1.1m v in 4.5v - 15v 2.5v 2.2f 16v 0805 x7r 10f 6.3v 0805 x7r 499k v in 4.5v - 15v 3.3v 2.2f 16v 0805 x7r 10f 6.3v 0805 x7r 301k v out 6.5v - 15v 5v 2.2f 16v 0805 x7r none 165k v out 9v - 24v 1.25v 1f 25v 0805 x7r 47f 6.3v 0805 x5r open v in 9v - 24v 1.5v 1f 25v 0805 x7r 47f 6.3v 0805 x7r 2.43m v in 9v - 24v 1.8v 1f 25v 0805 x7r 10f 6.3v 0805 x7r 1.1m v in 9v - 24v 2.5v 1f 25v 0805 x7r 10f 6.3v 0805 x7r 499k v in 9v - 24v 3.3v 1f 25v 0805 x7r 10f 6.3v 0805 x7r 301k v out 9v - 24v 5v 4.7f 25v 0805 x7r 10f 6.3v 0805 x5r 165k v out 18v - 36v 1.25v 2.2f 50v 1206 x7r 47f 6.3v 1206 x5r open >2v, <25v 18v - 36v 1.5v 2.2f 50v 1206 x7r 47f 6.3v 1206 x5r 2.43m >2v, <25v 18v - 36v 1.8v 2.2f 50v 1206 x7r 22f 6.3v 1206 x7r 1.1m >2v, <25v 18v - 36v 2.5v 2.2f 50v 1206 x7r 10f 6.3v 0805 x7r 499k v out 18v - 36v 3.3v 2.2f 50v 1206 x7r 10f 6.3v 0805 x7r 301k v out 18v - 36v 5v 2.2f 50v 1206 x7r 10f 6.3v 0805 x7r 165k v out 3.3v - 30v C3.3v 2.2f 50v 1206 x7r 22f 6.3v 0805 x7r 301k v out 5v - 30v C5v 2.2f 50v 1206 x7r 10f 6.3v 0805 x7r 165k v out minimum input voltage the ltm8020 is a step-down converter, so a minimum amount of headroom is required to keep the output in regulation. for most applications at full load, the input needs to be at least 1.5v above the desired output. in addition, the input voltage required to turn on depends upon how the shdn pin is tied. it takes more input voltage to turn on if shdn is tied to v in than if the turn-on is controlled by raising shdn when v in is in the required operating range. a graph of the input voltage required to turn the ltm8020 on when shdn is tied to v in or when shdn is switched is given in the typical performance characteristics section. electromagnetic compliance the ltm8020 was evaluated by an independent nationally recognized test lab and found to be compliant with en55022 class b: 2006 by a wide margin. a sample graph of the ltm8020s radiated emc performance is given in the typical performance characteristics section, while further data, operating conditions and test setup are detailed in the electromagnetic compatibility test report, available on the linear technology website. conducted emissions requirements may be met by adding an appropriate input power line filter. the proper implementation of this filter depends upon the system operating and performance conditions as a whole, of which the ltm8020 is typically only a component, so conducted emissions are not addressed at this level.
ltm8020 12 8020fd v in (v) 0 0 i load (ma) 50 100 150 200 10 15 52030 25 8020 ta08 250 v in v out ltm8020 bias shdn 10f x5r 165k 1% 2.2f C5v v in * 5v to 30v 8020 ta06 adj gnd C5v 85a optional schottky clamp C5v positive-to-negative converter v in v out ltm8020 bias shdn 165k 1% 2.2f v in * 6.5v to 15v 8020 ta05 gnd adj v out 5v 200ma 5v step-down converter (no output capacitor required) typical applications v in v out ltm8020 shdn 47f x5r 1f v in * 4.5v to 24v 8020 ta02 gnd adj v out 1.25v 200ma bias v in v out ltm8020 bias shdn 10f x5r 301k 1% 1f v in * 4.5v to 36v 8020 ta04 gnd adj v out 3.3v 200ma 1.25v step-down converter 3.3v step-down converter v in v out ltm8020 shdn bias 22f x7r 1.1m 1% 2.2f v in * 4.5v to 15v 8020 ta03 gnd adj v out 1.8v 200ma 1.8v step-down converter C5v positive-to-negative converter output vs input voltage * * running voltage range. please refer to applications information for start-up details
ltm8020 13 8020fd package description notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters land designation per jesd mo-222, spp-010 and spp-020 5. primary datum -z- is seating plane 6. the total number of pads: 21 4 3 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or a marked feature symbol aaa bbb tolerance 0.15 0.10 2.22 C 2.42 detail a package side view detail a substrate mold cap 0.27 C 0.37 2.5400 2.5400 1.2700 1.2700 0.0000 1.95 C 2.05 bbb z z 6.250 bsc package top view lga 21 0407 rev a 6.250 bsc 4 pad 1 corner 3 pads see notes x y aaa z aaa z 2.5400 1.5875 0.9525 1.2700 0.3175 0.3175 0.0000 2.5400 suggested pcb layout top view 1.2700 0.0000 1.27o bsc 0.605 C 0.665 0.605 C 0.665 5.080 5.080 bsc c(0.30) pad 1 ea 5 1 2 3 4 b c bottom view d ltmxxxxxx mmodule tray pin 1 bevel package in tray loading orientation component pin a1 lga package 21-lead (6.25mm 6.25mm 2.32mm) (reference ltc dwg # 05-08-1803 rev a)
ltm8020 14 8020fd package description ltm8020 pinout (sorted by pin number) pin signal description a1 v in a2 v in a4 v out a5 v out b4 v out b5 v out c1 shdn c2 gnd c3 bias c4 v out c5 v out d1 gnd d2 gnd d3 gnd d4 gnd d5 gnd e1 adj e2 gnd e3 gnd e4 gnd e5 gnd
ltm8020 15 8020fd information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number d 3/10 changes to description and features changes to applications information electromagnetic compliance paragraph added to applications information changes to typical application 1 8 11 13 (revision history begins at rev d)
ltm8020 16 8020fd linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 0310 rev d ? printed in usa part number description comments ltm4600 10a dc/dc module basic 10a dc/dc module, 15mm 15mm 2.8mm lga ltm4600hvmpv military plastic 10a dc/dc module C55c to 125c operation, 15mm 15mm 2.8mm lga ltm4601/ ltm4601a 12a dc/dc module with pll, output tracking/margining and remote sensing synchronizable, polyphase operation, ltm4601-1 version has no remote sensing ltm4602 6a dc/dc module pin compatible with the ltm4600 ltm4603 6a dc/dc module with pll and output tracking/ margining and remote sensing synchronizable, polyphase operation, ltm4603-1 version has no remote sensing, pin compatible with the ltm4601 ltm4604 4a low v in dc/dc module 2.375v v in 5v, 0.8v v out 5v, 9mm 15mm 2.3mm lga ltm4608 8a low v in dc/dc module 2.375v v in 5v, 0.8v v out 5v, 9mm 15mm 2.8mm lga ltm8022 1a, 36v dc/dc module adjustable frequency, 0.8v v out 5v, 11.25mm 9mm 2.82mm, pin compatible to the ltm8023 ltm8023 2a, 36v dc/dc module adjustable frequency, 0.8v v out 5v, 11.25mm 9mm 2.82mm, pin compatible to the ltm8022 related parts typical application v in v out ltm8020 bias shdn 10f x5r 301k 1% 1f v in 5v to 36v 8020 ta07 gnd adj v out 3.3v 200ma 3.3v step-down converter * *running voltage range. please refer to applications information for start-up details

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