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rev.a, 10/08, wk page 1 of 12 MT-022 tutorial adc architectures iii: sigma-delta adc basics by walt kester introduction the sigma-delta ( - ) adc is the converter of choice for modern voiceband, audio, and high- resolution precision industrial measurement app lications. the highly di gital architecture is ideally suited for modern fine-l ine cmos processes, thereby a llowing easy addition of digital functionality without significantl y increasing the cost. because of its widespread use, it is important to understand the fundamental princi ples behind this converter architecture. due to the length of the topic, the discussion of - adcs requires two tutorials, MT-022 and mt- 023 . this first tutorial (MT-022) first discusses the history of - and the fundamental concepts of oversampling, quantization noise shap ing, digital filtering, and decimation. tutorial mt- 023 discusses more advanced topics related to - , including idle tones, multi-bit - adcs, multistage noise shaping - adcs (mash), bandpass - adcs, as well as some example applications. historical perspective the - adc architecture had its origins in th e early development phases of pulse code modulation (pcm) systems?specifically, those related to transmi ssion techniques called delta modulation and differential pcm . (an excellent discussion of bot h the history and concepts of the - adc can be found by max hauser in referen ce 1). delta modulation was first invented at the itt laboratories in france by e. m. delora ine, s. van mierlo, and b. derjavitch in 1946 (references 2, 3). the principle was "rediscovered" several year s later at the phillips laboratories in holland, whose engineers published the first extensive stud ies both of the single-bit and multi-bit concepts in 1952 and 1953 (references 4, 5). in 1950, c. c. cutler of bell telephone labs in the u.s. filed an important patent on differential pcm which covered the same essential concepts (reference 6). the driving force behind delta modulation and differential pcm was to achieve higher transmission efficiency by transmitting the changes (delta) in value between consecutive samples rather than the actual samples themselves. in delta modulation , the analog signal is quantized by a one -bit adc (a comparator) as shown in figure 1a. the comparator output is converted back to an analog signal with a 1-bit dac, and subtracted from the input after passing through an integrator. the shape of the analog signal is transmitted as follows: a "1" indicates that a positive excursion has occurred since the last sample, and a "0" indicates that a negative excu rsion has occurred since the last sample.
MT-022 1-bit dac + ? n-bit dac + ? n-bit flash adc analog input analog input digital output digital output (a) delta modulation (b) differential pcm sampling clock sampling clock figure 1: delta modulati on and differential pcm if the analog signal remains at a fixed dc level for a period of time, an alternating pattern of "0s" and "1s" is obtained. it should be noted that differential pcm (see figure 1b) uses exactly the same concept except a multibit adc is used rather than a single comparator to derive the transmitted information. since there is no limit to the number of pulses of the same sign that may occur, delta modulation systems are capable of tracking signals of any am plitude. in theory, there is no peak clipping. however, the theoretical limitation of delta modula tion is that the analog signal must not change too rapidly. the problem of slope clipping is shown in figure 2. here, although each sampling instant indicates a positive excursion, the analog signal is rising too quickly, and the quantizer is unable to keep pace. slope overload figure 2: quantization using delta modulation page 2 of 12
MT-022 slope clipping can be reduced by increasing the quantum step size or increasing the sampling rate. differential pcm uses a multibit quantizer to effectively increase the quantum step sizes at the increase of complexity. tests have shown that in order to obtain the same quality as classical pcm, delta modulation requires very high sampling rates, typically 20 the highest frequency of interest, as opposed to nyquist rate of 2 . for these reasons, delta modula tion and differential pcm have never achieved any significant degree of popularity, however a slight modification of the delta modulator leads to the basic - architecture, one of the most popular adc architectures in use today. in 1954 c. c. cutler of bell labs filed a very sign ificant patent which intr oduced the principle of oversampling and noise shaping with the specific intent of achieving higher resolution (reference 7). his objective was not specifically to design a nyquist adc, but to transmit the oversampled noise-shaped signal without reduci ng the data rate. thus cutler's converter embodied all the concepts in a - adc with the exception of digital filtering and decimation which would have been too complex and costly at the time using vacuum tube technology. occasional work continued on these concepts over the next several years, including an important patent of c. b. brahm filed in 1961 which gave details of the analog design of the loop filter for a second-order multibit noise shaping adc (referen ce 8). transistor circuits began to replace vacuum tubes over the period, and this opened up many more possibilities for implementation of the architecture. in 1962, inose, yasuda, and murakami elaborated on the single-bit oversampling noise-shaping architecture proposed by cutler in 1954 (reference 9). their experimental circuits used solid state devices to implement first and second-order - modulators. the 1962 paper was followed by a second paper in 1963 which gave excellen t theoretical discussi ons on oversampling and noise-shaping (reference 10). these two papers were also the first to use the name delta-sigma to describe the architecture. the name delta-sigma stuck until the 1970s when at&t engineers began using name sigma-delta . since that time, both names have been used; however, sigma- delta may be the more correct of the two. it is interesting to note that all the work described thus far was related to transmitting an oversampled digitized signal dire ctly rather than th e implementation of a nyquist adc. in 1969 d. j. goodman at bell labs publishe d a paper describi ng a true nyquist - adc with a digital filter and a decimator following the modulator (r eference 11). this was the first use of the - architecture for the explicit pu rpose of producing a nyquist adc . in 1974 j. c. candy, also of bell labs, described a multibit oversampling - adc with noise shaping, digital filtering, and decimation to achieve a high resolu tion nyquist adc (reference 12). the ic - adc offers several advantages over the other architectures, especially for high resolution, low frequency applications . first and foremost, the single-bit - adc is inherently monotonic and requires no laser trimming. the - adc also lends itself to low cost foundry cmos processes because of the digitally intensive nature of the architecture. examples of early monolithic - adcs are given in referen ces 13-21. since that time ther e have been a constant page 3 of 12
MT-022 stream of process and design improvements in th e fundamental architecture proposed in the early works cited above. modern cmos - adcs (and dacs, for that matter) ar e the converters of choice for voiceband and audio applications. the highly digita l architectures lend themselves nicely to fine- line cmos. in addition, high resoluti on (up to 24 bits) low frequency - adcs have virtually replaced the older integrating converters in precision industr ial measurement applications. basics of - adcs there have been innumerable descriptions of the architecture and theory of - adcs, but most commence with a maze of integrals and deteri orate from there. some engineers who do not understand the theory of operation of - adcs are convinced, from study of a typical published article, that it is too co mplex to comprehend easily. there is nothing particularly difficult to understand about - adcs, as long as you avoid the detailed mathematics, and this section has been written in an attempt to clarify the subject. a - adc contains very simple analog electronics (a comparator, voltage reference, a switch, and one or more integrators and an alog summing circuits), and quite complex digital computational circuitry. this digital circuitry consists of a digital signal processor (dsp) which acts as a filter (generally, but not invariably, a low pass filter). it is not nece ssary to know pr ecisely how the filter works to appreciate what it does. to understand how a - adc works, familiarity with the concepts of oversampling, quantization noise shapi ng, digital filtering, and decimation is required. let us consider the technique of oversampling w ith an analysis in the frequency domain. where a dc conversion has a quantization error of up to ? lsb, a sampled data system has quantization noise . a perfect classical n-bit sampling adc has an rms quantization noise of q/ 12 uniformly distributed within the n yquist band of dc to f s /2 (where q is the value of an lsb and f s is the sampling rate) as shown in figure 3a. therefore, its snr with a full-scale sinewave input will be (6.02n + 1.76) db. (refer to tutorial mt- 001 for the derivation). if the adc is less than perfect, and its noise is greater than its theo retical minimum quantization noise, then its effective resolution will be less than n-bits. its actual resolution (often known as its effective number of bits or enob) will be defined by db02.6 db76.1snr enob ? = . eq. 1 if we choose a much higher sampling rate, kf s (see figure 3b), the rms quantization noise remains q/ 12, but the noise is now distribute d over a wider bandwidth dc to kf s /2. if we then apply a digital low pass filter (l pf) to the output, we remove mu ch of the quantization noise, but do not affect the wanted signal?so the enob is improved. we have accomplished a high resolution a/d conversion with a low resolution adc. the factor k is generally referred to as the oversampling ratio . it should be noted at this point that oversampli ng has an added benefit in that it relaxes the requirements on the analog antialiasing filter. this is a big advantage of - , page 4 of 12
MT-022 especially in consumer audio applications where the cost of a sharp cutoff linear phase filter can be significant. f s 2 f s kf s 2 kf s kf s kf s 2 f s 2 f s 2 digital filter removed noise removed noise quantization noise = q / 12 q = 1 lsb adc adc digital filter ? mod digital filter f s kf s kf s dec f s nyquist operation oversampling + digital filter + decimation oversampling + noise shaping + digital filter + decimation a b c dec f s figure 3: oversampling, di gital filtering, noise shaping, and decimation since the bandwidth is reduced by the digital output filter, the output data rate may be lower than the original sampling rate (kf s ) and still satisfy the nyquist cr iterion. this may be achieved by passing every mth result to the output and discar ding the remainder. the process is known as "decimation" by a factor of m. despite the origins of the term ( decem is latin for ten), m can have any integer value, provided that the out put data rate is more than twice the signal bandwidth. decimation does not cause any lo ss of information (see figure 3b). if we simply use oversampling to improve resolution, we must oversample by a factor of 2 2n to obtain an n-bit increase in resolution. the - converter does not need such a high oversampling ratio because it not only limits the signal passband, but also shapes the quantization noise so that most of it falls outside this passband as shown in figure 3c. if we take a 1-bit adc (a comparator), drive it with the output of an integrator, and feed the integrator with an input signal summed with th e output of a 1-bit dac fed from the adc output, we have a first-order - modulator as shown in figure 4. add a digital low pass filter (lpf) and decimator at the digita l output, and we have a - adc?the - modulator shapes the quantization noise so that it lies above the passba nd of the digital output filter, and the enob is therefore much larger than would otherwise be expected from the oversampling ratio. page 5 of 12
MT-022 + _ +v ref ?v ref digital filter and decimator + _ clock kf s v in n-bits f s f s a b 1-bit data stream 1-bit dac latched comparator (1-bit adc) 1-bit, k f s sigma-delta modulator integrator figure 4: first-or der sigma-delta adc intuitively, a - adc operates as follows. assume a dc input at v in . the integrator is constantly ramping up or down at node a. the ou tput of the comparator is fed back through a 1- bit dac to the summing input at node b. the ne gative feedback loop from the comparator output through the 1-bit dac back to the summi ng point will force the average dc voltage at node b to be equal to v in . this implies that the average dac output voltage must equal the input voltage v in . the average dac output voltage is controlled by the ones-density in the 1-bit data stream from the comparator output. as the input signal increases towards +v ref , the number of "ones" in the serial bit str eam increases, and the number of "zer os" decreases. similarly, as the signal goes negative towards ?v ref , the number of "ones" in the se rial bit stream decreases, and the number of "zeros" increases. from a very simp listic standpoint, this an alysis shows that the average value of the input voltage is contained in the serial bit stream out of the comparator. the digital filter and decimator process the serial bit stream and produce the final output data. for any given input value in a single sampling inte rval, the data from the 1-bit adc is virtually meaningless. only when a large number of sample s are averaged, will a meaningful value result. the - modulator is very difficult to analyze in the time domain because of this apparent randomness of the single-bit data out put. if the input signal is near positive full-scale, it is clear that there will be more "1"s than "0"s in the bit stream. likewise, for signals near negative full- scale, there will be more "0"s than "1"s in the bi t stream. for signals near midscale, there will be approximately an equal number of "1"s and "0"s. figure 5 shows the output of the integrator for two input conditions. the first is for an input of zero (midscale). to decode the output, pass the output samples through a simple digital lowpass f ilter that averages ever y four samples. the output of the filter is 2/4. th is value represents bipolar zero. if more samples are averaged, more dynamic range is achieved. for example, averaging 4 samples gives 2 bits of resolution, page 6 of 12
MT-022 while averaging 8 samples yields 4/8, or 3 bits of resolution. in the bottom waveform of figure 5, the average obtained for 4 samples is 3/4, and the average for 8 samples is 6/8. figure 5: sigma-delta modulator waveforms for an interactive tutorial on the ti me domain characteristics of the - modulator, refer to the sigma-delta tutorial located in the analog devices' design center which gives a graphical illustration of the behavior of an idealized - adc. the - adc can also be viewed as a synchro nous voltage-to-frequency converter followed by a counter. if the number of "1"s in the output data stream is counted over a sufficient number of samples, the counter output will represent the dig ital value of the input. obviously, this method of averaging will only work for dc or very sl owly changing input signals. in addition, 2 n clock cycles must be counted in order to achieve n- bit effective resolution, thereby severely limiting the effective sampling rate. it should be noted that because the digi tal filter is an inte gral part of the - adc, there is a built-in "pipeline" delay (sometimes called "lat ency") primarily determined by the number of taps in the digital filter. digital filters in - adcs can be quite large (several hundred taps), so the latency may become an issue in multiplexed applications where the appropriate amount of settling time must be allowe d after switching channels. frequency domain analysis of a sigma-delta adc and noise shaping further time-domain analysis is not productive, and the concept of noise shaping is best explained in the frequency domain by considering the simple - modulator model in figure 6. page 7 of 12
MT-022 analog filter h(f) = 1 f x y + _ x ? y 1 f ( x ? y ) q = quantization noise y = 1 f ( x ? y ) + q rearranging, solving for y: y = x f + 1 + q f f + 1 signal term noise term y figure 6: simplified frequenc y domain linearized model of a sigma-delta modulator the integrator in the modulator is represented as an analog lowpass filter with a transfer function equal to h(f) = 1/f. this transfer function has an amplitude response which is inversely proportional to the input frequency. the 1-bit quantizer generates qua ntization noise, q, which is injected into the output summing bl ock. if we let the input signa l be x, and the output y, the signal coming out of the input summ er must be x ? y. this is multiplied by the filter transfer function, 1/f, and the result goes to one input of the output summer. by in spection, we can then write the expression for the output voltage y as: q)yx( f 1 y +?= . eq. 2 this expression can easily be rearranged a nd solved for y in terms of x, f, and q: 1f fq 1f x y + ? + + = . eq. 3 note that as the frequency f approaches zero, the output voltage y approaches x with no noise component. at higher frequencies, the amplitude of the signal component approaches zero, and the noise component approaches q. at high frequency, the output consists primarily of quantization noise. in essence, th e analog filter has a lowpass eff ect on the signal, and a highpass effect on the quantization noise. thus the analog filter performs the noise shaping function in the - modulator model. for a given input frequenc y, higher order analog filters offer more attenuation. the same is true of - modulators, provided cert ain precautions are taken. page 8 of 12
MT-022 by using more than one integr ation and summing stage in the - modulator, we can achieve higher orders of quantization noise shaping and even better enob for a given oversampling ratio as is shown in figure 7 for both a first and second-order - modulator. f s 2 kf s 2 2nd order 1st order digital filter figure 7: sigma-delt a modulators shape quantization noise the block diagram for the second-order - modulator is shown in figu re 8. third, and higher, order - adcs were once thought to be potentially uns table at some values of input?recent analyses using finite rather than infinite gains in the comparator have shown that this is not necessarily so, but even if instability does star t to occur, the dsp in the digital filter and decimator can be made to recognize incipien t instability and react to prevent it. + _ v in integrator + _ + _ clock kf s 1-bit dac integrator digital filter and decimator n-bits f s + _ 1-bit data stream figure 8: second-or der sigma-delta adc page 9 of 12
MT-022 figure 9 shows the relationshi p between the order of the - modulator and the amount of oversampling necessary to achieve a particular sn r. for instance, if the oversampling ratio is 64, an ideal second-order system is capable of providing an snr of about 80 db. this implies approximately 13 effective number of bits (e nob). although the filtering done by the digital filter and decimator can be done to any degree of precision desirable, it would be pointless to carry more than 13 binary bits to the outside wo rld. additional bits would carry no useful signal information, and would be buried in the quantiz ation noise unless post-filtering techniques were employed. additional resolution can be obtaine d from the 1-bit system by increasing the oversampling ratio and/or by usi ng a higher-order modulator. othe r methods are often used to achieve higher resolution, such as the multi-bit - architecture, and are discussed in tutorial mt- 023 . first-order loop 9db / octave second-order loop 15db / octave third-order loop* 21db / octave * > 2nd order loops do not obey linear model 4 8 16 32 64 128 256 0 20 40 60 80 100 120 snr (db) oversampling ratio, k figure 9: snr versus oversampling ratio for first, second, and third-order loops summary this tutorial has c overed the basics of - adcs from a historical perspective including the important concepts of oversampling, digital filte ring, noise shaping, and decimation. tutorial mt- 023 covers some of the more advan ced concepts and applications of - adcs, such as idle tones, multi-bit - , mash, and bandpass - . page 10 of 12
MT-022 references 1. max w. hauser, "principles of oversampling a/d conversion," journal audio engineering society , vol. 39, no. 1/2, january/february 1991, pp. 3-26. (one of the best tutorials and practical discussions of the sigma-delta adc architecture and its history). 2. e. m. deloraine, s. van mierlo, and b. derjavitch, "methode et systme de transmission par impulsions," french patent 932,140 , issued august, 1946. also british patent 627,262 , issued 1949. 3. e. m. deloraine, s. van mierlo, and b. derjavitch, "communication system utilizing constant amplitude pulses of opposite polarities," u.s. patent 2,629,857 , filed october 8, 1947, issued february 24, 1953. 4. f. de jager, "delta modulation: a method of pcm transmission using the one unit code," phillips research reports , vol. 7, 1952, pp. 542-546. (additional work done on delta modulation during the same time period). 5. h. van de weg, "quantizing noise of a single integra tion delta modulation system with an n-digit code," phillips research reports , vol. 8, 1953, pp. 367-385. (additional work done on delta modulation during the same time period). 6. c. c. cutler, "differential quan tization of communication signals," u.s. patent 2,605,361 , filed june 29, 1950, issued july 29, 1952. (recognized as the first patent on differential pcm or delta modulation, although actually first invented in the paris labs of the international telephone and telegraph corporation by e. m. deloraine, s. mierlo, and b. derjavitch a few years earlier) 7. c. c. cutler, "transmission systems employing quantization," u.s. patent 2,927,962 , filed april 26, 1954, issued march 8, 1960. (a ground-breaking patent describing oversampling and noise shaping using first and second-order loops to increase eff ective resolution. the goal was transmission of oversampled noise shaped pcm data without decimation, not a nyquist-type adc). 8. c. b. brahm, "feedback integrating system," u.s. patent 3,192,371 , filed september 14, 1961, issued june 29, 1965. (describes a second-order multibit oversampling noise shaping adc). 9. h. inose, y. yasuda, and j. murakami, "a telemetering system by code modulation: - modulation," ire transactions on space electronics telemetry , vol. set-8, september 1962, pp. 204-209. reprinted in n. s. jayant, waveform quantization and coding , ieee press and john wiley, 1976, isbn 0-471-01970-4. (an elaboration on the 1-bit form of cutler's noise-shaping ov ersampling concept. this work coined the description of the architecture as 'delta-sigma modulation'). 10. h. inose and y. yasuda, "a unity bit coding method by negative feedback," ieee proceedings , vol. 51, november 1963, pp. 1524-1535. (further discussions on their 1-bit 'delta-sigma' concept). 11. d. j. goodman, "the application of delta modulation of analog-to-pcm encoding," bell system technical journal, vol. 48, february 1969, pp. 321-343. reprinted in n. s. jayant, waveform quantization and coding , ieee press and john wiley, 1976, isbn 0- 471-01970-4. (the first description of using oversampling and noise shaping techniques followed by digital filtering and decimation to produce a true nyquist-rate adc). 12. j. c. candy, "a use of limit cycle oscillations to obtain robust analog-to-digital converters," ieee transactions on communications, vol. com-22, december 1974, pp. 298-305. (describes a multibit oversampling noise shaping adc with output digital filtering and decimation to interpolate between the quantization levels). 13. r. j. van de plassche, "a sigma-delta modulator as an a/d converter," ieee transactions on circuits and systems , vol. cas-25, july 1978, pp. 510-514. page 11 of 12
page 12 of 12 MT-022 14. b. a. wooley and j. l. henry, "an integrated per-channel pcm encoder based on interpolation," ieee journal of solid state circuits , vol. sc-14, february 1979, pp. 14-20. (one of the first all-integrated cmos sigma-delta adcs). 15. b. a. wooley et al, "an integr ated interpolative pcm decoder," ieee journal of solid state circuits , vol. sc- 14, february 1979, pp. 20-25. 16. j. c. candy, b. a. wooley, and o. j. benjamin , "a voiceband codec with digital filtering," ieee transactions on communications , vol. com-29, june 1981, pp. 815-830. 17. j. c. candy and gabor c. temes, oversampling delta-sigma data converters , ieee press, isbn 0-87942- 258-8, 1992. 18. r. koch, b. heise, f. eckbauer, e. engelhardt, j. fisher, and f. parzefall, "a 12-bit sigma-delta analog-to- digital converter with a 15 mhz clock rate," ieee journal of solid-state circuits , vol. sc-21, no. 6, december 1986. 19. d. r. welland, b. p. del signore and e. j. swanson, "a stereo 16-bit delta-sigma a/d converter for digital audio," j. audio engineering society , vol. 37, no. 6, june 1989, pp. 476-485. 20. b. boser and bruce wooley, "the design of sigma-delta modulation analog-to-digital converters," ieee journal of solid-state circuits , vol. 23, no. 6, decem ber 1988, pp . 1298-1308. 21. j. dattorro, a. charpentier, d. andreas, "the implem entation of a one-stage multirate 64:1 fir decimator for use in one-bit sigma-delta a/d applications," aes 7th international conference , may 1989. 22. walt kester, analog-digital conversion , analog devices, 2004, isbn 0-916550-27-3, chapter 3. also available as the data conversion handbook , elsevier/newnes, 2005, isbn 0-7506-7841-0, chapter 3. copyright 2009, analog devices, inc. all rights reserved. analog devices assumes no responsibility for customer product design or the use or application of customers? products or for any infringements of patents or rights of others which may result from analog devices assistance. all trad emarks and logos are property of their respective holders. information furnished by analog devices applications and development tools engineers is believed to be accurate and reliable, however no responsibility is assumed by analog devices regarding technical accuracy and topicality of the content provided in analog devices tutorials.

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