august 2011 ?2011 fairchild semiconductor corporation FDMS3008SDC rev.c www.fairchildsemi.com 1 FDMS3008SDC n-channel dual cool tm powertrench ? syncfet tm FDMS3008SDC n-channel dual cool tm powertrench ? syncfet tm 30 v, 49 a, 2.6 m features ? dual cool tm top side cooling pqfn package ? max r ds(on) = 2.6 m at v gs = 10 v, i d = 28 a ? max r ds(on) = 3.3 m at v gs = 4.5 v, i d = 22 a ? high performance technology for extremely low r ds(on) ? syncfet schottky body diode ? rohs compliant general description this n-channel mosfet is produced using fairchild semiconductor?s advanced powertrench ? process. advancements in both silicon and dual cool tm package technologies have been combined to offer the lowest r ds(on) while maintaining excellent switching performance by extremely low junction-to-ambient thermal resistance. this device has the added benefit of an efficient monolithic schottky body diode. applications ? synchronous rectifier for dc/dc converters ? telecom secondary side rectification ? high end server/workstation vcore low side mosfet maximum ratings t a = 25c unless otherwise noted thermal characteristics package marking and ordering information symbol parameter ratings units v ds drain to source voltage 30 v v gs gate to source voltage (note 4) 20 v i d drain current -continuous (package limited) t c = 25 c 49 a -continuous (silicon limited) t c = 25 c 140 -continuous t a = 25 c (note 1a) 29 -pulsed 200 e as single pulse avalanche energy (note 3) 112 mj dv/dt peak diode recovery dv/dt (note 5) 2.3 v/ns p d power dissipation t c = 25 c 78 w power dissipation t a = 25 c (note 1a) 3.3 t j , t stg operating and storage junction temperature range -55 to +150 c r jc thermal resistance, junction to case (top source) 3.5 c/w r jc thermal resistance, junction to case (bottom drain) 1.6 r ja thermal resistance, junction to ambient (note 1a) 38 r ja thermal resistance, junction to ambient (note 1b) 81 r ja thermal resistance, junction to ambient (note 1i) 16 r ja thermal resistance, junction to ambient (note 1j) 23 r ja thermal resistance, junction to ambient (note 1k) 11 device marking device package reel size tape width quantity 3008s FDMS3008SDC dual cool tm power 56 13?? 12 mm 3000 units 4 3 2 1 5 6 7 8 s s s g d d d d bottom top pin 1 d d d d g s s s power 56
www.fairchildsemi.com 2 ?2011 fairchild semiconductor corporation FDMS3008SDC rev.c FDMS3008SDC n-channel dual cool tm powertrench ? syncfet tm electrical characteristics t j = 25c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 1 ma, v gs = 0 v30 v bv dss t j breakdown voltage temperature coefficient i d = 10 ma, referenced to 25c 13 mv/c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v500 a i gss gate to source leakage current, forward v gs = 20 v, v ds = 0 v 100na v gs(th) gate to source threshold voltage v gs = v ds , i d = 1 ma 1.2 1.9 3.0 v v gs(th) t j gate to source threshold voltage temperature coefficient i d = 10 ma, referenced to 25c -5 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 28 a 1.82.6 m v gs = 4.5 v, i d = 22 a2.73.3 v gs = 10 v, i d = 28 a, t j = 125c 2.4 3.6 g fs forward transconductance v ds = 5 v, i d = 28 a 144 s c iss input capacitance v ds = 15 v, v gs = 0 v, f = 1mhz 3400 4520 pf c oss output capacitance 1115 1485 pf c rss reverse transfer capacitance 80 120 pf r g gate resistance 0.7 t d(on) turn-on delay time v dd = 15 v, i d = 28 a, v gs = 10 v, r gen = 6 15 27 ns t r rise time 4.7 10 ns t d(off) turn-off delay time 33 53 ns t f fall time 310ns q g total gate charge v gs = 0 v to 10 v v dd = 15 v, i d = 28 a 46 64 nc q g total gate charge v gs = 0 v to 4.5 v2129nc q gs gate to source charge 9.6 nc q gd gate to drain ?miller? charge 4.3 nc v sd source-drain diode forward voltage v gs = 0 v, i s = 2 a (note 2) 0.4 0.8 v v gs = 0 v, i s = 28 a (note 2) 0.8 1.2 t rr reverse recovery time i f = 28 a, di/dt = 300 a/ s 32 51 ns q rr reverse recovery charge 39 62 nc
www.fairchildsemi.com 3 ?2011 fairchild semiconductor corporation FDMS3008SDC rev.c FDMS3008SDC n-channel dual cool tm powertrench ? syncfet tm thermal characteristics r jc thermal resistance, junction to case (top source) 3.5 c/w r jc thermal resistance, junction to case (bottom drain) 1.6 r ja thermal resistance, junction to ambient (note 1a) 38 r ja thermal resistance, junction to ambient (note 1b) 81 r ja thermal resistance, junction to ambient (note 1c) 27 r ja thermal resistance, junction to ambient (note 1d) 34 r ja thermal resistance, junction to ambient (note 1e) 16 r ja thermal resistance, junction to ambient (note 1f) 19 r ja thermal resistance, junction to ambient (note 1g) 26 r ja thermal resistance, junction to ambient (note 1h) 61 r ja thermal resistance, junction to ambient (note 1i) 16 r ja thermal resistance, junction to ambient (note 1j) 23 r ja thermal resistance, junction to ambient (note 1k) 11 r ja thermal resistance, junction to ambient (note 1l) 13 notes: 1. r ja is determined with the device mounted on a fr-4 board using a specified pad of 2 oz copper as shown below. r jc is guaranteed by design while r ca is determined by the user's board design. c. still air, 20.9x10.4x12.7mm aluminum heat sink, 1 in 2 pad of 2 oz copper d. still air, 20.9x10.4x12.7mm aluminum heat sink, minimum pad of 2 oz copper e. still air, 45.2x41.4x11.7mm aavid thermalloy part # 10-l41b-11 heat sink, 1 in 2 pad of 2 oz copper f. still air, 45.2x41.4x11.7mm aavid thermallo y part # 10-l41b-11 heat sink, minimum pad of 2 oz copper g. 200fpm airflow, no heat sink,1 in 2 pad of 2 oz copper h. 200fpm airflow, no heat sink, minimum pad of 2 oz copper i. 200fpm airflow, 20.9x10.4x12.7mm aluminum heat sink, 1 in 2 pad of 2 oz copper j. 200fpm airflow, 20.9x10.4x12.7 mm aluminum heat sink, minimum pad of 2 oz copper k. 200fpm airflow, 45.2x41.4x11.7mm aavid thermalloy part # 10-l41b-11 heat sink, 1 in 2 pad of 2 oz copper l. 200fpm airflow, 45.2x41.4x11.7mm aavid thermalloy part # 10-l41b-11 heat sink, minimum pad of 2 oz copper 2. pulse test: pulse width < 300 s, duty cycle < 2.0%. 3. e as of 112 mj is based on starting t j = 25 c, l = 1 mh, i as = 15 a, v dd = 27 v, v gs = 10 v. 100% test at l = 0. 1 mh, i as = 3 3.4 a. 4. as an n-ch device, the negative vgs rating is for low du ty cycle pulse ocurrence only. no continuous rating is implied. 5. i sd 28 a, di/dt 210 a/ s, v dd bv dss , starting t j = 25 o c. a. 38 c/w when mounted on a 1 in 2 pad of 2 oz copper b. 81 c/w when mounted on a minimum pad of 2 oz copper
www.fairchildsemi.com 4 ?2011 fairchild semiconductor corporation FDMS3008SDC rev.c FDMS3008SDC n-channel dual cool tm powertrench ? syncfet tm typical characteristics t j = 25c unless otherwise noted figure 1. 0.0 0.5 1.0 1.5 2.0 0 50 100 150 200 v gs = 4.5 v v gs = 4 v v gs = 3.5 v v gs = 6 v pulse duration = 80 s duty cycle = 0.5% max v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) on region characteristics figure 2. 0 40 80 120 160 200 0 1 2 3 4 v gs = 6 v v gs = 3.5 v pulse duration = 80 s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs = 4 v v gs = 4.5 v v gs = 10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 i d = 28 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 24681 0 0 2 4 6 8 10 t j = 125 o c i d = 28 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m ) pulse duration = 80 s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 2.0 2.5 3.0 3.5 4.0 0 50 100 150 200 t j = 125 o c v ds = 5 v pulse duration = 80 s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 100 200 t j = -55 o c t j = 25 o c t j = 125 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
www.fairchildsemi.com 5 ?2011 fairchild semiconductor corporation FDMS3008SDC rev.c FDMS3008SDC n-channel dual cool tm powertrench ? syncfet tm figure 7. 0 1020304050 0 2 4 6 8 10 i d = 28 a v dd = 20 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 15 v gate charge characteristics figure 8. 0.1 1 10 40 100 1000 5000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss 30 c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 100 1 10 40 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 30 60 90 120 150 v gs = 4.5 v limited by package r jc = 1.6 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs case temperature f i g u r e 1 1 . f o r w a r d b i a s s a f e op erating area 0.01 0.1 1 10 100200 0.01 0.1 1 10 100 500 1 s 100 s 10 ms dc 10 s 100 ms 1 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r ja = 81 o c/w t a = 25 o c figure 12. 10 -4 10 -3 10 -2 10 -1 110 100 1000 1 10 100 1000 2000 single pulse r ja = 81 o c/w t a = 25 o c p ( pk ) , peak transient power (w) t, pulse width (sec) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25c unless otherwise noted
www.fairchildsemi.com 6 ?2011 fairchild semiconductor corporation FDMS3008SDC rev.c FDMS3008SDC n-channel dual cool tm powertrench ? syncfet tm figure 13. 10 -4 10 -3 10 -2 10 -1 10 0 10 1 100 1000 0.0005 0.001 0.01 0.1 1 single pulse r ja = 81 o c/w duty cycle-descending order normalized thermal impedance, z ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z ja x r ja + t a junction-to-ambient transient thermal response curve typical characteristics t j = 25c unless otherwise noted
www.fairchildsemi.com 7 ?2011 fairchild semiconductor corporation FDMS3008SDC rev.c FDMS3008SDC n-channel dual cool tm powertrench ? syncfet tm syncfet schottky body diode characteristics fairchild?s syncfet process emb eds a schottky diode in parallel with powertrench mosfet. th is diode exhibits similar characteristics to a discrete exte rnal schottky diode in parallel with a mosfet. figure 14 shows the reverse recovery characteristic of the FDMS3008SDC. schottky barrier diodes exhibit significant leakage at high tem- perature and high reverse voltage. this will increase the power in the device. figure 15. syncfet body diode reverses leakage versus drain-source voltage 0 5 10 15 20 25 0.000001 0.00001 0.0001 0.001 0.01 t j = 125 o c t j = 100 o c t j = 25 o c i dss , reverse leakage current (a) v ds , reverse voltage (v) typical char acteristics (continued) figure 14. FDMS3008SDC syncfet body diode reverse recovery characteristic 0 50 100 150 200 250 300 -5 0 5 10 15 20 25 30 di/dt = 300 a/ p s current (a) time (ns)
www.fairchildsemi.com 8 ?2011 fairchild semiconductor corporation FDMS3008SDC rev.c FDMS3008SDC n-channel dual cool tm powertrench ? syncfet tm dimensional outlin e and pad layout
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uhc ? ultra frfet? unifet? vcx? visualmax? xs? tm ? tm ? tm datasheet identification product status definition advance information formative / in design datasheet contains the design specifications for product development. specifications may change in any manner without notice. preliminary first production datasheet contains preliminary data; supplementary data will be published at a later date. fairchild semiconductor reserves the ri ght to make changes at any time without notice to improve design. no identification needed full production datasheet contains final specifications. fair child semiconductor reserves the right to make changes at any time withou t notice to improve the design. obsolete not in production datasheet contains specifications on a product th at is discontinued by fairchild semiconductor. the datasheet is for reference information only. anti-counterfeiting policy fairchild semiconductor corporation?s anti-counterfeiting policy . fairchild?s anti-counterfeiting policy is also stated on our external website, www.fairchildsemi.com, under sales support . counterfeiting of semiconductor parts is a growing problem in t he industry. all manufactures of semiconductor products are expe riencing counterfeiting of their parts. customers who inadvertently purchase counterfeit parts exper ience many problems such as loss of brand reputation, substa ndard performance, failed application, and increased cost of production and manufacturing de lays. fairchild is taking strong measures to protect ourselve s and our customers from the proliferation of counterfeit parts. fairchild strongly encourages customers to purchase fairchild parts either directly from fa irchild or from authorized fairchild distributors who are listed by country on our web page cited above. products customers buy either from fairchild directly or fr om authorized fairchild distributors are genuine parts, have full traceability, meet fa irchild?s quality standards for handing and storage and provide access to fairchild?s full range of up-to-date technical and product information. fairchild and our authorized distributors will stand behind all warranties and wi ll appropriately address and warranty issues that may arise. fairchild will not provide any warranty coverage or other assistance for parts bought from unau thorized sources. fairchild is committed to combat this global problem and encourage our custom ers to do their part in stopping this practice by buying direct or from authorized distributors. rev. i55 ?2011 fairchild semiconductor corporation FDMS3008SDC rev.c www.fairchildsemi.com 9
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