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1. general description the 74vhc32; 74vhct32 are high-speed si-gate cmos devices and are pin compatible with low-power schottky ttl (lsttl). they are speci?ed in compliance with jedec standard no. 7-a. the 74vhc32; 74vhct32 provide the 2-input or function. 2. features n balanced propagation delays n all inputs have schmitt-trigger actions n inputs accept voltages higher than v cc n input levels: u the 74vhc32 operates with cmos input level u the 74vhct32 operates with ttl input level n esd protection: u hbm jesd22-a114e exceeds 2000 v u mm jesd22-a115-a exceeds 200 v u cdm jesd22-c101c exceeds 1000 v n multiple package options n speci?ed from - 40 c to +85 c and from - 40 c to +125 c 3. ordering information 74vhc32; 74vhct32 quad 2-input or gate rev. 01 13 august 2009 product data sheet table 1. ordering information type number package temperature range name description version 74vhc32d - 40 c to +125 c so14 plastic small outline package; 14 leads; body width 3.9 mm sot108-1 74vhct32d 74vhc32pw - 40 c to +125 c tssop14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm sot402-1 74vhct32pw 74vhc32bq - 40 c to +125 c dhvqfn14 plastic dual in-line compatible thermal enhanced very thin quad ?at package; no leads; 14 terminals; body 2.5 3 0.85 mm sot762-1 74VHCT32BQ
74vhc_vhct32_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 13 august 2009 2 of 14 nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate 4. functional diagram 5. pinning information 5.1 pinning fig 1. logic symbol fig 2. iec logic symbol mna242 1a 1b 1y 2 1 3 2a 2b 2y 5 4 6 3a 3b 3y 10 9 8 4a 4b 4y 13 12 11 mna243 3 3 1 3 1 3 1 3 1 2 1 6 5 4 8 10 9 11 13 12 fig 3. logic diagram (one gate) mna241 a b y (1) the die substrate is attached to this pad using conductive die attach material. it can not be used as a supply pin or input. fig 4. pin con?guration so14 and tssop14 fig 5. pin con?guration dhvqfn14 74vhc32 74vhct32 1a v cc 1b 4b 1y 4a 2a 4y 2b 3b 2y 3a gnd 3y 001aak054 1 2 3 4 5 6 7 8 10 9 12 11 14 13 001aak055 74vhc32 74vhct32 transparent top view 2y 3a 2b 3b 2a 4y 1y 4a 1b 4b gnd 3y 1a v cc 6 9 5 10 4 11 3 12 2 13 7 8 1 14 terminal 1 index area gnd (1)
74vhc_vhct32_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 13 august 2009 3 of 14 nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate 5.2 pin description 6. functional description [1] h = high voltage level; l = low voltage level; x = dont care. table 2. pin description symbol pin description 1a 1 data input 1b 2 data input 1y 3 data output 2a 4 data input 2b 5 data input 2y 6 data output gnd 7 ground (0 v) 3y 8 data output 3a 9 data input 3b 10 data input 4y 11 data output 4a 12 data input 4b 13 data input v cc 14 supply voltage table 3. function table [1] input output na nb ny lll xhh hxh
74vhc_vhct32_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 13 august 2009 4 of 14 nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate 7. limiting values [1] the input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] for so14 packages: above 70 c the value of p tot derates linearly at 8 mw/k. for tssop14 packages: above 60 c the value of p tot derates linearly at 5.5 mw/k. for dhvqfn14 packages: above 60 c the value of p tot derates linearly at 4.5 mw/k. 8. recommended operating conditions table 4. limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +7.0 v v i input voltage - 0.5 +7.0 v i ik input clamping current v i < - 0.5 v [1] - 20 - ma i ok output clamping current v o < - 0.5 v or v o > v cc + 0.5 v [1] - 20 +20 ma i o output current v o = - 0.5 v to (v cc + 0.5 v) - 25 +25 ma i cc supply current - +75 ma i gnd ground current - 75 - ma t stg storage temperature - 65 +150 c p tot total power dissipation t amb = - 40 c to +125 c [2] - 500 mw table 5. operating conditions symbol parameter conditions min typ max unit 74vhc32 v cc supply voltage 2.0 5.0 5.5 v v i input voltage 0 - 5.5 v v o output voltage 0 - v cc v t amb ambient temperature - 40 +25 +125 c d t/ d v input transition rise and fall rate v cc = 3.0 v to 3.6 v - - 100 ns/v v cc = 4.5 v to 5.5 v - - 20 ns/v 74vhct32 v cc supply voltage 4.5 5.0 5.5 v v i input voltage 0 - 5.5 v v o output voltage 0 - v cc v t amb ambient temperature - 40 +25 +125 c d t/ d v input transition rise and fall rate v cc = 4.5 v to 5.5 v - - 20 ns/v
74vhc_vhct32_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 13 august 2009 5 of 14 nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate 9. static characteristics table 6. static characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions 25 c - 40 cto+85 c - 40 c to +125 c unit min typ max min max min max 74vhc32 v ih high-level input voltage v cc = 2.0 v 1.5 - - 1.5 - 1.5 - v v cc = 3.0 v 2.1 - - 2.1 - 2.1 - v v cc = 5.5 v 3.85 - - 3.85 - 3.85 - v v il low-level input voltage v cc = 2.0 v - - 0.5 - 0.5 - 0.5 v v cc = 3.0 v - - 0.9 - 0.9 - 0.9 v v cc = 5.5 v - - 1.65 - 1.65 - 1.65 v v oh high-level output voltage v i =v ih or v il i o = - 50 m a; v cc = 2.0 v 1.9 2.0 - 1.9 - 1.9 - v i o = - 50 m a; v cc = 3.0 v 2.9 3.0 - 2.9 - 2.9 - v i o = - 50 m a; v cc = 4.5 v 4.4 4.5 - 4.4 - 4.4 - v i o = - 4.0 ma; v cc = 3.0 v 2.58 - - 2.48 - 2.40 - v i o = - 8.0 ma; v cc = 4.5 v 3.94 - - 3.80 - 3.70 - v v ol low-level output voltage v i =v ih or v il i o =50 m a; v cc = 2.0 v - 0 0.1 - 0.1 - 0.1 v i o =50 m a; v cc = 3.0 v - 0 0.1 - 0.1 - 0.1 v i o =50 m a; v cc = 4.5 v - 0 0.1 - 0.1 - 0.1 v i o = 4.0 ma; v cc = 3.0 v - - 0.36 - 0.44 - 0.55 v i o = 8.0 ma; v cc = 4.5 v - - 0.36 - 0.44 - 0.55 v i i input leakage current v i = 5.5 v or gnd; v cc = 0 v to 5.5 v - - 0.1 - 1.0 - 2.0 m a i cc supply current v i =v cc or gnd; i o =0a; v cc = 5.5 v - - 2.0 - 20 - 40 m a c i input capacitance v i =v cc or gnd - 3 10 - 10 - 10 pf c o output capacitance -4-----pf
74vhc_vhct32_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 13 august 2009 6 of 14 nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate 10. dynamic characteristics 74vhct32 v ih high-level input voltage v cc = 4.5 v to 5.5 v 2.0 - - 2.0 - 2.0 - v v il low-level input voltage v cc = 4.5 v to 5.5 v - - 0.8 - 0.8 - 0.8 v v oh high-level output voltage v i =v ih or v il ; v cc = 4.5 v i o = - 50 m a 4.4 4.5 - 4.4 - 4.4 - v i o = - 8.0 ma 3.94 - - 3.80 - 3.70 - v v ol low-level output voltage v i =v ih or v il ; v cc = 4.5 v i o =50 m a - 0 0.1 - 0.1 - 0.1 v i o = 8.0 ma - - 0.36 - 0.44 - 0.55 v i i input leakage current v i = 5.5 v or gnd; v cc = 0 v to 5.5 v - - 0.1 - 1.0 - 2.0 m a i cc supply current v i =v cc or gnd; i o =0a; v cc = 5.5 v - - 2.0 - 20 - 40 m a d i cc additional supply current per input pin; v i =v cc - 2.1 v; other pins at v cc or gnd; i o =0a; v cc = 4.5 v to 5.5 v - - 1.35 - 1.5 - 1.5 ma c i input capacitance v i =v cc or gnd - 3 10 - 10 - 10 pf c o output capacitance -4-----pf table 6. static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions 25 c - 40 cto+85 c - 40 c to +125 c unit min typ max min max min max table 7. dynamic characteristics voltages are referenced to gnd (ground = 0 v); for test circuit see figure 7 . symbol parameter conditions 25 c - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max min max 74vhc32 t pd propagation delay na, nb to ny; see figure 6 [2] v cc = 3.0 v to 3.6 v c l = 15 pf - 3.9 7.9 1.0 9.5 1.0 10.0 ns c l = 50 pf - 5.6 11.4 1.0 13 1.0 14.5 ns v cc = 4.5 v to 5.5 v c l = 15 pf - 2.8 5.5 1.0 6.5 1.0 7.0 ns c l = 50 pf - 4.1 7.5 1.0 8.5 1.0 9.5 ns c pd power dissipation capacitance f i = 1 mhz; v i = gnd to v cc [3] -10- - - - -pf
74vhc_vhct32_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 13 august 2009 7 of 14 nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate [1] typical values are measured at nominal supply voltage (v cc = 3.3 v and v cc = 5.0 v). [2] t pd is the same as t plh and t phl . [3] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; s (c l v cc 2 f o ) = sum of the outputs. 11. waveforms 74vhct32; v cc = 4.5 v to 5.5 v t pd propagation delay na, nb to ny; see figure 6 [2] c l = 15 pf - 3.1 6.9 1.0 8.0 1.0 9.0 ns c l = 50 pf - 4.3 7.9 1.0 9.0 1.0 10.0 ns c pd power dissipation capacitance f i = 1 mhz; v i = gnd to v cc [3] -12- - - - -pf table 7. dynamic characteristics continued voltages are referenced to gnd (ground = 0 v); for test circuit see figure 7 . symbol parameter conditions 25 c - 40 c to +85 c - 40 c to +125 c unit min typ [1] max min max min max measurement points are given in t ab le 8 . v ol and v oh are typical voltage output levels that occur with the output load. fig 6. input to output propagation delays mna224 na, nb input ny output t plh t phl gnd v i v m v m v oh v ol table 8. measurement points type input output v m v m 74vhc32 0.5v cc 0.5v cc 74vhct32 1.5 v 0.5v cc
74vhc_vhct32_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 13 august 2009 8 of 14 nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate test data is given in t ab le 9 . de?nitions test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance. fig 7. load circuitry for measuring switching times 001aah768 t w t w t r t r t f v m v i negative pulse gnd v i positive pulse gnd 10 % 90 % 90 % 10 % v m v m v m t f v cc dut r t v i v o c l g table 9. test data type input load test v i t r , t f c l 74vhc32 v cc 3.0 ns 15 pf, 50 pf t plh , t phl 74vhct32 3.0 v 3.0 ns 15 pf, 50 pf t plh , t phl
74vhc_vhct32_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 13 august 2009 9 of 14 nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate 12. package outline fig 8. package outline sot108-1 (so14) unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot108-1 x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 7 8 1 14 y 076e06 ms-012 pin 1 index 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.35 0.34 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.024 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 99-12-27 03-02-19 0 2.5 5 mm scale so14: plastic small outline package; 14 leads; body width 3.9 mm sot108-1
74vhc_vhct32_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 13 august 2009 10 of 14 nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate fig 9. package outline sot402-1 (tssop14) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.72 0.38 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot402-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 17 14 8 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm sot402-1 a max. 1.1 pin 1 index
74vhc_vhct32_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 13 august 2009 11 of 14 nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate fig 10. package outline sot762-1 (dhvqfn14) terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 3.1 2.9 d h 1.65 1.35 y 1 2.6 2.4 1.15 0.85 e 1 2 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot762-1 mo-241 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot762-1 dhvqfn14: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 14 terminals; body 2.5 x 3 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 26 13 9 8 7 1 14 x d e c b a 02-10-17 03-01-27 terminal 1 index area a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1)
74vhc_vhct32_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 13 august 2009 12 of 14 nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate 13. abbreviations 14. revision history table 10. abbreviations acronym description cdm charged device model cmos complementary metal-oxide semiconductor dut device under test esd electrostatic discharge hbm human body model lsttl low-power schottky transistor-transistor logic mm machine model table 11. revision history document id release date data sheet status change notice supersedes 74vhc_vhct32_1 20090813 product data sheet - -
74vhc_vhct32_1 ? nxp b.v. 2009. all rights reserved. product data sheet rev. 01 13 august 2009 13 of 14 nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate 15. legal information 15.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term short data sheet is explained in section de?nitions. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple dev ices. the latest product status information is available on the internet at url http://www .nxp .com . 15.2 de?nitions draft the document is a draft version only. the content is still under internal review and subject to formal approval, which may result in modi?cations or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. short data sheet a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request via the local nxp semiconductors sales of?ce. in case of any inconsistency or con?ict with the short data sheet, the full data sheet shall prevail. 15.3 disclaimers general information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. right to make changes nxp semiconductors reserves the right to make changes to information published in this document, including without limitation speci?cations and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use nxp semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors accepts no liability for inclusion and/or use of nxp semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customers own risk. applications applications that are described herein for any of these products are for illustrative purposes only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. limiting values stress above one or more limiting values (as de?ned in the absolute maximum ratings system of iec 60134) may cause permanent damage to the device. limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the characteristics sections of this document is not implied. exposure to limiting values for extended periods may affect device reliability. terms and conditions of sale nxp semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www .nxp .com/pro? le/ter ms , including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by nxp semiconductors. in case of any inconsistency or con?ict between information in this document and such terms and conditions, the latter will prevail. no offer to sell or license nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. export control this document as well as the item(s) described herein may be subject to export control regulations. export might require a prior authorization from national authorities. 15.4 trademarks notice: all referenced brands, product names, service names and trademarks are the property of their respective owners. 16. contact information for more information, please visit: http://www .nxp.com for sales of?ce addresses, please send an email to: salesad dresses@nxp.com document status [1] [2] product status [3] de?nition objective [short] data sheet development this document contains data from the objective speci?cation for product development. preliminary [short] data sheet quali?cation this document contains data from the preliminary speci?cation. product [short] data sheet production this document contains the product speci?cation.
nxp semiconductors 74vhc32; 74vhct32 quad 2-input or gate ? nxp b.v. 2009. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com date of release: 13 august 2009 document identifier: 74vhc_vhct32_1 please be aware that important notices concerning this document and the product(s) described herein, have been included in section legal information. 17. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 ordering information . . . . . . . . . . . . . . . . . . . . . 1 4 functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 pinning information . . . . . . . . . . . . . . . . . . . . . . 2 5.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 functional description . . . . . . . . . . . . . . . . . . . 3 7 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 8 recommended operating conditions. . . . . . . . 4 9 static characteristics. . . . . . . . . . . . . . . . . . . . . 5 10 dynamic characteristics . . . . . . . . . . . . . . . . . . 6 11 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 12 package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 13 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 12 14 revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 15 legal information. . . . . . . . . . . . . . . . . . . . . . . 13 15.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 15.2 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 15.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 15.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 16 contact information. . . . . . . . . . . . . . . . . . . . . 13 17 contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

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