View MAX5973_4661454.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

________________________________________________________________ _ maxim integrated products _ _ 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com. phase redundancy power supervisor MAX5973 19-5243; rev 0; 4/10 general description the MAX5973 protects individual slave phases of a phase redundant dc-dc converter. the power protec - tion functions comprise an electronic circuit-breaker controller driving an external n-channel mosfet at the step-down power input, and an internal 3.3v switch for the slave phase-controller power. to protect the out - put bus, an ideal diode controller drives an external n-channel mosfet at the slave phase output. serial data to and from the slave phase is buffered by the MAX5973 to prevent a failure of one phase from interrupting com - munication to the remaining phases. similarly, the dif - ferential analog error signals for the phase controller are also buffered. an overvoltage comparator and switched-node monitor - ing function allows the MAX5973 to disable a phase that has a shorted (or latched-on) high-side mosfet. a fault-status output and a faultin input allow a master device to monitor and control each MAX5973 device. the MAX5973 is offered in a 5mm x 5mm, 40-pin tqfn package and is fully specified from -40 n c to +85 n c. applications phase redundant dc-dc converters step-down power supplies features s 9v_ to_ 14v_ operating_ range s electronic_ circuit-breaker_ controller_ drives_ external_ n-channel_ mosfet s internal,_ 350ma_ mosfet_ for_ 3.3v_ power s open-drain_ ideal_ diode_ controller_ drives_ external_ n-channel_ mosfet s serial_ data_ bus_ loop/bypass_ function s serial_ data_ clock_ buffer s dual_ analog_ error-signal_ buffer_ amplifiers s active-low_ faultin _ input s output_ overvoltage_ and_ high-side_ switch_ failure_ protection s input_ and_ output_ undervoltage_ lockout_ functions ordering information + denotes a lead(pb)-free/rohs-compliant package. * ep = exposed pad. part temp_ range pin-package MAX5973etl+ -40 n c to +85 n c 40 tqfn-ep*
phase redundancy power supervisor MAX5973 2 pwr, cbset, cbp, cbm, dor, sor, gor to gnd ......................................................... -0.3v to +24v gps to gnd ................................... capacitive connection only faultin to gnd ................................... -0.3v to (v stby + 0.3v) byp, refout to gnd ............................................ -0.3v to +6v cmpin to gnd ..................................................... -0.3v to +4.5v lxin, auxov to gnd ............................................. -0.3v to +4v gps .............. (gnd - 0.3v) to (v cbp + 9v) (internally clamped) stby, auxin, auxout, ovin, ovref to gnd ..... -0.3v to +6v errina, errinb, errouta, erroutb to gnd ............................................... -0.3v to +6v cmpout, faultout, clkin, clkout, busin, busout, loopin, loopout to gnd ............. -0.3v to (v stby + 0.3v) pgnd, agnd to gnd .......................................... -0.3v to +0.3v dor to sor ............................................................... -1v to +6v gmout to gnd ...................................................... -0.3v to +6v faultout current ......................................................... +25ma input/output current (all other pins) .................................. 20ma continuous power dissipation (t a = +70 n c) 40-pin tqfn, single-layer board (derate 22.2mw/ n c above +70 n c) ......................... 1777.8mw 40-pin tqfn, multilayer board (derate 35.7mw/ n c above +70 n c) ......................... 2857.1mw junction-to-ambient thermal resistance (note 1) b ja , single-layer board .............................................. 45 n c/w b ja , multilayer board ................................................ 35.7 n c/w junction-to-case thermal resistance (note 1) b jc , single-layer and multilayer board ........................ 2 n c/w operating temperature range .......................... -40 n c to +85 n c junction temperature ..................................................... +150 n c storage temperature range ............................ -65 n c to +150 n c lead temperature (soldering, 10s) ................................ +300 n c soldering temperature (reflow) ...................................... +260 n c absolute_ maximum_ ratings electrical_ characteristics (v stby = 3.3v, v auxin = 3.3v, v pwr = 9v to 14v, t j = -40 n c to +85 n c, unless otherwise noted. typical values are at v stby = 3.3v, v pwr = 12v, v auxin = 3.3v, and t a = +25 n c.) (note 2) note_ 1: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a four- layer board. for detailed information on package thermal considerations , refer to www.maxim-ic.com/thermal-tutorial . stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. parameter symbol conditions min typ max units pwr operating voltage range v pwr 9 14 v supply current i pwr v pwr = 14v 3.75 6.5 ma pwr undervoltage lockout v pwr,uv v pwr rising 8.25 9 v pwr undervoltage lockout hysteresis v pwr,uv-hys v pwr falling 1 v internal regulator v byp 5.25 v stby operating voltage range v stby 2.75 5.5 v stby undervoltage lockout v stby,uv v stby rising 2.15 2.45 2.75 v stby undervoltage lockout hysteresis v stby,uv-hys v stby falling 100 mv stby current i stby v stby = 5.5v 2.5 5 ma precision_ control_ input_ ( faultin ) leakage current i faultin v stby = v faultin = 5.5v 1 f a faultin low delay t sd v faultin < v il to v gps - v cbp = 2v, c gps = 12nf 750 1500 ns startup fault blanking time t su faultin low > v auxin > v auxin,uv to v faultout < v ol_ faultout 9 10 11.25 ms uncommitted_ comparator_ (cmpin) comparator reference v cmp,ref v cmpin rising 1.18 1.23 1.28 v leakage current i cmpin v cmpin = 2v 1 f a
phase redundancy power supervisor MAX5973 3 electrical_ characteristics_ (continued) (v stby = 3.3v, v auxin = 3.3v, v pwr = 9v to 14v, t j = -40 n c to +85 n c, unless otherwise noted. typical values are at v stby = 3.3v, v pwr = 12v, v auxin = 3.3v, and t a = +25 n c.) (note 2) parameter symbol conditions min typ max units hysteresis v cmp,hys v cmpin falling 25 mv power_ switch_ driver_ (gps,_ cbset,_ cbp,_ cbm) gps high voltage v gps,hi v pwr r 10v, faultin high, relative to cbp 7 8 10 v v pwr < 10v 5.5 7.5 9.0 gps high comparator threshold v gps,th v gps - v cbm 4.5 5 5.5 v gps pullup current i gps,up v gps = v gpshi - 2v 17 20 23 f a gps pulldown current i gps,dn v gps - v cbp = 2v 500 ma gps pulldown resistance r gps,dn i gps = 400ma 15 i cbset voltage range v pwr - v cbset 10 80 mv circuit-breaker offset voltage v cbset - v cbm -2 +2 mv cbset current i cbset 19.5 20 20.5 f a circuit-breaker response time t cb (v cbp - v cbm ) = (v cbp - v cbset ) + 10mv to v gps - v cbp = 2v, c gps = 12nf 225 375 ns internal_ power_ switch_ (auxin,_ auxout,_ auxov) auxin, auxout operating range v aux 2.6 5.5 v aux on-resistance r on auxin to auxout, i auxout = 75ma 350 500 m i aux circuit-breaker threshold i aux,cb 300 350 400 ma auxin undervoltage lockout v auxin,uv v auxin rising 2.30 2.45 2.6 v auxin undervoltage lockout hysteresis v auxin,uv-hys v auxin falling 100 mv auxout undervoltage lockout v auxout,uv v auxout rising 2.0 2.15 2.3 v auxout undervoltage lockout hysteresis v auxout, uv-hys v auxout falling 100 mv overvoltage protection threshold v auxov,th 690 700 710 mv auxout startup dv/dt sr auxout c auxin = 10 f f, c auxout = 1 f f 7.5 11.5 17 kv/s auxov leakage current i auxov v auxov = 700mv -1 +1 f a ideal_ diode_ driver_ (gor,_ sor,_ dor) sor, dor common-mode range relative to gnd 0.050 6.0 v sor input resistance to ground r sor v sor = 5v 0.5 1 2 m i
phase redundancy power supervisor MAX5973 4 electrical_ characteristics_ (continued) (v stby = 3.3v, v auxin = 3.3v, v pwr = 9v to 14v, t j = -40 n c to +85 n c, unless otherwise noted. typical values are at v stby = 3.3v, v pwr = 12v, v auxin = 3.3v, and t a = +25 n c.) (note 2) parameter symbol conditions min typ max units dor input resistance to ground i dor v dor = 5v 0.5 1 2 m i gor input current i gor,dn v gor = v sor + 2v 2 a gor input resistance r gor,dn i gor = 400ma 2 i gor input resistance to ground i gor,hi v gor = 12v 0.5 1 2 m i reverse-current blocking threshold v rcblk v dor - v sor rising 3 5 7 mv reverse-current blocking hysteresis v rchys v dor - v sor falling 3.3 10 mv reverse-current blocking response time t rcblk v dor - v sor = v rcblk + 10mv to v gor = v sor + 2v with c gor = 6.5nf, r gor = 1k i 250 400 ns switch_ node_ monitor_ (lxin) lxin overvoltage threshold v lxin,th v lxin rising 690 700 710 mv lxin overvoltage hysteresis v lxin,hys v lxin falling 25 mv lxin overvoltage response time t lxin v lxin - v lxin,th = 50mv to v gps - v cbp = 2v, c gps = 12nf 250 400 ns leakage current i lxin v lxin = 700mv 1 f a error_ signal_ buffer_ amplifier_ (errina,_ errinb,_ errouta,_ erroutb) input offset voltage v os -8 0 +8 mv common-mode voltage range v cm relative to gnd 0.1 3.3 v errin_ bias current i errin_ v errin_ = 0.1v to 3.3v 200 na gain av errin_ v errin_ = 0.2v to 3.3v, i errout = 100 f a 0.995 1.000 1.005 v/v power-supply rejection ratio psrr to pwr at f = 10khz 85 db to pwr at f = 1mhz 50 -3db bandwidth bw 8 mhz slew rate sr 5 v/ f s output short-circuit current i errout_sc sourcing at 10mv error, v errin_ = 3.3v 750 f a sinking at 10mv error, v errin_ = 1.0v 350 sinking at 10mv error, v errin_ = 100mv 70
phase redundancy power supervisor MAX5973 5 electrical_ characteristics_ (continued) (v stby = 3.3v, v auxin = 3.3v, v pwr = 9v to 14v, t j = -40 n c to +85 n c, unless otherwise noted. typical values are at v stby = 3.3v, v pwr = 12v, v auxin = 3.3v, and t a = +25 n c.) (note 2) parameter symbol conditions min typ max units serial_ bus_ loop/bypass_ (busin,_ loopout,_ loopin,_ busout,_ clkin,_ clkout,_ faultin ) input logic-low (busin, loopin, clkin, faultin ) v il_ 0.25 x v stby v input logic-high (busin, loopin, clkin, faultin ) v ih_ 0.7 x v stby v output logic-low (loopout, busout, clkout) v ol_ sinking 3ma 200 mv output logic-high (loopout, busout, clkout) v oh_ sourcing 3ma 0.9 x v stby v busin leakage current i busin v busin = v stby = 5.5v 1 f a loopin leakage current i loopin v loopin = v stby = 5.5v 1 f a clkin leakage current i clkin v clkin = v stby = 5.5v 1 f a propagation delay t pd_bus busin to loopout 20 ns loopin to busout 20 busin to busout 20 clkin to clkout 20 open-drain_ output_ ( faultin ,_ cmpout) output logic-low v ol_ faultout i faultout = 5ma, i cmpout = 5ma 0.4 v open-drain leakage current i lkg_ faultout v faultout = v stby = 5.5v, v cmpout = 5.5v 1 f a refout reference voltage v refout i refout = 1ma 690 700 710 mv current-amplifier_ output_ (gmout) transconductance v cbp - v cbm = 10mv to 80mv 9 10 11 ma/v input offset voltage v cbp - v cbm v cbp - v cbm = 10mv, i gmout = 100 f a -2 +2 mv transconductance temperature variation t gmout v cbp - v cbm = 80mv, t a = + 25 n c to +85 n c 85 ppm/ n c input range for v cbp - v cbm 80 mv input bias current i cbp v cbp = v cbm = 12v -1 +1 f a i cbm v cbp = v cbm = 12v -1 +1 maximum output voltage 3 v output resistance v cbp - v cbm = 80mv 350 k i
phase redundancy power supervisor MAX5973 6 electrical_ characteristics_ (continued) (v stby = 3.3v, v auxin = 3.3v, v pwr = 9v to 14v, t j = -40 n c to +85 n c, unless otherwise noted. typical values are at v stby = 3.3v, v pwr = 12v, v auxin = 3.3v, and t a = +25 n c.) (note 2) note_ 2: all devices 100% production tested at t a = +25 c and t a = +85 c. limits over the temperature range are guaranteed by design. parameter symbol conditions min typ max units overvoltage_ comparator_ (ovref,_ ovin) ovin voltage range v ovref > v lckout 0.425 2 v ovref voltage range v lckout 2 v ovref lockout voltage v lkcout v ovref rising, v ovref < v lckout disables ovref comparator 425 450 475 mv ovref lockout voltage hysteresis v ovref,hys 37.5 mv ovin input offset error v ovref = 700mv -5 0 +5 mv ovin comparator hysteresis v ovin,hys 50 mv ovin, ovref input leakage current i lkg_ovin v ovin = 700mv 1 f a propagation delay t pd_ovin v ovin - v ovref = 50mv to v gps - v cbp = 2v, c gps = 12nf 325 500 ns thermal_ characteristics thermal shutdown t j rising +150 n c thermal shutdown hysteresis t j falling 20 n c
phase redundancy power supervisor MAX5973 7 typical operating characteristics (v stby = 3.3v, v auxin = 3.3v, v pwr = 12v, c gps = 12nf, and t a = +25 n c, unless otherwise noted.) i pwr vs. v pwr MAX5973 toc01 v pwr (v) i pwr (ma) 13 12 11 10 3.0 3.5 4.0 4.5 2.5 9 14 t a = +25c t a = -40c t a = +85c v refout vs. temperature MAX5973 toc02 temperature (c) v refout (mv) 75 50 25 0 -25 696 697 698 699 700 701 702 703 704 705 695 -50 100 i refout = 1ma i gmout error vs. v cbp - v cbm MAX5973 toc03 v cbp - v cbm (mv) i gmout error (%) 70 60 20 30 40 50 -1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0 -2.0 10 80 transconductance vs. temperature MAX5973 toc04 temperature (c) g m (ma/v) 75 50 -25 0 25 9.25 9.50 9.75 10.00 10.25 10.50 10.75 11.00 9.00 -50 100 v cbp - v cbm = 10mv and 80mv error-amplifier frequency response MAX5973 toc05 frequency (mhz) response (db) 10 1 -30 -25 -20 -15 -10 -5 0 5 -35 0.1 100 v in = 100mv p-p + 2.5v r l = 10k i circuit breaker to gps low and faultout low-response time MAX5973 toc06 v gps 10v/div 0v 0v v faultout 2v/div v cbp - v cbm 50mv/div 200ns/div r cbset = 2.49ki lxin to gps low and faultout low-response time MAX5973 toc07 v gps 10v/div 0v 0v 0v v faultout 2v/div v lxin 2v/div 200ns/div
phase redundancy power supervisor MAX5973 8 typical operating characteristics (continued) (v stby = 3.3v, v auxin = 3.3v, v pwr = 12v, c gps = 12nf, and t a = +25 n c, unless otherwise noted.) ovin to gps low and faultout low-response time MAX5973 toc08 v gps 10v/div 0v 600mv 0v v faultout 2v/div 800nv v ovin 200mv/div 200ns/div faultin to gps low and faultout low-response time MAX5973 toc09 v gps 10v/div 0v 0v 0v v faultout 2v/div 200ns/div v faultin 2v/div i pwr and i stby vs. temperature MAX5973 toc10 temperature (c) current (ma) 75 50 25 0 -25 1 2 3 4 5 6 0 -50 100 i stby i pwr v gps - v cbp vs. v pwr MAX5973 toc11 v pwr (v) v gps - v cbp (v) 13.5 13.0 12.0 12.5 10.0 10.5 11.0 11.5 9.5 1 2 3 4 5 6 7 8 9 10 0 9.0 14.0 r gor,dn vs. v dor - v sor MAX5973 toc13 v dor - v sor (mv) r gor,dn (i) 14 13 6 7 8 10 11 9 12 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 0 5 15 i gor = 400ma i gps,up vs. v gps - v cbp MAX5973 toc12 v gps - v cbp (v) i gps,up (a) 9 8 7 6 5 10 15 20 25 0 5 10 i cbset vs. temperature MAX5973 toc14 temperature (c) i cbset (a) 75 50 -25 0 25 19.25 19.50 19.75 20.00 20.25 20.50 20.75 21.00 19.00 -50 100
phase redundancy power supervisor MAX5973 9 pin description pin configuration MAX5973 top view 35 36 34 33 12 11 13 cbset cbm gps i.c. auxin 14 pwr loopin clkin clkout busout busin n.c. agnd errina 1 2 faultout 4 5 6 7 27 28 29 30 26 24 23 22 gmout refout errouta ovref ovin dor cbp loopout 3 25 37 stby sor 38 39 40 gnd byp n.c. gor pgnd lxin faultin 32 15 erroutb cmpout 31 16 17 18 19 20 n.c. auxout auxov n.c. errinb 8 9 10 21 cmpin + ep* *connect to agnd. pin name function 1 pwr power-supply input. nominally 12v, with 9v uvlo. connect to the 12v supply through a 10 i to 100 i resistor and bypass with a 1 f f capacitor. 2 cbset 12v circuit-breaker threshold voltage set input. cbset is driven by a 20 f a current sink. connect a resistor between cbset and cbp to set the circuit-breaker trip threshold. 3 cbp 12v current-sense positive input. connect to the high side of an external sense resistor at the source of the 12v n-channel mosfet switch. 4 cbm 12v current-sense negative input. connect to the low side of an external sense resistor at the drain of the 12v n-channel mosfet switch. 5 gps gate drive for external 12v input-power n-channel mosfet switch 6 i.c. internal connection. connect to gnd. 7 auxin auxiliary 3.3v power switch input 8 auxout auxiliary 3.3v power switch output. connect to the 3.3v power input of the phase regulator. 9 auxov auxiliary 3.3v power switch overvoltage protection input 10, 20, 30, 40 n.c. no connection. not internally connected. 11 lxin high-side switch failure detection input. if lxin rises above the failure detection threshold voltage, the input switches will turn off to prevent a shorted high-side switch from causing an overvoltage condition. connect to the phase converters lx node through an rc divider-filter circuit. 12 pgnd power ground
phase redundancy power supervisor MAX5973 10 pin description (continued) pin name function 13 gor gate drive for external output oring n-channel mosfet switch. this is an open-drain output with strong pulldown capability. 14 sor source oring sense connection. connect sor to the source of the external oring n-channel mosfet. 15 dor drain oring sense connection. connect dor to the drain of the external oring n-channel mosfet. 16 ovin overvoltage comparator input. connect to the output of the combined slave phases through a resistive divider. 17 ovref overvoltage comparator reference input. connect to an overvoltage threshold reference that varies with the output-voltage set point. 18 errouta channel a analog error signal unity-gain buffer output 19 erroutb channel b analog error signal unity-gain buffer output 21 errinb channel b analog error signal unity-gain buffer input 22 errina channel a analog error signal unity-gain buffer input 23 agnd analog signal ground 24 clkout clock buffer output. connect to the slave phase data-clock input. 25 clkin clock buffer input. connect to the master data-clock signal. 26 loopout serial bus loop output. serial bus loop output to the phase regulator. 27 loopin serial bus loop input. serial bus loop input from the phase regulator. this input is normally connected to busout, but is disconnected and ignored in the event of a fault. 28 busout serial bus loop/bypass output. this output is connected to the loopin input during normal operation, and connected to busin in the event of a fault. connect to the busin input on the next phase, or return to the master data input if there are no more phases. 29 busin serial bus loop/bypass input. this input is connected to loopout during normal operation, and internally connected to busout in the event of a fault. connect to the bus master data output or busout of the previous phase. 31 cmpin uncommitted comparator negative input 32 cmpout uncommitted comparator open-drain output 33 faultin external enable control input. pull this input to ground to disable the associated phase regulator. 34 faultout open-drain fault output. faultout asserts low if there is a failure of the associated phase controller. 35 gmout transconductance current-sense amplifier output. connect all phases gmout pins to a single resis - tor to sum the input currents for all phases in a domain. 36 refout reference output 37 stby standby power input. power to this input must be cycled to unlatch the device after a fault condition. 38 gnd ground 39 byp internal regulator bypass connection. connect to ground through a 1 f f capacitor. ep exposed pad. internally connected to agnd. connect this thermal pad to the ground plane and use multiple vias to a solid copper pour on the bottom layer of the pcb.
phase redundancy power supervisor MAX5973 11 functional diagram stby uvlo byp byp 1.2v 1.2v 700mv 1.2v uvlo byp uvlo 1.2v byp uvlo stby gmout faultout clkin clkout loopin loopout errouta busout busin 3.3v ldo pwr 12v cbp cbset cbm gps q1 nfet auxin auxout auxov lxin r cbset r auxov1 r lxin2 c lxin d 1 r lxin1 r auxov2 r ovin2 r ovin1 r sense byp uvlo charge pump byp byp 3.3v circuit breaker byp cmpin 12v cmpout gnd agnd pgnd filter inductor filter capacitor q2 nfet q3 nfet q4 nfet slave phase power path gmout to master refout enable input r gmout faultin 1.2v 700mv stby stby stby bandgap 0 1 erroutb errinb errina ovin ovref sor 10mv dor gor stby 0 1 stby master master master or previous phase next phase or master clock in data out data in error + error - slave from master byp byp byp byp uncommitted comparator refout or external reference thermal shutdown MAX5973 700mv reference fault logic
phase redundancy power supervisor MAX5973 12 detailed description the MAX5973 phase redundancy power supervisor monitors and protects an individual slave phase in phase redundant dc-dc converters. the device features an external power switch and an ideal diode oring controller that isolates an indi - vidual slave from the multiphase dc-dc converter combined input and output when a fault is present. the programmable circuit breaker sets the current limit of the slave phase and generates a fault response when it is exceeded. an integrated transconductance current-sense amplifier continuously monitors the cur - rent flowing through the external power switch during normal operation. to provide true phase-redundancy, the oring diode controller drives an n-channel reverse- current blocking mosfet at the output of the slave. an internal auxiliary power switch allows the MAX5973 to monitor and protect the 3.3v supply powering the slave phase controller against undervoltage, overvolt - age, and overcurrent conditions. a comparator input monitors the switching node of the slave phase for high-side switch failure detection, and an overvoltage comparator input monitors the combined multiphase dc-dc converter output for overvoltage conditions. the MAX5973 also features a serial bus loop/bypass, clock buffer, error signal buffers, an uncommitted com - parator, and thermal shutdown protection. fault output the faultout output is an open-drain output that is driven low whenever a fault condition has occurred. the faultout output latches low in the event of any of the following conditions: when any of the fault conditions listed in table 1 occur, the part will trigger a fault condition and the events in table 2 will occur. once a fault condition has occurred, the only way to clear the fault condition is by cycling the stby voltage below its undervoltage threshold. fault input the faultin input is a logic-level input. after a power- up is initiated, the MAX5973 will wait for approximately 10ms after auxout has risen above its undervoltage lockout threshold. at this time, the device will check the status of the faultin input. if the voltage at faultin is below v il , the MAX5973 will initiate a fault which will pull the gps and gor gate-drive outputs low and shut down the internal power switch between auxout and auxin. in addition, any time after a normal power-up, the faultin input can be driven low by the user to cause the gps and gor outputs to pull down and the internal power switch to shut down. table_ 1._ fault_ conditions table_ 2._ fault_ response events_ that_ cause_ a_ latched_ fault type_ of_ fault description faultin low faultin input is pulled below the v il threshold after power-up i main fault gps pulled low because of cbp/cbm circuit-breaker trip v gps fault gps output below v gps,th for longer than t su (when commanded high on power-up) or auxout below its undervoltage lock - out threshold after t su (when commanded high on power-up) i aux fault auxin/auxout circuit-breaker trip v aux fault auxov input above 700mv threshold overvoltage fault output overvoltage fault (ovin above ovref and ovref above v lckout ) combined with gor commanded high (i.e., slave forcing overvoltage) lxin fault failed high-side switch or excessive duty cycle slave startup failed faultin was not high by t su = 10ms after uvlo auxout satisfied v gps failure gps goes below v gps,th for 10ms any time after the part has powered up thermal shutdown thermal shutdown circuit has activated fault_ response action description busin routed to busout the mux that drives the busout sig - nal will allow the busin signal to pass directly to busout clkout pulled low clkout will be driven low gor pulled low gor will be pulled low by the i gor,dn current (2a typ) gps pulled low gps will be pulled low by the i gps,dn current (500ma typ) auxin to auxout switch opened the gate of the switch connecting auxin to auxout will be pulled low faultout pulled low an open-drain driver will pull faultout low
phase redundancy power supervisor MAX5973 13 external power switch controller the MAX5973 includes an electronic circuit-breaker con - troller for an external high-side n-channel switch. this switch allows or blocks +12v input power to the slave dc-dc controller. the gps output drives the gate of the external mosfet to +8v above the voltage present at cbp. an external sense resistor placed at the drain of the external mosfet is used to detect overcurrent events. the cbp and cbm inputs are connected across this resistor to measure the input current. a precision current sink drives the cbset input; a resis - tor connected between cbp and cbset establishes a circuit-breaker threshold. if the voltage across the sense resistor (cbp to cbm) exceeds the voltage across the set resistor (cbp to cbset), the gps output pulls the gate of the external mosfet to cbp, and eventually to ground, blocking the flow of current to a shorted phase. the gps output is also pulled low if faultin is low, or in the event of an overvoltage fault (confirmed by the ideal- diode controller) or the switched-node monitor. a circuit- breaker shutdown of the internal power switch will also cause gps to pull down with a 500ma (typ) current sink. transconductance current-sense amplifier the MAX5973 includes a precision transconductance amplifier that senses the voltage between cbp and cbm, and outputs a current signal at gmout. this signal can be combined in parallel with the gmout sig - nals from other MAX5973 devices to provide a summed current-sense signal for all phases in a redundant-phase converter. the gmout pins of all MAX5973 devices in a multi - phase converter should be connected to a single resistor to ground. the voltage across this resistor is proportional to the combined input current of all phases. appropriate selection of the resistor value allows the voltage gain of the current-sense signals to be tailored to the require - ments of an analog-to-digital converter. to generate an accurate average current signal, the external current-sense resistor should be separated from the high-side switch of the step-down phase by an lc filter. otherwise, large step current pulses at the input of the phase will cause inaccurate current-sense output. ideal oring diode controller the MAX5973 controls an external n-channel mosfet at the output of the redundant phase to prevent reverse current flow, while still allowing forward current to flow with low resistive loss and voltage drop. during normal operation, the open-drain gor output is high impedance to allow an external pullup resistor to drive the gate of this external n-channel switch above the potential at sor. if the differential voltage between the dor and sor inputs exceeds 5mv, the gor output pulls down with a 2a (typ) current sink to sor, blocking reverse current. when dor falls to 1.7mv or less above sor, the gor output goes high impedance again to allow forward current flow from the phase. the state of the gor output is used in conjunction with the overvoltage comparator to determine if the associ - ated phase is driving an overvoltage condition. auxiliary 3.3v power switch an internal mosfet and current-sense circuit is used to control 3.3v power to the slave phase controller. during normal operation, 3.3v power flows through the MAX5973 from auxin to auxout and to the redundant phase controller. if the current exceeds the internal 350ma (typ) i aux,cb circuit-breaker threshold, the internal switch is disabled and the MAX5973 shuts down the phase. in addition, the gps output will pull down and block 12v power as well. an undervoltage lockout feature prevents power from flowing through the internal switch below the v auxin,uv threshold. a programmable overvoltage protection function is implemented by connecting a resistor-divider from auxout to auxov to ground. if the auxov input rises above its 700mv threshold, a fault condition is detected and the MAX5973 shuts down all switches and pulls the faultout output low. if the internal power switch will not be used, auxin should be connected to stby, auxout should be left unconnected, and auxov should be connected to ground. switched-node monitor the lxin input is connected through an rc filter to the high side of the inductor of the associated dc-dc phase. this input is monitored by an overvoltage com - parator. if the voltage at lxin rises above v lxin,th , the MAX5973 concludes that the high-side converter switch has failed. under this condition, the MAX5973 pulls down and latches the gps and gor gate-drive outputs to isolate the failed phase and prevent an overvoltage condition at the load.
phase redundancy power supervisor MAX5973 14 the rc filter between the inductor and lxin should be designed so that switching at normal duty cycle does not cause lxin to rise above v lxin,th . a small schottky diode can be used to discharge the rc filter when the rectifier is conducting, allowing cycle-by-cycle protection. overvoltage comparator the ovin input is connected to the load voltage (com - bined output of all phases) and is compared to the ovref input voltage. if ovin rises above ovref while the gor output is low because reverse current is pres - ent, the MAX5973 will take no action and will wait for ovin to fall below ovref. however, if ovin is above ovref and the gor output is also high, the MAX5973 has detected a failure in its associated phase controller (it is driving the overvoltage condition) and will pull down and latch the gps and gor outputs. thermal shutdown the MAX5973 features thermal shutdown. when the junction temperature of the device exceeds +150 n c (typ), a fault response disables the slave phase of the device. the fault condition remains until the junction tem - perature drops by 20 n c (typ) and the voltage at stby is cycled below its uvlo threshold. serial bus loop/bypass and clock buffer the MAX5973 incorporates logic that normally routes and buffers digital serial data from busin to loopout, and from loopin to busout. however, if a fault condi - tion is detected and the MAX5973 must disable its slave phase, then busin is connected directly to busout and the signal at loopin is ignored. see figure 1. a logic buffer (clkin to clkout) is included in the MAX5973 to pass the switching frequency synchroniza - tion clock signal from the master to the slave. in the event of a slave failure, the buffer prevents the master clock signal from being corrupted. the clock signal output (clkout) to a disabled slave goes low if the MAX5973 detects a fault condition. busin, loopin, and clkin are cmos inputs referred to the stby input voltage. the busout, loopout, and clkout output are cmos outputs powered by the stby voltage. if the loop/bypass circuit and clock buffer are not used, busin, loopin, and clkin should be connected to ground, and busout, loopout, and clkout should be left unconnected. error signal buffers the MAX5973 includes two unity-gain buffer amplifiers for the analog differential error signals that are sent in parallel to each phase. the buffer amplifiers prevent a failed phase controller from collapsing or distorting the analog error signals. the signals are received at errina and errinb, and the buffered signals are output at errouta and erroutb, respectively. figure 1. serial loop/bypass and clock buffer master clikin stby 0 1 fault fault logic slave clock in data in data out loopin loopout clkout busin busout next phase MAX5973 1 0 stby stby stby
phase redundancy power supervisor MAX5973 15 applications information power sequencing the MAX5973 internal logic is powered from the stby input. this supply should be established before the pwr and auxin supplies are brought up. a controlled restart can be performed by lowering the pwr and auxin sup - plies while stby remains powered. after a fault condition has occurred, all supplies must be removed to unlatch the fault condition in the MAX5973 state machine. startup sequence: 1) establish v stby . 2) establish v pwr . 3) establish v auxin . normal restart sequence: 1) remove v auxin . 2) remove v pwr . 3) establish v pwr . 4) establish v auxin . unlatch from fault condition sequence: 1) remove v auxin . 2) remove v pwr . 3) remove v stby . 4) repeat startup sequence. transconductance current-sense amplifier the current-sense resistor, r sense , must be connected between cbp and cbm to sense the average slave input current. the voltage drop across r sense should be less than or equal to 80mv, therefore r sense should be selected based on the following equation: sense sense,fs r i 80mv where i sense , fs is the full-scale slave input current. a kelvin sense connection should be used to connect r sense to cbp and cbm. a capacitor between cbp and cbm can be used to help smooth the input current wave - form. an inductive filter between the external fet and the slave high-side switch may be required to smooth the actual input current. an output resistor, r gmout , must be connected between the transconductance current-sense amplifier output gmout and agnd. the transconductance, g m , is typi - cally 10ma/v: gmout m sense,fs r g v 3v circuit-breaker protection (cbset) the circuit-breaker threshold is programmed by con - necting the resistor r cbset between the high-side of r sense and cbset. sense,cb sense cbset i r r 20 a = where i sense,cb is the desired circuit-breaker current limit. remember to allow some margin between the maxi - mum expected input current and the circuit-breaker limit to allow for normal load transients plus ripple and noise. auxiliary input ov protection (auxov) the output of a resistive divider supplied by auxout is connected to auxov. an internal comparator compares the voltage at auxov and disables the internal switch and issues a fault if the voltage exceeds the 700mv threshold. high-side switch failure (lxin) the high-side switch failure detection input lxin moni - tors the average voltage at the switching node lx of the phase controller. the high-side switch failure threshold is set by an rc circuit and a schottky diode. the schottky diode d1 connected in parallel with r lxin1 is used to discharge the filter on every cycle of the dc-dc con - verter, allowing the MAX5973 to monitor each cycle for a high-side switch failure. begin by selecting a maximum failure detection time t high that is larger than one switching period. the values of r lxin1 and r lxin2 should be chosen to keep v lxin below its absolute maximum rating of 4v even when the input voltage is applied to lxin continuously. lxin2 in lxin1 lxin2 r v x 4v r r ? ? < ? ? + ? ? diode d1 will discharge c lxin to the schottky v f voltage when q3 is on. the MAX5973 will shut down the dc-dc converter when v lxin = 700mv. during normal opera - tion, capacitor c lxin must not rise by 700mv - v f . this can be achieved by sizing c lxin and the charging cur - rent through r lxin1 . the approximate average charging current with q2 on and q3 off is ( ) f in f clxin,up lxin1 lxin2 700mv - v v 700mv - v 2 i r 2 r ? ? ? ? ? ? ? = ?
phase redundancy power supervisor MAX5973 16 the value of capacitor c lxin can then be chosen according to: clxin,up high lxin f i t c 700mv - v = the values of r lxin1 and r lxin2 should also be chosen to minimize power dissipation: 2 in diss avg lxin1 lxin2 v p d r r ? ? ? ? = ? ? + ? ? where d avg is the average duty cycle. output overvoltage protection (ovin) the output of a resistive divider supplied by the com - bined multiphase output is connected to ovin. an internal comparator compares the voltage at ovin with either refout or an external reference to determine if an overvoltage condition is present. layout considerations kelvin connections should be used for the nodes con - necting cbp and cbm to r sense , and the nodes con - necting dor and sor to the oring n-channel mosfet.
phase redundancy power supervisor MAX5973 17 typical application circuit MAX5973 pgnd sor dor ovin ovref lxin refout stby gnd byp cmpout cmpin cbm gps auxin busout loopin loopout gor gmout auxout r6 r7 auxov agnd errina errinb cbp busin cbset errouta erroutb pwr c2 1ff c1 1ff c5 0.1ff c3 0.1ff filter inductor filter capacitor q1 nfet to master fault input from master fault output uncommitted comparator output uncommitted comparator input from master or previous phase to master or next phase from slave data output master error signal + master error signal - to slave data input ovref 3.3v 12v 3.3v r3 r15 200i 12v l1 power inductor q4 nfet r8 1ki r18 200i r1 10i r9 5mi r10 2ki r4 200i 12v r5 200i 3.3v r26 10ki r16 200i r2 to adc input other phases gmout r19 200i - error signal to slave + error signal to slave refout r13 r14 r23 1ki filter inductor slave v cc q2 nfet slave dh slave dl q3 nfet r12 c4 d1 r11 r22 1ki r21 1ki r25 5ki r24 5ki combined multiphase output to load clkin from master clock output r20 1ki clkout to slave clock input r17 200i faultout faultin
phase redundancy power supervisor MAX5973 18 package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package_ type package_ code document_ no. 16 tqfn-ep t1655+3 21-0140 chip information process: bicmos
phase redundancy power supervisor MAX5973 maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 19 ? 2010 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 4/10 initial release

▲Up To Search▲

Price & Availability of MAX5973

	To Download MAX5973 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .