KS57C2308/p2308/c2316/p2316 product overview 1- 1 1 product overview overview the KS57C2308/c2316 single-chip cmos microcontroller has been designed for high perfo rmance using samsung's newest 4- bit cpu core, sam47 (samsung arrangeable microcontrollers). with features such as lcd direct drive capability, 8-bit timer/counter, and serial i/o, the KS57C2308/c2316 offer an excellent design solution for a wide variety of applications that require lcd functions. up to 40 pins of the 80-pin qfp package can be dedicated to i/o. six vectored interrupts provide fast response to internal and external events. in addition, the KS57C2308/c2316 's advanced cmos technology provides for low power consumption and a wide operat ing voltage range. otp the KS57C2308/c2316 microcontroller is also available in otp (one time programmable) version, ks57p2308/p2316. ks57p2308/p2316 microcontroller has an on-chip 8/16-kbyte one-time-programmable eprom instead of masked rom. the ks57p2308/p2316 is comparable to KS57C2308/c2316, both in function and in pin configuration.
product overview KS57C2308/p2308/c23 16/p2316 1- 2 features memory ? 512 4-bit ram ? 8 k 8-bit rom (KS57C2308/p2308) ? 16 k 8-bit rom (ks57c2316/p2316) i/o pins ? input only: 8 pins ? i/o: 24 pins ? output: 8 pins sharing with segment driver outputs lcd controller/driver ? maximum 16-digit lcd direct drive capability ? 32 segment, 4 common pins ? display modes: static, 1/2 duty (1/2 bias), 1/3 duty (1/2 or 1/3 bias), 1/4 duty (1/3 bias) 8-bit basic timer ? programmable interval timer ? watchdog timer 8-bit timer/counter 0 ? programmable 8-bit timer ? external event counter ? arbitrary clock frequency output ? serial i/o interface clock generator watch timer ? real-time and interval time measurement ? four frequency outputs to buz pin ? clock source generation for lcd 8-bit serial i/o interface ? 8-bit transmit/receive mode ? 8-bit receive only mode ? lsb-first or msb-first transmission selectable ? in ternal or external clock source bit sequential carrier ? support 16-bit serial data transfer in arbitrary format interrupts ? three internal vectored interrupts ? three external vectored interrupts ? two quasi-interrupts memory-mapped i/o structure ? data memory bank 15 two power-down modes ? idle mode (only cpu clock stops) ? stop mode (main or sub system oscillation stops) oscillation sources ? crystal, ceramic, or rc for main system clock ? crystal or external oscillator for subsystem clock ? main system clock frequency: 4.19 mhz (typical) ? subsystem clock frequency: 32.768 khz ? cpu clock divider circuit (by 4, 8, or 64) instruction execution times ? 0.95, 1.91, 15.3 s at 4.19 mhz (main) ? 122 s at 32.768 khz (subsystem) operating temperature ? ? 40 c to 85 c operating voltage range ? 1.8 v to 5.5 v package type ? 80 -pin qfp
KS57C2308/p2308/c2316/p2316 product overview 1- 3 block diagram interrupt control block instruction register program counter program status word stack pointer arithmetic and logic unit instruction decoder clock reset x in xt in internal interrupts int0, int1,int2 p3.0/lcdck p3.1/lcdsy p3.2 p3.3 i/o port 3 512 x 4-bit data memory 8/16-kbyte program memory lcd drive/ controller bias vlc0-vlc2 lcdck/p3.0 lcdsy/p3.1 com0-com3 seg0-seg23 p8.0-p8.7/ seg24-seg31 p2.3/buz x out xt out p6.0-p6.3/ ks0-ks3 i/o port 6 p7.0-p7.3/ ks4-ks7 i/o port 7 p4.0-p4.3 i/o port 3 p5.0-p5.3 i/o port 4 8-bit timer/ counter 0 p1.3/tcl0 p2.0/tclo0 p8.0-p8.7/ seg24-seg31 i/o port 8 p1.0/int0 p1.1/int1 p1.2/int2 p1.3/tcl0 input port 1 p2.0/tclo0 p2.1 p2.2/clo p2.3/buz i/o port 2 basic timer 4-bit accumulator flags p0.0/int4 p0.1/sck p0.2/so p0.3/si i/o port 0 serial i/o port p0.2 /so p0.3 /si p0.1 /sck watch-dog timer watch timer figure 1 -1 . KS57C2308/c2316 simplified block diagram
product overview KS57C2308/p2308/c23 16/p2316 1- 4 pin assignments seg19 seg20 seg21 seg22 seg23 p8.0/seg24 p8.1/seg25 p8.2/seg26 p8.3/seg27 p8.4/seg28 p8.5/seg29 p8.6/seg30 p8.7/seg31 p 7.3/ks7 p7.2/ks6 p7.1/ks5 p7.0/ks4 p6.3/ks3 p6.2/ks2 p6.1/ks1 p6.0/ks0 p5.3 p5.2 p5.1 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 KS57C2308 ks57c2316 (top view) seg2 seg1 seg0 com0 com1 com2 com3 bias vlc0 vlc1 vlc2 v dd v ss x out x in test xt in xt out reset p0.0/int4 p0.1/sck p0.2/so p0.3/si p1.0/int0 p1.1/int1 p1.2/int2 p1.3/tcl0 p2.0/tclo0 p2.1 p2.2/clo p2.3/buz p3.0/lcdck p3.1/scdsy p3.2 p3.3 p4.0 p4.1 p4.2 p4.3 p5.0 seg3 seg4 seg5 seg6 seg7 seg8 seg9 seg10 seg11 seg12 seg13 seg14 seg15 seg16 seg17 seg18 figure 1 -2 . KS57C2308/c2316 80 - qfp pin assignment diagram
KS57C2308/p2308/c2316/p2316 product overview 1- 5 pin descriptions table 1 - 1. KS57C2308/c2316 pin descriptions pin name pin type description number share pin reset value circuit type p0.0 p0.1 p0.2 p0.3 i i/o i/o i 4-bit input port. 1-bit and 4-bit read and test are possible. 4-bit pull-up res istors are software assignable. 20 21 22 23 int4 sck so si input a-1 d * d * a-1 p1.0 p1.1 p1.2 p1.3 i 4-bit input port. 1-bit and 4-bit read and test are possible. 4-bit pull-up resistors are software assignable. 24 25 26 27 int0 int1 int2 tcl0 input a-1 p2.0 p2.1 p2.2 p2.3 i/o 4-bit i/o port. 1-bit and 4-bit read/write and test are possible. 4-bit pull-up resistors are software assignable. 28 29 30 31 tclo0 ? clo buz input d p3.0 p3.1 p3.2 p3.3 i/o 4-bit i/o port. 1-bit and 4-bit read/write and test are possible. each individual pin can be specified as input or output. 4-bit pull-up resistors are software assignable. 32 33 34 35 lcd ck lcdsy input d p4.0 ? p4.3 p5.0 ? p5.3 i/o 4-bit i/o ports. n-channel open-drain output up to 5 v. 1-, 4-, and 8-bit read/write and test are possible. ports 4 and 5 can be paired to support 8-bit data transfer. 4-bit pull-up resistors are software assignable. 36 ? 43 ? input e p6.0 ? p6.3 p7.0 ? p7.3 i/o 4-bit i/o ports. port 6 pins are individually software configurable as input or output. 1-bit and 4-bit read/write and test are possible. 4-bit pull-up resistors are software assignable. ports 6 and 7 can be paired to enable 8-bit data transfer. 44 ? 51 ks0 ? ks3 ks4 ? ks7 input d * p8.0 ? p8.7 o output port for 1-bit data (for use as cmos driver only) 59 ? 52 seg24 ? seg31 output h-16 seg0 ? seg23 o lcd segment signal output 3 ? 1, 80 ? 60 ? output h-15 seg24 ? seg31 o lcd segment signal output 59 ? 52 p8.0 ? p8.7 output h-16 com0 ? com3 o lcd common signal output 4 ? 7 ? output h-15 v lc0 ? v lc2 ? lcd power supply. voltage dividing resistors are assignable by mask option 9 ? 11 sclk sdat ? ? bias ? lcd power control 8 ? ? ? lcdck i/o lcd clock output for display expansion 32 p3.0 input d
product overview KS57C2308/p2308/c23 16/p2316 1- 6 table 1 - 1. KS57C2308/c2316 pin descriptio ns (continued) pin name pin type description number share pin reset value circuit type lcdsy i/o lcd synchronization clock output for lcd display expan sion 33 p3.1 input d tcl0 i/o e xternal clock input for timer/counter 0 27 p1.3 input a-1 tclo0 i/ o timer/counter 0 clock output 28 p 2.0 input d si i serial interface data input 23 p0.3 input a-1 so i/ o serial interface data output 22 p0.2 input d * sck i/o serial i/o interface clock signal 21 p0.1 input d * int0 int1 i external interrupts . the triggering edge for int0 and int1 is selectable. only int0 is synchronized with the system clock. 24 25 p1.0 p1.1 input a-1 int2 i quasi-interrup t with detection of rising edge signals. 26 p1.2 input a-1 int4 i external interrupt input with detection of rising or falling edge 20 p0.0 input a-1 k s 0 ? k s7 i/o quasi-interrupt inputs with falling edge detection. 44 ? 51 p6 .0 ? p7 .3 input d * clo i/ o c pu c lock output 30 p2.2 input d buz i/ o 2, 4, 8 or 16 k hz frequency output for buzzer sound with 4.19 mhz main system clock or 32.768 khz subsystem clock. 31 p2.3 input d x in, x out ? crystal, ceramic or rc oscillator pins for main system clock. (for external clock input, use x in and input x in ? s reverse phase to x out ) 15,14 ? ? ? xt in, xt out ? crystal oscillator pins for subsystem clock. (for external clock input, use xt in and input xt in 's reverse phase to xt out ) 17,18 ? ? ? v dd ? main power supply 12 ? ? ? v ss ? ground 13 ? ? ? reset ? reset signal 19 ? input b test ? test signal input (must be connected to v ss ) 16 ? ? ? note s : 1. pull-up resistors for all i/o ports are automatically disabled if they are configured to output mode. 2. d * type has a schmitt trigger circuit at input.
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