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74f273a octal d flip-flop product specification ic15 data handbook 1996 mar 12 integrated circuits
philips semiconductors product specification 74f273a octal d flipflop 2 1996 mar 12 8530066 16555 features ? high impedance inputs for reduced loading (20 m a in low and high states) ? ideal buffer for mos microprocessor or memory ? eight edgetriggered dtype flipflops ? buffered common clock ? buffered asynchronous master reset ? see 74f377a for clock enable version ? see 74f373 for transparent latch version ? see 74f374 for 3state version description the 74f273 has eight edgetriggered dtype flipflops with individual d inputs and q outputs. the common buffered clock (cp) and master reset (mr ) inputs load and reset (clear) all flipflops simultaneously. the register is fully edgetriggered. the state of each d input, one setup time before the lowtohigh clock transition, is transferred to the corresponding flipflop's q output. all outputs will be forced low independently of clock or data inputs by a low voltage level on the mr input. the device is useful for applications where the true output only is required and the cp and mr are common to all elements. type typical f max typical supply current (total) 74f273a 170mhz 25ma ordering information packages commercial range v cc = 5v 10%; t amb = 0 c to +70 c pkg. dwg. # 20pin plastic dip 74f273an sot146-1 20pin plastic sol 74f273ad sot163-1 input and output loading and fan-out table pins description 74f(u.l.) high/low load value high/low d0 d7 data inputs 1.0/0.033 20 m a/20 m a mr master reset input (activelow) 1.0/0.033 20 m a/20 m a cp clock pulse input (active rising edge) 1.0/0.033 20 m a/20 m a q0 q7 data outputs 50/33 1.0ma/20ma pin configuration 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 mr q0 d0 d1 q1 q2 d2 d3 q3 q4 gnd d4 d5 q5 q6 d6 d7 q7 v cc cp sf00346 logic symbol 3 4 7 8 13 14 18 17 d0 d1 d2 d3 d4 d5 d6 d7 q0 q1 q2 q3 q4 q5 q6 q7 2 5 6 9 12 15 16 19 1 11 mr cp v cc = pin 20 gnd = pin 10 sf00347
philips semiconductors product specification 74f273a octal d flipflop 1996 mar 12 3 logic symbol (ieee/iec) sf00348 1 32 4 5 7 6 8 9 r 11 c1 13 12 14 15 17 16 18 19 1d logic diagram cp q r d d 3 d0 q0 cp q r d d 4 d1 cp q r d d 7 d2 cp q r d d 8 d3 cp q r d d 13 d4 cp q r d d 14 d5 cp q r d d 17 d6 cp q r d d 18 d7 2 q1 5 q2 6 q3 9 q4 12 q5 15 q6 16 q7 19 11 1 cp mr v cc = pin 20 gnd = pin 10 sf00349 function table inputs outputs operating mr cp dn q0 q7 mode l x x l reset (clear) h h h load o1o h l l load o0o h = high voltage level h = high voltage level one setup time prior to the lowtohigh clock transition l = low voltage level l = low voltage level one setup time prior to the lowtohigh clock transition x = don't care = lowtohigh clock transition
philips semiconductors product specification 74f273a octal d flipflop 1996 mar 12 4 absolute maximum ratings (operation beyond the limit set forth in this table may impair the useful life of the device. unless otherwise noted these limi ts are over the operating free air temperature range.) symbol parameter rating unit v cc supply voltage 0.5 to +7.0 v v in input voltage 0.5 to +7.0 v i in input current 30 to +5 ma v out voltage applied to output in high output state 0.5 to v cc v i out current applied to output in low output state 40 ma t amb operating free air temperature range 0 to +70 c t stg storage temperature range 65 to +150 c recommended operating conditions symbol parameter limits unit min typ max v cc supply voltage 4.5 5.0 5.5 v v ih highlevel input voltage 2.0 v v il lowlevel input voltage 0.8 v i ik input clamp current 18 ma i oh highlevel output current 1 ma i ol lowlevel output current 20 ma t amb operating free air temperature range 0 +70 c
philips semiconductors product specification 74f273a octal d flipflop 1996 mar 12 5 dc electrical characteristics (over recommended operating free-air temperature range unless otherwise noted.) symbol parameter test limits unit conditions 1 min typ 2 max mr & cp v cc = min, v il = 0.0v 3 , 10%v cc 2.5 v v oh high-level output voltage inputs v ih = 4.5v 3 , i oh = max 5%v cc 2.7 3.4 v other v cc = min, v il = max, 10%v cc 2.5 v inputs v ih = min, i oh = max 5%v cc 2.7 3.4 v v ol low-level output voltage v cc = min, v il = max, 10%v cc 0.30 0.50 v v ih = min, i oh = max 5%v cc 0.30 0.50 v v ik input clamp voltage v cc = min, i i = i ik 0.73 -1.2 v i i input current at maximum input voltage v cc = 0.0v, v i = 7.0v 100 m a i ih highlevel input current v cc = max, v i = 2.7v 20 m a i il lowlevel input current v cc = max, v i = 0.5v 20 m a i os shortcircuit output current 4 v cc = max -60 -150 ma i cc supply current (total) i cch v cc = max 24 38 ma i ccl 27 43 ma notes: 1. for conditions shown as min or max, use the appropriate value specified under recommended operating conditions for the applic able type. 2. all typical values are at v cc = 5v, t amb = 25 c. 3. to reduce the effect of external noise during test. 4. not more than one output should be shorted at a time. for testing i os , the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. otherwise, prol onged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. in any sequence of parameter tests, i os tests should be performed last. ac characteristics for 'f273a limits symbol parameter waveform t amb = +25 c v cc = +5.0v c l = 50pf r l = 500 w t amb = 0 c to +70 c v cc = +5.0v 10% c l = 50pf r l = 500 w unit min typ max min max f max maximum clock frequency 1 150 170 125 mhz t plh t phl propagation delay cp to qn 1 3.5 5.0 5.0 7.0 8.0 9.5 3.0 4.5 9.0 10.0 ns t phl propagation delay mr to qn 2 5.0 7.0 9.0 5.0 9.5 ns
philips semiconductors product specification 74f273a octal d flipflop 1996 mar 12 6 ac setup requirements for 'f273a limits symbol parameter waveform t amb = +25 c v cc = +5.0v c l = 50pf r l = 500 w t amb = 0 c to +70 c v cc = +5.0v 10% c l = 50pf r l = 500 w unit min typ max min max t s (h) t s (l) setup time, high or low dn to cp 3 3.0 2.0 2.5 2.5 t h (h) t h (l) hold time, high or low dn to cp 3 0.5 0.0 2.5 1.0 ns t w (h) t w (l) clock pulse width high or low 1 4.5 3.5 5.0 4.0 ns t w (l) master reset pulse width, low 2 3.0 3.5 ns t rec recovery time mr to cp 2 4.0 5.0 ns ac waveforms cp v m v m v m t w (h) 1/f max v m v m t plh t w (l) t phl qn sf00294 waveform 1. propagation delay, clock input to output, clock pulse width, and maximum clock frequency v m sf00158 mr qn v m t w (l) t phl v m t rec cp v m waveform 2. master reset pulse width, master reset to output delay and master reset to clock recovery time t h (h) t s (h) cp sf00191 v m v m v m v m v m v m t h (l) t s (l) dn waveform 3. data setup and hold times note: for all waveforms, v m = 1.5v. the shaded areas indicate when the input is permitted to change for predictable output performance.
philips semiconductors product specification 74f273a octal d flipflop 1996 mar 12 7 test circuit and waveforms t w 90% v m 10% 90% v m 10% 90% v m 10% 90% v m 10% negative pulse positive pulse t w amp (v) 0v 0v t thl ( t f ) input pulse requirements rep. rate t w t tlh t thl 1mhz 500ns 2.5ns 2.5ns input pulse definition v cc family 74f d.u.t. pulse generator r l c l r t v in v out test circuit for open collector outputs definitions: r l = load resistor; see ac electrical characteristics for value. c l = load capacitance includes jig and probe capacitance; see ac electrical characteristics for value. r t = termination resistance should be equal to z out of pulse generators. t thl ( t f ) t tlh ( t r ) t tlh ( t r ) amp (v) amplitude 3.0v 1.5v v m r l 7.0v sf00128 test switch t plz closed t pzl closed all other open switch position
philips semiconductors product specification 74f273a octal d flip-flop 1996 mar 12 8 dip20: plastic dual in-line package; 20 leads (300 mil) sot146-1
philips semiconductors product specification 74f273a octal d flip-flop 1996 mar 12 9 so20: plastic small outline package; 20 leads; body width 7.5 mm sot163-1
philips semiconductors product specification 74f273a octal d flip-flop yyyy mmm dd 10 definitions short-form specification e the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition e limiting values given are in accordance with the absolute maximum rating system (iec 134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the dev ice at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limi ting values for extended periods may affect device reliability. application information e applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support e these products are not designed for use in life support appliances, devices or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use i n such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes e philips semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. philips semiconductors ass umes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or m ask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right in fringement, unless otherwise specified. philips semiconductors 811 east arques avenue p.o. box 3409 sunnyvale, california 940883409 telephone 800-234-7381 ? copyright philips electronics north america corporation 1998 all rights reserved. printed in u.s.a. print code date of release: 10-98 document order number: 9397-750-05113
data sheet status objective specification preliminary specification product specification product status development qualification production definition [1] this data sheet contains the design target or goal specifications for product development. specification may change in any manner without notice. this data sheet contains preliminary data, and supplementary data will be published at a later date. philips semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product. this data sheet contains final specifications. philips semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. data sheet status [1] please consult the most recently issued datasheet before initiating or completing a design.

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