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s-8233a series www.sii-ic.com battery protection ic for 3-serial-cell pack ? seiko instruments inc., 1997-2010 rev.6.0 _00 seiko instruments inc. 1 the s-8233a series is a series of lithium-ion rechargea ble battery protection ics incorporating high-accuracy voltage detection circuits and delay circuits. it is suitabl e for a 3-serial-cell lithium-ion rechargeable battery pack. ? features (1) internal high-accuracy voltage detection circuit y overcharge detection voltage 4.10 0.05 v to 4.35 0.05 v 50 mv- step y overcharge release voltage 3.85 0.10 v to 4.35 0.10 v 50 mv- step (the overcharge release voltage can be select ed within the range where a difference from overcharge detection voltage is 0 v to 0.3 v) y overdischarge detection voltage 2.00 0.08 v to 2.70 0.08 v 100 mv- step y overdischarge release voltage 2.00 0.10 v to 3.70 0.10 v 100 mv - step (the overdischarge release voltage can be selected within the range where a difference from overdischarge detection voltage is 0 v to 1.0 v) y overcurrent detection voltage 1 0.15 0.015 v to 0.5 0.05 v 50 mv-step (2) high-withstand voltage device (absolute maximum rating: 26 v) (3) wide operating voltage range: 2 v to 24 v (4) the delay time for every detection can be set via an external capacitor. (5) three overcurrent detection levels (protection for short-circuiting) (6) internal charge/discharge proh ibition circuit via the control pin (7) the function for charging batteries from 0 v is available. (8) low current consumption y operation 50 a max. (+25 c) y power-down 0.1 a max. (+25 c) (9) lead-free, sn 100%, halogen-free *1 *1. refer to ? ? product name structure ? for details. ? applications y lithium-ion rechargeable battery packs y lithium polymer rechargeable battery packs ? package y 16-pin tssop
battery protection ic for 3-serial-cell pack s-8233a series rev.6.0 _00 seiko instruments inc. 2 ? block diagram battery 1 overcharge battery 3 overdischarge battery 3 overcharge battery 2 overcharge battery 2 overdischarge overcharge delay circuit battery 1 overdischarge battery 3 overcharge battery 2 overcharge battery 1 overcharge reference volta g e 3 reference voltage 2 reference voltage 1 control logic overcurrent detection circuit overdischarge delay circuit overcurrent1, delay circuit overcurrent 2,3 delay circuit ? + ? + ? + ? + ? + ? + dop vmp covt cdt cct cop ctl vss cd3 vc2 cd2 cd1 vc1 vcc floating detection circuit figure 1 remark the delay time for overcurrent detection 2 and 3 is fixed by an internal ic circuit. the delay time cannot be changed via an external capacitor.
battery protection ic for 3-serial-cell pack rev.6.0 _00 s-8233a series seiko instruments inc. 3 ? product name structure 1. product name s-8233a x ft ? tb ? x environmental code u : lead-free (sn 100%), halogen-free g : lead-free (for details, please contact our sales office) ic direction in tape specifications *1 package name (abbreviation) ft: 16-pin tssop serial code assigned from a to z in alphabetical order *1. refer to the tape specifications. 2. package drawing code package name package tape reel 16-pin tssop ft016-a-p-sd ft016-a-c-sd ft016-a-r-sd 3. product name list table 1 product name / item overcharge detection voltage v cu overcharge release voltage v cd overdischarge detection voltage v dd overdischarge release voltage v du overcurrent detection voltage1 v iov1 0 v battery charge function s-8233acft-tb-x 4.250.05 v 4.050.10 v 2.000.08 v 2.300.10 v 0.200.02 v ? s-8233adft-tb-x 4.100.05 v 4.10 *1 2.000.08 v 2.300.10 v 0.200.02 v ? s-8233aeft-tb-x 4.250.05 v 4.100.10 v 2.300.08 v 2.700.10 v 0.150.015 v ? s-8233afft-tb-x 4.350.05 v 4.050.10 v 2.400.08 v 2.700.10 v 0.500.05 v available s-8233agft-tb-x 4.250.05 v 4.050.10 v 2.400.08 v 2.700.10 v 0.40.0.04 v available s-8233aift-tb-x 4.250.05 v 4.100.10 v 2.300.08 v 3.000.10 v 0.150.015 v ? s-8233ajft-tb-x 4.350.05 v 4.050.10 v 2.400.08 v 2.700.10 v 0.300.03 v ? s-8233akft-tb-x 4.350.05 v 4.050.10 v 2.400.08 v 2.700.10 v 0.150.015 v ? s-8233alft-tb-x 4.350.05 v 4.050.10 v 2.400.08 v 2.700.10 v 0.400.04 v available s-8233amft-tb-x 4.350.05 v 4.050.10 v 2.400.08 v 2.700.10 v 0.300.03 v available s-8233anft-tb-x 4.350.05 v 4.050.10 v 2.400.08 v 2.400.10 v 0.150.015 v available s-8233aoft-tb-x 4.350.05 v 4.050.10 v 2.400.08 v 2.700.10 v 0.150.015 v available s-8233apft-tb-x 4.250.05 v 4.050.10 v 2.700.08 v 3.000.10 v 0.300.03 v available s-8233arft-tb-x 4.350.05 v 4.050.10 v 2.000.08 v 2.700.10 v 0.300.03 v available s-8233asft-tb-x 4.250.05 v 4.050.10 v 2.400.08 v 2.700.10 v 0.500.05 v available *1. without overcharge detection hysteresis. remark 1. please contact our sales office for the products with the detection voltage value other than those specified above. 2. x: g or u 3. please select products of environmental code = u for sn 100%, halogen-free products.
battery protection ic for 3-serial-cell pack s-8233a series rev.6.0 _00 seiko instruments inc. 4 ? pin configuration table 2 pin no. symbol description 1 dop connects fet gate for discharge control (cmos output) 2 nc no connection *1 3 cop connects fet gate for charge control (nch open-drain output) 4 vmp detects voltage between vcc to vmp(overcurrent detection pin) 5 covt connects capacitor for overcu rrent detection1 delay circuit 6 cdt connects capacitor for overdi scharge detection delay circuit 7 cct connects capacitor for overc harge detection delay circuit 8 vss negative power input, and connects negative voltage for battery 3 9 ctl charge/discharge control signal input 10 cd3 battery 3 conditioning signal output 11 vc2 connects battery 2 negative voltage and battery 3 positive voltage 12 cd2 battery 2 conditioning signal output 13 vc1 connects battery 1 negative voltage and battery 2 positive voltage 14 cd1 battery 1 conditioning signal output 15 nc no connection *1 vss vmp vcc ctl 14 13 12 11 10 9 7 6 5 4 3 2 1 dop cop cct covt cdt vc1 vc2 cd1 cd3 cd2 16-pin tssop top view 8 15 16 nc nc figure 2 16 vcc positive power input and connects battery 1 positive voltage *1. the nc pin is electrically open. the nc pin can be connected to vcc or vss.
battery protection ic for 3-serial-cell pack rev.6.0 _00 s-8233a series seiko instruments inc. 5 ? absolute maximum ratings table 3 (ta = 25 c unless otherwise specified) item symbol applied pin absolute maximum ratings unit input voltage between vcc and vss v ds ? v ss ? 0.3 ~ v ss +26 v input pin voltage v in vc1, vc2, ctl, cct, cdt, covt v ss ? 0.3 ~ v cc +0.3 v vmp input pin voltage v vmp vmp v ss ? 0.3 ~ v ss +26 v cd1 output pin voltage v cd1 cd1 v c1 ? 0.3 ~ v cc +0.3 v cd2 output pin voltage v cd2 cd2 v c2 ? 0.3 ~ v cc +0.3 v cd3 output pin voltage v cd3 cd3 v ss ? 0.3 ~ v cc +0.3 v dop output pin voltage v dop dop v ss ? 0.3 ~ v cc +0.3 v cop output pin voltage v cop cop v ss ? 0.3 ~ v ss +26 v ? 300 (when not mounted on board) mw power dissipation p d ? 1100 *1 mw operating ambient temperature t opr ? ? 20 ~ +70 c storage temperature t stg ? ? 40 ~ +125 c *1. when mounted on board [mounted board] (1) board size : 114.3 mm 76.2 mm t1.6 mm (2) board name : jedec standard51-7 caution the absolute maximum ratings are rated values exceeding which the product could suffe r physical damage. these values must therefore not be exceeded under any conditions. 0 50 100 150 800 400 0 power dissipation (p d ) [mw] ambient temperature (ta) [ c] 1000 600 200 1200 1400 figure 3 power dissipation of package (when mounted on board)
battery protection ic for 3-serial-cell pack s-8233a series rev.6.0 _00 seiko instruments inc. 6 ? electrical characteristics table 4 (1 / 2) (ta = 25 c unless otherwise specified) item symbol condition min. typ. max. unit test condition test circuit detection voltage overcharge detection voltage 1 v cu1 4.10 to 4.35 adjustment v cu1 ? 0.05 v cu1 v cu1 +0.05 v 1 1 overcharge release voltage 1 v cd1 3.85 to 4.35 adjustment v cd1 ? 0.10 v cd1 v cd1 +0.10 v 1 1 overdischarge detection voltage 1 v dd1 2.00 to 2.70 adjustment v dd1 ? 0.08 v dd1 v dd1 +0.08 v 1 1 overdischarge release voltage 1 v du1 2.00 to 3.70 adjustment v du1 ? 0.10 v du1 v du1 +0.10 v 1 1 overcharge detection voltage 2 v cu2 4.10 to 4.35 adjustment v cu2 ? 0.05 v cu2 v cu2 +0.05 v 2 1 overcharge release voltage 2 v cd2 3.85 to 4.35 adjustment v cd2 ? 0.10 v cd2 v cd2 +0.10 v 2 1 overdischarge detection voltage 2 v dd2 2.00 to 2.70 adjustment v dd2 ? 0.08 v dd2 v dd2 +0.08 v 2 1 overdischarge release voltage 2 v du2 2.00 to 3.70 adjustment v du2 ? 0.10 v du2 v du2 +0.10 v 2 1 overcharge detection voltage 3 v cu3 4.10 to 4.35 adjustment v cu3 ? 0.05 v cu3 v cu3 +0.05 v 3 1 overcharge release voltage 3 v cd3 3.85 to 4.35 adjustment v cd3 ? 0.10 v cd3 v cd3 +0.10 v 3 1 overdischarge detection voltage 3 v dd3 2.00 to 2.70 adjustment v dd3 ? 0.08 v dd3 v dd3 +0.08 v 3 1 overdischarge release voltage 3 v du3 2.00 to 3.70 adjustment v du3 ? 0.10 v du3 v du3 +0.10 v 3 1 overcurrent detection voltage 1 *1 v iov1 0.15 to 0.50v adjustment v iov1 x 0.9 v iov1 v iov1 x 1.1 v 4 2 overcurrent detection voltage 2 v iov2 v cc reference 0.54 0.6 0.66 v 4 2 overcurrent detection voltage 3 v iov3 v ss reference 1.0 2.0 3.0 v 4 2 voltage temperature factor 1 *2 t coe1 ta = -20 to 70c *4 ? 1.0 0 1.0 mv/ c ? ? voltage temperature factor 2 *3 t coe2 ta = -20 to 70c *4 ? 0.5 0 0.5 mv/ c ? ? delay time overcharge detection delay time 1 t cu1 c cct = 0.47 f 0.5 1.0 1.5 s 9 6 overcharge detection delay time 2 t cu2 c cct = 0.47 f 0.5 1.0 1.5 s 10 6 overcharge detection delay time 3 t cu3 c cct = 0.47 f 0.5 1.0 1.5 s 11 6 overdischarge detection delay time 1 t dd1 c cdt = 0.1 f 20 40 60 ms 9 6 overdischarge detection delay time 2 t dd2 c cdt = 0.1 f 20 40 60 ms 10 6 overdischarge detection delay time 3 t dd3 c cdt = 0.1 f 20 40 60 ms 11 6 overcurrent detection delay time 1 t iov1 c covt = 0.1 f 10 20 30 ms 12 7 overcurrent detection delay time 2 t iov2 ? 2 4 8 ms 12 7 overcurrent detection delay time 3 t iov3 fet gate capacitor = 2000 pf 100 300 550 s 12 7 operating voltage operating voltage between vcc and vss *5 v dsop ? 2.0 ? 24 v ? ? current consumption current consumption (during normal operation) i ope v1 = v2 = v3 = 3.5 v ? 20 50 a 5 3 current consumption for cell 2 i cell2 v1 = v2 = v3 = 3.5 v ? 300 0 300 na 5 3 current consumption for cell 3 i cell3 v1 = v2 = v3 = 3.5 v ? 300 0 300 na 5 3 current consumption at power down i pdn v1 = v2 = v3 = 1.5 v ? ? 0.1 a 5 3 internal resistance v1 = v2 = v3 = 3.5 v 0.40 0.90 1.40 m 6 3 resistance between vcc and vmp r vcm v1 = v2 = v3 = 3.5 v *6 0.20 0.50 0.80 m 6 3 v1 = v2 = v3 = 1.5 v 0.40 0.90 1.40 m 6 3 resistance between vss and vmp r vsm v1 = v2 = v3 = 1.5 v *6 0.20 0.50 0.80 m 6 3 input voltage ctl"h" input voltage v ctl(h) ? v cc x0.8 ? ? v ? ? ctl"l" input voltage v ctl(l) ? ? ? v cc x0.2 v ? ?
battery protection ic for 3-serial-cell pack rev.6.0 _00 s-8233a series seiko instruments inc. 7 table 4 (2 / 2) (ta = 25 c unless otherwise specified) item symbol condition min. typ. max. unit test condition test circuit output voltage dop"h" voltage v do(h) i out = 10 a v cc -0.5 ? ? v 7 4 dop"l" voltage v do(l) i out = 10 a ? ? v ss +0.1 v 7 4 cop"l" voltage v co(l) i out = 10 a ? ? v ss +0.1 v 8 5 cop off leak current i col v1 = v2 = v3 = 4.5 v ? ? 100 na 14 9 cd1"h" voltage v cd1(h) i out = 0.1 a v cc -0.5 ? ? v 13 8 cd1"l" voltage v cd1(l) i out = 10 a ? ? v c1 +0.1 v 13 8 cd 2"h" voltage v cd2(h) i out = 0.1 a v cc -0.5 ? - v 13 8 cd 2"l" voltage v cd2(l) i out = 10 a ? ? v c2 +0.1 v 13 8 cd3"h" voltage v cd3(h) i out = 0.1 a v cc -0.5 ? ? v 13 8 cd3"l" voltage v cd3(l) i out = 10 a ? ? v ss +0.1 v 13 8 0 v battery charging function 0 v charging start voltage v 0char ? *6 ? ? 1.4 v 15 10 *1. if overcurrent detection voltage 1 is 0.50 v, both overcu rrent detection voltages 1 and 2 are 0.54 to 0.55 v, but v iov2 > v iov1 . *2. voltage temperature factor 1 indicates overcharge detection vo ltage, overcharge release voltage, overdischarge detection volta ge, and overdischarge release voltage. *3. voltage temperature factor 2 indicates overcurrent detection voltage. *4. since products are not screened at high and low temperature, the specification fo r this temperature range is guaranteed by des ign, not tested in production. *5. the dop and cop logic must be es tablished for the operating voltage. *6. this spec applies for only 0 v batte ry charging function available type.
battery protection ic for 3-serial-cell pack s-8233a series rev.6.0 _00 seiko instruments inc. 8 ? test circuits (1) test condition 1 test circuit 1 set v1, v2, and v3 to 3.5 v under normal status. in crease v1 from 3.5 v gradually. the v1 voltage when cop = 'h' is overcharge detection voltage 1 (v cu1 ). decrease v1 gradually. the v1 voltage when cop = 'l' is overcharge release voltage 1 (v cd1 ). further decrease v1. the v1 voltage when dop = 'h' is overdischarge voltage 1 (v dd1 ). increase v1 gradually. the v1 voltage when dop = 'l' is overdischarge release voltage 1 (v du1 ). remark the voltage change rate is 150 v/s or less. (2) test condition 2 test circuit 1 set v1, v2, and v3 to 3.5 v under normal status. in crease v2 from 3.5 v gradually. the v2 voltage when cop = 'h' is overcharge detection voltage 2 (v cu2 ). decrease v2 gradually. the v2 voltage when cop = 'l' is overcharge release voltage 2 (v cd2 ). further decrease v2. the v2 voltage when dop = 'h' is overdischarge voltage 2 (v dd2 ). increase v2 gradually. the v2 voltage when dop = 'l' is overdischarge release voltage 2 (v du2 ). remark the voltage change rate is 150 v/s or less. (3) test condition 3 test circuit 1 set v1, v2, and v3 to 3.5 v under normal status. in crease v3 from 3.5 v gradually. the v3 voltage when cop = 'h' is overcharge detection voltage 3 (v cu3 ). decrease v3 gradually. the v3 voltage when cop = 'l' is overcharge release voltage 3 (v cd3 ). further decrease v3. the v3 voltage when dop = 'h' is overdischarge voltage 3 (v dd3 ). increase v3 gradually. the v3 voltage when dop = 'l' is overdischarge release voltage 3 (v du3 ). remark the voltage change rate is 150 v/s or less. (4) test condition 4 test circuit 2 set v1, v2, v3 to 3.5 v and v4 to 0 v under normal status. increase v4 from 0 v gradually. the v4 voltage when dop = 'h' and cop = 'h', is overcurrent detection voltage 1 (v iov1 ). set v1, v2, and v3 to 3.5 v and v4 to 0 v under normal status. fix the covt pin at v ss , increase v4 from 0 v gradually. the v4 voltage when dop = 'h' and cop = 'h' is overcurrent detection voltage 2 (v iov2 ). set v1, v2, and v3 to 3.5 v and v4 to 0 v under normal status. fix the covt pin at v ss , increase v4 gradually from 0 v at 400 s to 2 ms. the v4 voltage when dop = 'h' and cop = 'h' is overcurrent detection voltage 3 (v iov3 ). (5) test condition 5 test circuit 3 set s1 to on, v1, v2, and v3 to 3.5 v, and v4 to 0 v under normal status and measure current consumption. i1 is the normal status current consumption (i ope ), i2, the cell 2 current consumption (i cell2 ), and i3, the cell 3 current consumption (i cell3 ). set s1 to on, v1, v2, and v3 to 1.5 v, and v4 to 4.5 v under overdischarge status. current consumption i1 is power-down current consumption (i pdn ). (6) test condition 6 test circuit 3 set s1 to on, v1, v2, and v3 to 3.5 v, and v4 to 10.5 v under normal status. v4/i4 is the internal resistance between vcc and vmp (r vcm ). set s1 to on, v1, v2, and v3 to 1.5 v, and v4 to 4.1 v under overdischarge status. (4.5-v4)/i4 is the internal resistance between vss and vmp (r vsm ).
battery protection ic for 3-serial-cell pack rev.6.0 _00 s-8233a series seiko instruments inc. 9 (7) test condition 7 test circuit 4 set s1 to on, s2 to off, v1, v2, and v3 to 3.5 v, and v4 to 0 v under normal status. increase v5 from 0 v gradually. the v5 voltage when i1 = 10 a is dop'l' voltage (v d0(l) ). set s1 to off, s2 to on, v1, v2, v3 to 3.5 v, and v4 to v iov2 +0.1 v under overcurrent status. increase v6 from 0 v gradually. the v6 voltage when i2 = 10 a is the dop'h' voltage (v do(h) ). (8) test condition 8 test circuit 5 set v1, v2, v3 to 3.5 v and v4 to 0 v under normal status. increase v5 from 0 v gradually. the v5 voltage when i1 = 10 a is the cop'l' voltage (v c0(l) ). (9) test condition 9 test circuit 6 set v1, v2, v3 to 3.5 v under normal status. increa se v1 from 3.5 v to 4.5 v immediately (within 10 s). the time after v1 becomes 4.5 v until cop goes 'h ' is the overcharge detection delay time 1 (t cu1 ). set v1, v2, v3 to 3.5 v under normal status. decr ease v1 from 3.5 v to 1.9 v immediately (within 10 s). the time after v1 becomes 1.9 v until dop goes 'h ' is the overdischarge detection delay time 1 (t dd1 ). (10) test condition 10 test circuit 6 set v1, v2, v3 to 3.5 v under normal status. increa se v2 from 3.5 v to 4.5 v immediately (within 10 s). the time after v2 becomes 4.5 v until cop goes 'h ' is the overcharge detection delay time 2 (t cu2 ). set v1, v2, v3 to 3.5 v under normal status. decr ease v2 from 3.5 v to 1.9 v immediately (within 10 s). the time after v2 becomes 1.9 v until dop goes 'h ' is the overdischarge detection delay time 2 (t dd2 ). (11) test condition 11 test circuit 6 set v1, v2, v3 to 3.5 v under normal status. increa se v3 from 3.5 v to 4.5 v immediately (within 10 s). the time after v3 becomes 4.5 v until cop goes 'h ' is the overcharge detection delay time 3 (t cu3 ). set v1, v2, v3 to 3.5 v under normal status. decr ease v3 from 3.5 v to 1.9 v immediately (within 10 s). the time after v3 becomes 1.9 v until dop goes 'h ' is the overdischarge detection delay time 3 (t dd3 ). (12) test condition 12 test circuit 7 set v1, v2, v3 to 3.5 v and s1 to off under normal status. increase v4 from 0 v to 0.55 v immediately (within 10 s). the time after v4 becomes 0.55 v until do p goes 'h' is the overcurrent detection delay time 1 (t i0v1 ). set v1, v2, v3 to 3.5 v and s1 to off under normal status. increase v4 from 0 v to 0.75 v immediately (within 10 s). the time after v4 becomes 0.75 v until do p goes 'h' is the overcurrent detection delay time 2 (t iov2 ) set s1 to on to inhibit overdischarge detection. se t v1, v2, v3 to 4.0 v and increase v4 from 0 v to 6.0 v immediately (within 1 s) and decrease v1, v2, and v3 to 2.0 v at a time. the time after v4 becomes 6.0 v until dop goes 'h' is the over current detection delay time 3 (t iov3 ).
battery protection ic for 3-serial-cell pack s-8233a series rev.6.0 _00 seiko instruments inc. 10 (13) test condition 13 test circuit 8 set s4 to on, s1, s2, s3, s5, and s6 to off, v1 , v2, v3 to 3.5 v and v4, v6, and v7 to 0 v under normal status. increase v5 from 0 v gradually. the v5 voltage when i2 = 10 a is the cd1'l' voltage (v cd1(l) ) set s5 to on, s1, s2, s3, s4, and s6 to off, v1 , v2, and v3 to 3.5 v and v4, v5, and v7 to 0 v under normal status. increase v6 from 0 v gradually. the v6 voltage when i3 = 10 a is the cd2'l' voltage (v cd2(l) ). set s6 to on, s1, s2, s3, s4, and s5 to off, v1 , v2, and v3 to 3.5 v and v4, v5, and v6 to 0 v under normal status. increase v7 from 0 v gradually. the v7 voltage when i4 = 10 a is the cd3'l' voltage (v cd3(l) ). set s1 to on, s2, s3, s4, s5, and s6 to off, v1 to 4.5 v, v2 and v3 to 3.5 v and v5, v6, and v7 to 0 v under overcharge status. increase v4 from 0 v gradually. the v4 voltage when i1 = 0.1 a is the cd1'h' voltage (v cd1(h) ). set s2 to on, s1, s3, s4, s5, and s6 to off, v2 to 4.5 v, v1 and v3 to 3.5 v and v5, v6, and v7 to 0 v under overcharge status. increase v4 from 0 v gradually. the v4 voltage when i1 = 0.1 a is the cd2'h' voltage (v cd2(h) ). set s3 to on, s1, s2, s4, s5, and s6 to off, v3 to 4.5 v, v1 and v2 to 3.5 v and v5, v6, and v7 to 0 v under overcharge status. increase v4 from 0 v gradually. the v4 voltage when i1 = 0.1 a is the cd3'h' voltage (v cd3(h) ). (14) test condition 14 test circuit 9 set v1, v2, and v3 to 4.5 v under overcharge status. the current i1 flowing to cop pin is cop off leak current (i col ). (15) test condition 15 test circuit 10 set v1, v2, and v3 to 0 v, and v8 to 2 v, and decrease v8 gradually. the v8 voltage when cop = 'h' (v ss + 0.1 v or higher) is the 0v charge start voltage (v 0char ).
battery protection ic for 3-serial-cell pack rev.6.0 _00 s-8233a series seiko instruments inc. 11 vss dop ctl vc2 cop vmp vc1 cct covt cdt vcc cd3 cd2 cd1 v3 v2 v1 1 m s-8233a vss dop ctl vc2 cop vmp vc1 cct covt cdt vcc cd3 cd2 cd1 v3 v2 v1 v4 1 m s-8233a test circuit 1 test circuit 2 vss dop ctl vc2 cop vmp vc1 cct covt cdt vcc cd3 cd2 cd1 v3 v2 i2 i3 s1 i1 i4 v1 v4 s-8233a vss dop ctl vc2 cop vmp vc1 cct covt cdt vcc cd3 cd2 cd1 v3 v2 v1 v5 s1 i1 s2 i2 v6 v4 s-8233a test circuit 3 test circuit 4 vss dop ctl vc2 cop vmp vc1 cct covt cdt vcc cd3 cd2 cd1 v3 v2 v5 i1 v1 v4 s-8233a vss dop ctl vc2 cop vmp vc1 cct covt cdt vcc cd3 cd2 v1 v3 v2 cd1 c3 c2 c1 1 m c1 = 0.47 f c2 = 0.1 f c3 = 0.1 f s-8233a test circuit 5 test circuit 6 figure 4 (1 / 2)
battery protection ic for 3-serial-cell pack s-8233a series rev.6.0 _00 seiko instruments inc. 12 vss dop ctl vc2 cop vmp vc1 cct covt cdt vcc cd3 cd2 v1 v3 v2 cd1 c3 c2 s1 c1 c1 = 0.47 f c2 = 0.1 f c3 = 0.1 f v4 1 m s-8233a vss dop ctl vc2 cop vmp vc1 cct covt cdt vcc cd3 cd2 cd1 v3 v2 1 m v1 v5 v7 v6 v4 s1 s5 s6 s2 s4 s3 i1 i2 i3 i4 s-8233a test circuit 7 test circuit 8 vss dop ctl vc2 cop vmp vc1 cct covt cdt vcc cd3 cd2 v1 v3 v2 cd1 i1 s-8233a vss dop ctl vc2 cop vmp vc1 cct covt cdt vcc cd3 cd2 v1 v3 v2 cd1 1 m v8 s-8233a test circuit 9 test circuit 10 figure 4 (2 / 2)
battery protection ic for 3-serial-cell pack rev.6.0 _00 s-8233a series seiko instruments inc. 13 ? operation remark refer to ? ? battery protection ic connection example ?. normal status this ic monitors the voltages of the three serially -connected batteries and the discharge current to control charging and discharging. if the voltages of all the th ree batteries are in the range from the overdischarge detection voltage (v dd ) to the overcharge detection voltage (v cu ), and the current flowing through the batteries becomes equal or lower than a specified value (the vmp pin voltage is equal or lower than overcurrent detection voltage 1), the charging and discharging fets turn on. in this status, charging and discharging can be carried out freely. this status is called the normal status. in this status, the vmp and vcc pins are shorted by the r vcm resistor. overcurrent status this ic is provided with the three overcurrent detection levels (v iov1 ,v iov2 and v iov3 ) and the three overcurrent detection delay time (t iov1 ,t iov2 and t iov3 ) corresponding to each overcurrent detection level. if the discharging current becomes equ al to or higher than a specified value (the vmp pin voltage is equal to or higher than the overcurrent detection voltag e) during discharging under normal status and it continues for the overcurrent detection delay time (t iov ) or longer, the discharging fet turns off to stop discharging. this status is called an overcurrent status. the vmp and vcc pins are shorted by the r vcm resistor at this time. the charging fet turns off. when the discharging fet is off and a load is connected, the vmp pin voltage equals the v ss potential. the overcurrent status returns to the normal status when the load is released and the impedance between the eb- and eb+ pins (see figure 9 ) is 100 m : or higher. when the load is released, the vmp pin, which and the vcc pin are shorted with the r vcm resistor, goes back to the v cc potential. the ic detects that the vmp pin potential retu rns to overcurrent detection voltage 1 (v iov1 ) or lower (or the overcurrent detection voltage 2 (v iov2 ) or lower if the covt pin is fixed at the 'l' level and overcurrent detection 1 is inhibited) and returns to the normal status. overcharge status if one of the battery voltages becomes highe r than the overcharge detection voltage (v cu ) during charging under normal status and it continues fo r the overcharge detection delay time (t cu ) or longer, the charging fet turns off to stop charging. this status is calle d the overcharge status. the 'h' level signal is output to the conditioning pin corresponding to the battery which exceeds the overcharge detection voltage until the battery becomes equal to lower than the overcharge release voltage (v cd ). the battery can be discharged by connecting an nch fet externally. the discharging current can be limited by inserting r11, r12 and r13 resistors (see figure 9 ). the vmp and vcc pins are shorted by the r vcm resistor under the overcharge status. the overcharge status is released in two cases: <1> the battery voltage which exceede d the overcharge detection voltage (v cu ) falls below the overcharge release voltage (v cd ), the charging fet turns on an d the normal status returns. <2> if the battery voltage which exceeded the overcharge detection voltage (v cu ) is equal or higher than the overcharge release voltage (v cd ), but the charger is removed, a load is placed, and discharging starts, the charging fet turns on and the normal status returns. the release mechanism is as follows: the discharge current flows through an internal parasitic diode of the charging fet immediately after a load is installed and discharging starts, and the vmp pin voltage decreases by about 0.6 v from the vcc pin volt age momentarily. the ic detects this voltage (overcurrent detection voltage 1 or higher), releas es the overcharge status and returns to the normal status.
battery protection ic for 3-serial-cell pack s-8233a series rev.6.0 _00 seiko instruments inc. 14 overdischarge status if any one of the battery voltages falls belo w the overdischarge detection voltage (v dd ) during discharging under normal status and it continues for the overdischarge detection delay time (t dd ) or longer, the discharging fet turns off and discharging stops. this status is called the overdischarge status. when the discharging fet turns off, the vmp pin volt age becomes equal to the vss voltage and the ic's current consumption falls below the power-down current consumption (i pdn ). this status is called the power-down status. the vmp and vss pins are shorted by the r vsm resistor under the overdischarge and power-down statuses. the power-down status is canceled when the charger is connected and the voltage between vmp and vss is 3.0 v or higher (overcurrent detection voltage 3). when all the battery voltages becomes equal to or higher than the overdischarge release voltage (v du ) in this status, the over discharge status changes to the normal status. delay circuits the overcharge detection delay time (t cu1 to t cu3 ), overdischarge detection delay time (t dd1 to t dd3 ), and overcurrent detection delay time 1 (t iov1 ) are changed with external capacitors (c4 to c6). the delay times are calculated by the following equations: min. typ. max. t cu [s] = delay factor ( 1.07, 2.13, 3.19) c4 [ f] t dd [s] = delay factor ( 0.20, 0.40, 0.60) c5 [ f] t iov1 [s] = delay factor ( 0.10, 0.20, 0.30) c6 [ f] caution the delay time for overcurrent detection 2 and 3 is fixed by an internal ic circuit. the delay time cannot be changed via an external capacitor. ctl pin if the ctl pin is floated under normal status, it is pulled up to the v cc potential in the ic, and both the charging and discharging fets turn off to inhi bit charging and discharging. both charging and discharging are also inhibited by applying the vcc pin to the ctl pin externally. at this time, the vmp and vcc pins are shorted by the r vcm resistor. when the ctl pin becomes equal to v ss potential, charging and discharging are enabled and go back to their appropriate statuses for the battery voltages. caution please note unexpected behavior might occur when electrical potential difference between the ctl pin ('l' level) and vss is generated through the external filter (r vss and c vss ) as a result of input voltage fluctuations. 0 v battery charging function this function is used to recharge the three serially-c onnected batteries after they self-discharge to 0 v. when the 0 v charging start voltage (v 0char ) or higher is applied to between vmp and vss by connecting the charger, the charging fet gate is fixed to v ss potential. when the voltage between the gate sources of the charging fet becomes equal to or higher than the turn-on voltage by the charger voltage, the charging fe t turns on to start charging. at this time, the discharging fet turns off and the charging current flows through the internal parasitic diode in the discharging fet. if all the battery voltages beco me equal to or higher than the overdischarge release voltage (v du ), the normal status returns. caution in the products without 0 v battery charging function, the resistance between vcc and vmp and between vss and vmp are lower than the products with 0 v battery charging function. it causes to that overcharge detection voltage increases by the drop voltage of r5 (see figure 10) with sink current at vmp. the cop output is undefined below 2.0 v on vcc-vss voltage in the products without 0 v battery charging function.
battery protection ic for 3-serial-cell pack rev.6.0 _00 s-8233a series seiko instruments inc. 15 voltage temperature factor voltage temperature factor 1 indicates overchar ge detection voltage, overcharge release voltage, overdischarge detection voltage, and overdischarge release voltage. voltage temperature factor 2 indicate s overcurrent detection voltage. the voltage temperature factors 1 and 2 ar e expressed by the oblique line parts in figure 5. v cu25 ex. voltage temperature factor of overcharge detection voltage typ. ? 20 25 + 1 mv/ c v cu [v] v cu25 is the overcharge detection voltage at 25 c 70 ta [ c] ? 1 mv/ c figure 5
battery protection ic for 3-serial-cell pack s-8233a series rev.6.0 _00 seiko instruments inc. 16 ? timing chart 1. overcharge detection v cu v cd v du v dd v cc v ss v ss v cha v cc v iov1 v ss <1> <2> <1> <2> <1> <1> <5> <3> <2>&<3> <3> high-z high-z high-z high-z *1. <1>normal status, <2>overcharge status, <3>overdischarge status, <4>overcurrent status, <5>power-down status remark the charger is assumed to charge with a constant current. v cha indicates the open voltage of the charger. battery voltage dop pin cop pin vmp pin charger connected load connected status *1 delay delay delay delay delay v1 battery v2 battery v3 battery figure 6 2. overdischarge detection v cu v cd v du v dd battery voltage dop pin v cc v ss v ss v cha v cc v iov1 v ss cop pin vmp pin charger connected delay delay load connected status *1 <1> <5> <3> <1> <5> <3> <1> <5> <3> <1> <2> <1> <5> <3> <1> high-z *1. <1>normal status, <2>overcharge stat us, <3>overdischarge status, <4>overcu rrent status, <5>power-down status remark the charger is assumed to charge with a constant current. v cha indicates the open voltage of the charger. delay delay delay v1 battery v2 battery v3 battery figure 7
battery protection ic for 3-serial-cell pack rev.6.0 _00 s-8233a series seiko instruments inc. 17 3. overcurrent detection high-z v cu v cd v du v dd battery voltage dop pin v cc v ss v ss cop pin vmp pin charger connected delay t iov1 delay t iov2 load connected status * <1> <4> <1> <4> <1> <4> <1> <1> ctl pin v ss ? v cc v cc v iov1 v iov2 v iov3 delay t iov3 inhibit charging and discharging high-z high-z high-z ctl pin v cc ? v ss *1. <1>normal status, <2>overcharge status , <3>overdischarge status, <4>overcurrent status remark the charger is assumed to charge with a constant current. v cha indicates the open voltage of the charger. v1, v2, and v3 batteries figure 8
battery protection ic for 3-serial-cell pack s-8233a series rev.6.0 _00 seiko instruments inc. 18 ? battery protection ic connection example eb- r1 battery 1 battery 3 battery 2 r2 c1 c2 c3 r11 r13 r12 fet-a fet1 fet3 fet2 r3 high: inhibit over discharge detection. vss dop vc2 vc1 vcc cd1 cd3 cd2 eb+ s-8233a series ctl cop vmp c4 c5 c6 cct covt cdt overcharge delay time setting overcurrent delay time setting overdischarge delay time setting nch open drain gnd: normal operation floating: inhibit charging and discharging. r7 r6 10 k r5 1 k 1 m fet-c fet-b figure 9 [description of figure 9] y r11, r12, and r13 are used to adjust the battery conditioning current.the conditioning current during overcharge detection is given by vcu (overc harge detection voltage)/r (r: resistance).to disable the conditioning functi on, open cd1, cd2, and cd3. y the overcharge detection delay time (t cu1 to t cu3 ), overdischarge detection delay time (t dd1 to t dd3 ), and overcurrent detection delay time (t iov1 ) are changed with external capacitors (c4 to c6). see the electrical characteristics. y r6 is a pull-up resistor that turns fet-b off when the cop pin is opened. connect a 100 k to 1 m resistor. y r5 is used to protect the ic if the char ger is connected in reverse. connect a 10 k to 50 k resistor. y if capacitor c6 is absent, rush current occurs w hen a capacitive load is connected and the ic enters the overcurrent mode. c6 must be connected to prevent it. y if capacitor c5 is not connecte d, the ic may enter the overdischar ge status due to variations of battery voltage when the overcurrent occurs. in th is case, a charger must be connected to return to the normal status. to prev ent this, connect an at least 0.01 f capacitor to c5. y if a leak current flows betw een the delay capacitor connection pin (cct, cdt, or covt) and vss, the delay time increases and an error occurs. the leak current must be 100 na or less. y overdischarge detection can be disabled by us ing fet-c. the fet-c off leak must be 0.1 a or less. if overdischarge is inhibited by using this fet, the current consumption does not fall below 0.1 a even when the battery voltage drops and the ic enters the overdischarge detection mode. y r1, r2, and r3 must be 1 k or less. y r7 is the protection of the ctl when the ctl pin voltage higher than v cc voltage. connect a 300 to 5 k resister. if the ctl pin voltage never greater than the v cc voltage (ex. r7 connect to v ss ), without r7 resistance is allowed .
battery protection ic for 3-serial-cell pack rev.6.0 _00 s-8233a series seiko instruments inc. 19 caution 1. the above constants may be changed without notice. 2. if any electrostatic discharge of 2000 v or higher is not applied to the s-8233a series with a human body model, r1, r2, r3, c1, c2, and c3 are unnecessary. 3. it has not been confirmed whether the operation is normal or not in circuits other than the above example of connection. in addition, the example of connection shown above and the constant do not guarantee proper operation. perform through evaluation using the actual application to set the constant. ? precautions y if a charger is connected in the overdischarge status and one of the battery voltages becomes equal to or higher than the overcharge release voltage (v cu ) before the battery voltage which is below the overdischarge detection voltage (v dd ) becomes equal to or higher than the overdischarge release voltage (v du ), the overdischarge and overcharge statuses are entered and the c harging and discharging fets turn off. both charging and discharg ing are disabled. if the battery voltage which was higher than the overcharge detection voltage (v cu ) falls to the overcharge release voltage (v cd ) due to internal discharging, the charging fet turns on. if the charger is detached in the overcharge and over discharge status, the overch arge status is released, but the overdischarge st atus remains. if the charger is connect ed again, the battery status is monitored after that. the charging fet turns off after the overcharge detection delay time, the overcharge and overdischarge statuses are entered. y if any one of the battery voltages is equal to or lower than the overdischarge release voltage (v du ) when they are connected for the first time, the normal stat us may not be entered. if the vmp pin voltage is made equal to or higher than the vcc voltage (if a charger is connected), the normal status is entered. y if the ctl pin floats in power-down mode, it is not pulled up in the ic, charging and discharging may not be inhibited. however, the overdischa rge status becomes effective. if t he charger is connected, the ctl pin is pulled up, and charging and discharging are inhibited immediately. y do not apply an electrostatic discharge to this ic that exceeds the performance ratings of the built-in electrostatic protection circuit. y sii claims no responsibility for any disputes arising out of or in connection with any infringement by products including this ic of patents owned by a third party.
battery protection ic for 3-serial-cell pack s-8233a series rev.6.0 _00 seiko instruments inc. 20 ? characteristics (typical data) 1. detection voltage temperature characteristics 4.15 4.25 4.35 -40 -20 0 20 40 60 80 100 ta [c] v cu [v] overcharge detection voltage vs. temperature v cu = 4.25 v 4.00 4.10 4.20 -40 -20 0 20 40 60 80 100 v cd = 4.10 v ta [c] v cd [v] overcharge release voltage vs. temperature 2.25 2.35 2.45 -40 -20 0 20 40 60 80 100 v dd = 2.35 v ta [c] v dd [v] overdischarge detection voltage vs. temperature 2.75 2.85 2.95 -40 -20 0 20 40 60 80 100 v du = 2.85 v ta [c] v du [v] overdischarge release voltage vs. temperature 0.25 0.30 0.35 -40 -20 0 20 40 60 80 100 v iov1 = 0.3 v ta [c] v iov1 [v] overcurrent1 detection voltage vs. temperature 0.55 0.60 0.65 -40 -20 0 20 40 60 80 100 v iov2 = 0.6 v ta [c] v iov2 [v] overcurrent2 detection voltage vs. temperature
battery protection ic for 3-serial-cell pack rev.6.0 _00 s-8233a series seiko instruments inc. 21 2. current consumption temperature characteristics 0 25 50 -40 -20 0 20 40 60 80 100 v cc = 10.5 v ta [c] i ope [ a] current consumption vs. temperature in normal mode 0.0 0.5 1.0 -40 -20 0 20 40 60 80 100 v cc = 4.5 v ta [c] i pdn [na] current consumption vs. temperature in power-down mode 3. delay time temperature characteristics t cu [s] overcharge detection time vs. temperature 0.5 1.0 1.5 -40 -20 0 20 40 60 80 100 c = 0.47 f v cc = 11.5 v ta [c] 20 40 60 -40 -20 0 20 40 60 80 100 c = 0.1 f v cc = 8.5 v ta [c] t dd [ms] overdischarge detection time vs. temperature 10 20 30 -40 -20 0 20 40 60 80 100 c = 0.1 f v cc = 10.5 v ta [c] t iov1 [ms] overcurrent1 detection time vs. temperature overcurrent2 detection time vs. temperature 2 5 8 -40 -20 0 20 40 60 80 100 ta [c] t iov2 [ms] v cc = 10.5 v
battery protection ic for 3-serial-cell pack s-8233a series rev.6.0 _00 seiko instruments inc. 22 0.10 0.25 0.40 -40 -20 0 20 40 60 80 100 ta [c] t iov3 [ms] overcurrent3 (load short) detection time vs. temperature v cc = 6.0 v 4. delay time vs. power supply voltage 0 0.5 1.0 3 6 9 12 15 v cc [v] t iov3 [ms] ta = 25c overcurrent 3 (load short) detection time vs. power supply voltage caution please design all applications of the s-8233a series with safety in mind.

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www.sii-ic.com ? the information described herein is subject to change without notice. ? seiko instruments inc. is not responsible for any pr oblems caused by circuits or diagrams described herein whose related industrial properties, patents, or ot her rights belong to third parties. the application circuit examples explain typical applications of the products, and do not guarant ee the success of any specific mass-production design. ? when the products described herein are regulated produ cts subject to the wassenaar arrangement or other agreements, they may not be exported without authoriz ation from the appropriate governmental authority. ? use of the information described he rein for other purposes and/or repr oduction or copying without the express permission of seiko instrum ents inc. is strictly prohibited. ? the products described herein cannot be used as par t of any device or equipment affecting the human body, such as exercise equipment, medical equipment, security systems, gas equipment, or any apparatus installed in airplanes and other vehicles, without prior written permission of seiko instruments inc. ? although seiko instruments inc. exerts the greatest possible effort to ensure high quality and reliability, the failure or malfunction of semiconductor products may oc cur. the user of these products should therefore give thorough consideration to safety design, including redundancy, fire-prevention measures, and malfunction prevention, to prevent any accidents, fires, or community damage that may ensue.

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