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tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 copyright ? 1993, texas instruments incorporated 1 post office box 655303 ? dallas, texas 75265 ? 12-bit adc with 4 multiplexed inputs ? wide supply voltage range 2.6 v to 5.5 v ? low power consumption at v dd = 3 v 0.1 m a in off mode (typ) 4 m a in done mode (typ) 80 m a in active mode without a/d conversions (typ) 300 m a in active mode with a/d conversions (typ) ? on-board 4-multiplex 56-segment lcd driver ? easy analog interface from 0.2 sv dd to 0.4 sv dd analog input range ? on-board ratiometric current source programmable from 0.15 ma (sv dd /v) to 2.4 ma (sv dd /v) ? two independent 32.768-khz crystal controlled timers ? internal mos oscillator serves as system clock ? programmable microcontroller ? 960 bits of static ram with 12 internal data storage registers ? simple and easy programming with smpl ? macro language ? 4k bytes of rom preprogrammed with smpl ? macro language interpreter memory bank switching description the tss400-s2 sensor signal processor is an ultra-low power, intelligent, 12-bit analog-to-digital converter ( adc) that has been preprogrammed with the sensor macro programming language ( smpl ? ) interpreter. this language allows fast, easy, and economical customization of the tss400-s2 to a wide range of sensor signal processing applications. some of the typical applications include: ? temperature measurements with calculating, controlling, and warning features ? pressure and acceleration measurements ? timers with control functions ? intelligent keyboard and display drivers the application-specific programs that customize the operation of the tss400-s2 are stored in external eeproms along with additional data required by the application. the main components of the tss400-s2 are a four-input multiplexed 12-bit adc, a programmable constant-current source, an lcd driver capable of driving 56 segments using a four-multiplex drive scheme, two crystal-controlled independent timers, an on-board ram, six output-only terminals ( r1 to r6 ), a 4-bit programmable i / o port ( k1, k2, k4, k8 ), and i 2 c serial eeprom communications. using the tss400-s2 is very easy because it is controlled by a smpl language program. these programs can be stored in an external eeprom (stand-alone mode) or stored in a host computer ( slave mode ). the smpl language is a powerful, easy-to-learn, and easy-to-use macro language. some smpl language features include single-command eeprom read and eeprom write operations, three levels of subroutines, a single-command a / d conversion instruction that specifies the numbers of conversions and the types of conversions (either compensated or noncompensated), and two reduced power consumption modes ( done and off ). available options t a package t a 44-pin plcc (fn) 0 c to 70 c TSS400CFN-S2 40 c to 105 c tss400qfn-s2 smpl is a trademark of texas instruments incorporated. production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters. production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters.
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 2 post office box 655303 ? dallas, texas 75265 s4 s5 s6 s7 s8 s9 s10 s11 s12 s13 s14 39 38 37 36 35 34 33 32 31 30 29 18 19 7 8 9 10 11 12 13 14 15 16 17 ri a4 k2 a3 a2 k4 a1 k8 agnd toscout toscin 20 21 22 23 fn package (top view) com3 s1 s2 s3 54321 644 sv k1 v initn kc v com4 r6 r7 com2 com1 r0 r1 i/o r2 r3 r4 r5 42 41 40 43 24 25 26 27 28 dd ss dd terminal functions pin i/o description name number i/o description a1, a2, a3, a4 13, 11, 10, 8 i analog inputs for the adc agnd 15 analog ground com1, com2, com3, com4 28, 27, 43, 44 o lcd commons i/o 20 i/o communication input / output initn 3 i initialization. initn is normally tied to v dd and held high. if initn is held low for more than 10 m s, the tss400-s2 begins a warm start. k1, k2, k4, k8 5, 9, 12, 14 i/o 4-bit programmable parallel input / output port kc 2 test. this terminal must be tied to v ss during normal operation. r0 2 18 o controls the eeprom clock r1, r2, r3, r4, r5, r6 19, 21 25 o digital outputs r7 2 26 o controls eeprom power switch ri 7 current source (programming resistor connection) s1 s14 42 29 o lcd segments sv dd 6 switchable v dd toscin 17 i oscillator input. toscin is the input connection for the crystal oscillator ( 32.768 khz ). toscout 16 o oscillator output. toscout is the output connection for the crystal oscillator ( 32.768 khz ). v dd 4 power supply v ss 1 ground 2 not directly accessible by the user's program
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 3 post office box 655303 ? dallas, texas 75265 functional block diagram counters flac regb sto0 sto1 sto2 sto3 sto4 sto5 flag registers status bits data memory (ram) working registers storage registers alu pc rom interpreter r output latch k-port latch/buffer system control oscillator clock timers sensor supply analog -to- digital converter lcd driver output pla external eeprom/ host- processor interface r1 r2 r3 r4 r5 r6 k1 k2 k4 k8 initn kc sv dd ri a1 a2 a3 a4 agnd s1 s2 s13 s14 com1 com2 com3 com4 . . . r0 r7 i/o toscin toscout timer buffers system bus system bus v dd v ss
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 4 post office box 655303 ? dallas, texas 75265 description (continued) the tss400-s2 is designed to meet a wide variety of sensor systems applications including those that require short time-to-market and rapid and / or frequent programming updates. the tss400-s2 does not require mask programming. it can be purchased in any quantity. typical applications include: ? measurements of temperature, pressure, acceleration, gas content, magnetic field, relative humidity, speed, direction, and volume ? measurements requiring calculation, control, and / or warning functions ? measurements where temperature compensation is required for accuracy ? measurements where software calibration and linearization is desirable these sensor systems can be found in many types of applications including home appliances, industrial control subsystems, hvac systems and instrumentation, portable instrumentation, consumer products, automotive products, or where precise ( 12-bit ), ultra-low power ( 12 m a 15 m a typ ), intelligent a / d conversion is essential. the tss400-s2 is available in two temperature ranges. the TSS400CFN-S2 is characterized for operation from 0 c to 70 c. the tss400qfn-s2 is characterized for operation from 40 c to 105 c. initialization and power up initialization is started by hardware in two ways: ? power up: the voltage v dd is switched on ( cold start ). the cpu starts to work at pc 000 after the internal oscillator has started operation. this may take from 1 to 6 seconds. ? initn: initn is held low (switched to ground) for more than 10 m s. when this occurs during program execution, it is called a warm start . the cpu starts operation at pc 000 when initn is released to v dd potential. table 1 lists the tss400-s2 register contents after a power up or an initn-terminal initialization. table 1. register contents register power up ( cold start ) initn terminal ( warm start ) program counter ( pc ) 000 000 status bits pos, neg, and zero undefined unchanged ram contents 2 reset to 0 unchanged digit latches ( dln ) reset to 0 reset to 0 k lines' latch contents undefined unchanged timers 0 unchanged adc voltage sv dd switched off switched off lcd segment latches undefined unchanged subroutine stack level 0 level 0 2 despite the ram remaining unchanged during a warm start, the memory addressed when initn is activated may be destroyed by a write cycle.
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 5 post office box 655303 ? dallas, texas 75265 initialization and power up (continued) if the tss400-s2 system is battery powered and contains calibration factors or other important data in ram, it is advisable to distinguish between cold start and warm start. the reason is the possibility of initializations caused by electromagnetic inductance ( emi). if such an erroneous initialization is not tested for legality, emi influence could destroy the ram contents by clearing the ram with the initialization software routine. the tss400-s2 compares two reserved ram nibbles to see if they contain a5 16 after each initialization: ? if the ram nibbles contain the expected information ( a5 16 ), initialization continues at pc 000. the ram contents are not changed. this means that a spurious signal caused the initialization ( warm start ). ? if the ram nibbles differ from a5 16 , the ram is cleared and the program continues at pc 000. this means that the tss400-s2 supply voltage was switched on ( cold start ). the short timer and the long timer are not stopped by a warm start. this means that they remain active and must be stopped by a stptimx instruction, if necessary. operating conditions the tss400-s2 has four different modes of operation: off, done, active without a / d conversion, and active with a/ d conversion. the off mode conserves the most power. in this mode, only the ram and the outputs ( i / o, r outputs, and k lines ) are maintained. the tss400-s2 enters off mode with a software command and is awakened via the k lines or by initialization. table 2 lists the conditions needed for the k lines to awaken the processor. table 2. k-line wake-up conditions k8 k4 k2 k1 condition 0 .and. 0 .and. 0 .and. 0 condition before wake up 1 .or. 1 .or. 1 .or. 1 condition to wake up processor 1 .and. 0 .and. 0 .and. 0 condition before wake up 0 .or. 1 .or. 1 .or. 1 condition to wake up processor the done mode is also a low-power mode. in the done mode, the ram, the outputs, and the display are maintained and the timekeeping circuits remain active. the device enters done mode with a software command and is awakened via the k lines, initialization, or with a wake up by internal timers. when the tss400-s2 is executing instructions, it is in the active mode. this mode can be broken into two separate states: with a / d conversion and without a / d conversion. all portions of the tss400-s2 are fully operational in the active mode with a / d conversion. the a / d-conversion circuitry is powered down only in the active mode without a / d conversion. see figure 1 for a state diagram of the tss400-s2 operational modes.
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 6 post office box 655303 ? dallas, texas 75265 done mode timer active, outputs/ram/ lcd stable, 4- m a power consumption typical active mode with adc active, 300- m a power consumption typical active mode without adc active, 80- m a power consumption typical off mode outputs/ram stable, 0.1- m a power consumption typical power up or initn command: done initn or external hardware wake up, timer interrupt command: off initn or external hardware wake up figure 1. state diagram for tss400-s2 operational modes analog-to-digital converter (adc) (see figure 2) the tss400-s2 offers a 12-bit ratiometric successive-approximation adc. sensors are interfaced to this converter via the four multiplexed analog inputs ( a1 a4). the analog conversion operation is executed with the measr instruction. the smpl interpreter automatically switches the internal digit latches dl9, dl10, and dl11 such that the adc is connected to the analog input line specified by the measr operand. table 3 lists the instructions required to access all four analog inputs. table 3. instructions required to access analog inputs instruction operand dl9 dl10 dl11 action measr 0 0 1 0 connect a1 to the adc measr 1 0 0 0 connect a2 to the adc measr 2 0 1 1 connect a3 to the adc measr 3 0 0 1 connect a4 to the adc chkbatt x 1 x x check current supply voltage against value in flac adjbatt x 1 x x set minimum supply voltage point
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 7 post office box 655303 ? dallas, texas 75265 analog-to-digital converter (adc) (continued) the interpreter automatically switches on the switched-sensor supply voltage ( sv dd ) just prior to making the a/ d conversion and switches it off immediately after the conversion is complete. the measr instruction is followed by a byte instruction. the operand of the byte instruction specifies the number of conversions to be made and whether the conversions are to be compensated or noncompensated. a noncompensated measurement is a single a / d conversion. a compensated measurement is defined as a measurement wherein two conversions are made, one conversion with the adc comparator connected normally and the other conversion with the comparator inputs reversed. the two results are added together so comparator offsets cancel. the interpreter automatically takes care of all required switching to perform the specified type of conversion. absolute measurements are possible if sv dd is held constant. this requires a stable v dd during the conversion and constant loading of sv dd . the adc measures the ratio of the input voltage at the analog input ( v dd ) to the switched-sensor supply voltage ( sv dd ) and not absolute voltages. this ensures that the measurement of the sensors is independent of the supply voltage. analog multiplexer digital-to-analog converter v ref 12 agnd agnd reset sv dd set sv dd clear dl13 dl11 dl10 dl9 ri sv dd a1 a2 a3 a4 tss400 v dd + sv dd sv dd 1 2 en s r clr en g1 mux 1 1 sr flac register ram see note a see note a see note a note a: these signals are automatically controlled by the interpreter during a / d conversion. figure 2. adc functional block diagram
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 8 post office box 655303 ? dallas, texas 75265 measurement range and conversion formulas the analog input range is the same for all four analog outputs, a1 to a4. the nominal properties of the adc range and the equations associated with them are listed below: v i (a b n) sv dd where: v i = unknown analog input voltage a = converter count for v i = 0 = 0.231271438 for the tss400-s2 b = delta in m v/sv dd for a 1-bit difference in conversion result = 0.000043048228 for the tss400-s2 n = a / d conversion result for a single measurement sv dd = switched-sensor supply voltage for the tss400-s2, the analog input voltage is: v i (0.231271438 0.000043048228 n) sv dd for multiple measurements, the v i equation becomes: 0.231271438 sv dd ( 0.000043048228 n) sv dd m v i a b n m sv dd where: m = the number of measurements taken since a conversion result of 0 is used to indicate an underrange input and fff 16 is used to indicate an overrange input, the usable range for n ( in a single measurement ) is: 1 16 n ffe 16 or in decimal format: 1 n 4094 the minimum measurable analog input voltage to sv dd ratio is: ( 0.231271438 0.000043048228 ) sv dd sv dd v i min v i sv dd when n 1 0.237968 the maximum measurable analog input voltage to sv dd ratio is: (0.231271438 0.000043048288 4094) sv dd sv dd v i max v i sv dd when n 4094 0.400839 the allowable analog input voltage range for v i is: 0.231314 sv dd v i 0.407511 sv dd
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 9 post office box 655303 ? dallas, texas 75265 measurement range and conversion formulas (continued) if the input voltage is below the lower limit (v i min), the value 000 16 is returned. if the input voltage is above the upper limit (v i max), the value fff 16 is returned. the neg status bit is set in both cases. the zero status bit is set if 000 16 is returned. battery check since the tss400-s2 is ideal for battery applications, an internal supply voltage check is available. this operation is executed by the instructions adjbatt and chkbatt. adjbatt measures the internal reference voltage and puts the results in the flac register. by setting the supply voltage at a minimum acceptable level and executing the adjbatt instruction, a representative value is placed in the flac register. saving this number in a storage register or eeprom location enables it to be recalled for use by the chkbatt instruction when the current supply voltage needs to be checked against the preset acceptable minimum. to perform these operations, an internal stable reference is connected to the input of the adc and a measurement is made. due to the ratiometric nature of the conversion, the measured value is an indication of the tss400-s2 supply voltage. the adjbatt instruction performs this operation and stores the result in the flac register. the chkbatt instruction performs the same operation but compares the resulting measurement to the number in the flac register and sets the positive ( pos) and negative ( neg) status bits according to the result. programmable current source a programmable current source ratiometric to sv dd is available for supplying a fixed current to the analog sensors. when turned on, the current source sends a constant current out of the addressed analog input ( an). the voltage generated by the external sensor is measured with the same an input. the voltage used for a / d conversions and the reference voltage ( v ref ) used to set the current of the current source are both proportional to sv dd and have a fixed ratio to one another. this ensures optimum tracking. the current source is activated by digit latch dl13. when dl13 is set to 1 and sv dd is on, the current source is on. when dl13 is set to 0, the current source is off. figure 3 shows a diagram of the programmable current source. the current i is programmed by an external resistor r ext , which is connected between sv dd and ri. this current is given by the following equation: i an v rext r ext v rext is approximately 0.24 sv dd the programmable current range that the current source can supply to the adc input is: 0.15 ma to 2.4 ma (sv dd /v) v i i an r i with r i sensor resistance v i v rext r i r ext
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 10 post office box 655303 ? dallas, texas 75265 programmable current source (continued) enable (i on an) an selected r ext v rext sv dd an ri v dd agnd agnd sensor + sv dd tss400-s2 (r i ) v i i an figure 3. programmable current source diagram timers two independent crystal-controlled timers are available on the tss400-s2. each timer requires a 32.768-khz crystal that allows very accurate time measurements and clock functions to be performed. these timers function at 1 hz and 16 hz and can be used as a wake-up signal from the done mode of operation in addition to the other timing functions. the crystal is also used to control the lcd driver circuitry. counters two decimal counters, counter 1 and counter 2, are available for use on the tss400-s2. the individual counters range from 0 to 99. they can also be cascaded together for a range of 0 to 9999. counter 1 is the least significant part of the combined counter. after the counters are incremented or decremented, the zero status bit is set when the counter reaches zero or reset if the counter is not zero. eeprom addressing the tss400-s2 provides the option to address up to 128k bytes of external eeprom. the entire address space of the tss400-s2 is separated into banks. each bank has an address space of 2048 bytes. to select individual banks, an external multiplexer or an analog switch must be connected to the r outputs. control of the multiplexer is done with the r1 r6 outputs. table 4 lists the hardware addresses within a bank as defined by the logic levels of terminals a1 and a2.
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 11 post office box 655303 ? dallas, texas 75265 eeprom addressing (continued) table 4. eeprom hardware addresses eeprom pins address space a2 a1 address space 0 0 0 e 511 ( 0 16 e 1ff 16 ) 0 1 512 e 1023 ( 200 16 e 3ff 16 ) 1 0 1024 e 1535 ( 400 16 e 5ff 16 ) 1 1 1536 e 2047 ( 600 16 e 7ff 16 ) jumps from one eeprom bank to another are done with the chapter instruction. the i/o line is directed via a multiplexer or an analog switch to one selected chapter. the chapter is selected by the r outputs r1 r6. it is important to have pullup resistors connected to the eeprom data lines to generate a defined level in case a bank is not selected. after initialization, the default bank is 0 (all r outputs are set to 0). all jumps, conditional jumps, calls, burn eeprom commands, and reads eeprom commands are performed in the selected eeprom bank. figure 4 shows the eeprom connections for the tss400-s2. r7 r0 i/o r1 r2 r3 r4 r5 r6 v dd r outputs eeprom eeprom eeprom v ee chapter 0 chapter 1 chapter n clock data mux >22 k w 1 m w v dd 1 m w 1 m w tss400-s2 . . . figure 4. eeprom connections for the tss400-s2
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 12 post office box 655303 ? dallas, texas 75265 implemented bus structure the tss400-s2 has a multislave bus system built into the interpreter code. this bus system allows a unidirectional communication on a two-wire bus line (e.g., meter-bus). this bus line can be an ordinary twisted-pair telephone-type cable. data can be sent from the slave to the master on request of the master. asynchronous data transmission can also be initiated from a slave on its own if the bus is active. for example, this is done when the slave measures a value that has to invoke an alarm. to connect a slave module based on the tss400-s2, it is recommended that a texas instruments tss721 interface circuit be used. figure 5 shows the bus structure topology. a remote read out of a slave module is performed with the enbus instruction. the enbus instruction causes the master to generate a high-to-low transmission on k1. this tells the tss400-s2 slave to send out the contents of sto1 through sto5 in a specific time frame. each frame is determined by the unique bus address of each slave module. the data transfer then proceeds according to a specified protocol. rn k1 v dd eeprom tss721 tss400-s2 r7 i/o eeprom tx rx meter-bus v dd figure 5. bus structure topology ram usage the ram size of the tss400-s2 is enlarged to 960 bits. the 960-bit matrix is organized in 15 ram banks each containing 16 four-bit nibbles. the first 14 of these ram banks are normal ram banks. the last ram bank is a special direct-access memory (dam) bank. the ram also includes the flac, regb, storage, and flag registers. flac register the flac register is the main working register of the tss400-s2. it consists of eight nibbles for the number, one nibble for the sign, and two flags that are used internally by arithmetic routines. the sign bit is set to zero for positive numbers and one for negative numbers. the following diagram shows the format of the flac register: 10e7 10e6 10e5 10e4 10e3 10e2 10e1 10e0 sign most significant nibble least significant nibble sign and flags
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 13 post office box 655303 ? dallas, texas 75265 flac register (continued) the flac register is used for: ? receiving the result of an a / d conversion. ? storing the results of all arithmetic and logic operations. ? holding the first operand for arithmetic and logic operations. ? containing the result of a hexadecimal-to-decimal conversion. ? holding information for transfer to the eeprom. ? holding information to be displayed on the lcd. regb register the regb register is the second working register. it consists of eight nibbles for the number and one nibble for the sign. the format of the regb register is the same as the flac register. the regb register is used for: ? holding the second operand for arithmetic and logic operations. ? holding constants read from the eeprom. ? holding contents after transfers from the counters. storage registers the tss400-s2 has 12 general-purpose storage registers. these storage registers have the same format as the flac register, each with eight nibbles for the number and one nibble for the sign. the first six storage registers are addressable by using the names sto0 to sto5. use of the sto0 register is restricted since it is also used by the device during multiplication, division, and hexadecimal-to-decimal conversions. after multiplication and hexadecimal-to-decimal conversion operations, the contents of sto0 are set to 0; after a division, sto0 contains the remainder of the operation. this remainder can be used in conversions ( e.g., minutes to hours ). the other six storage registers (sto6 sto11) are called expanded storage registers. to access the expanded storage registers, the statement expand has to be used in conjunction with the mnemonic (see table 8 for more information on the expand instruction). note: to access the expanded storage registers in the software simulator, use the function key f3 of the window function. flag registers two general-purpose flag register groups, each with 16 flags, have been set aside. they are named group 1 and group 2. the selection of the groups is made with the smpl instructions selgrp1 and selgrp2. the group selected is in use until the other group is selected. each of the 16 flags in each group may be set, reset, and tested. the contents of the flags can then be used to control program flow, define the action of jumps, indicate errors in hardware function, and for any other user-defined purpose. the use of some of the flags is restricted since their operation has been predefined. table 5 lists the assigned use of each flag.
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 14 post office box 655303 ? dallas, texas 75265 table 5. flag assignment group 1 flags group 2 flags flag definition flag definition flag definition flag definition 0 arbitrary 8 arbitrary 0 arbitrary 8 arbitrary 1 seg. h1 information 9 arbitrary 1 arbitrary 9 arbitrary 2 seg. h2 information 10 long timer 2 arbitrary 10 arbitrary 3 seg. h3 information 11 short timer 3 arbitrary 11 arbitrary 4 seg. h4 information 12 k1 buffer 4 arbitrary 12 arbitrary 5 seg. h5 information 13 k2 buffer 5 arbitrary 13 arbitrary 6 seg. h6 information 14 k4 buffer 6 arbitrary 14 arbitrary 7 seg. h7 information 15 k8 buffer 7 arbitrary 15 arbitrary r outputs and digit latches outputs r1 through r6 are available as general-purpose outputs. they can be used for scanning keyboards or switches, for controlling relays, lamps, lcds, etc., or for digital communications using buffers, multiplexers, etc., as required by the designer. the r0 and r7 outputs cannot be addressed by the software. they are used by the interpreter when eeprom reads or writes are performed. r0 performs as the clock connection, and r7 switches the supply voltage to the eeprom as required to conserve system power. the tss400-s2 contains 14 one-bit digit latches ( dl0 through dl13 ) that ( except for dl0 and dl7 ) can be set and reset independently with software. these digit latches can be separated into two distinct groups, those with external outputs ( dl0 through dl7 ) and those without external outputs ( dl8 through dl13 ). the digit latches without external outputs ( dl8 through dl13 ) each control a unique hardware function. table 6 gives the digit-latch names and the hardware functions they control. table 6. digit-latch names and hardware functions digit latch hardware function dl0 not user addressable. r0 is the clock for the eeprom. dl1 dl6 6 r outputs (r1 r6) for general use dl7 not user addressable. r7 is the power switch for the eeprom. dl8 0 sets k port to input dl8 1 sets k port to output 2 dl9 dl10 dl11 addressed analog input connected to the adc 2 0 0 0 a1 dl9 dl11 2 0 1 0 a2 0 0 1 a3 0 1 1 a4 1 x x battery-check functions dl12 0 1-hz timer input into the alu for timer instructions dl12 1 16-hz timer input into the alu for timer instructions 0 constant-current source of the adc off dl13 1 constant-current source of the adc. this signal is on if sv dd is on. 2 it is not normally necessary to change these digit latches with software since the interpreter controls them automatically.
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 15 post office box 655303 ? dallas, texas 75265 k port the k port is a 4-bit programmable i / o port with individual lines labeled k1, k2, k4, and k8. the direction of data flow through the k lines is controlled by digit latch dl8. data to be output through the k lines is first stored in the 4-bit k-lines latch. the k-port output structure is open source. for data input, the k lines are read via schmitt triggers into the alu. if the tss400-s2 has been placed in either the off or done mode, it is possible to use the k lines to generate a wake-up signal. status logic the status logic consists of three bits that are modified after the execution of specific instructions. the status bits are checked by conditional jumps that are executed or not executed depending on the state of the tested status bit. not every instruction rewrites the status bits. if an instruction does not affect the status bits, the status of the last instruction to rewrite the status bits is preserved. the following diagram shows the three bits making up the status logic. pos neg zero pos bit the pos bit is set after an arithmetic instruction if the result of the operation has a positive sign. if the result is negative, the pos bit is reset. other instructions set the pos bit if no error occurred, thus making it possible to use the pos bit status as an error indicator. if the a / d measurement is within range, the pos bit is set. neg bit the neg bit is set after an arithmetic instruction if the result of the operation has a negative sign. if the result is positive, the neg bit is reset. other instructions set the neg bit if an error occurred, thus making it possible to use the neg bit status as an error indicator. if the a / d measurement is out of range, the neg bit is set. zero bit the zero bit is set to one if the result of the last instruction is zero or if a comparison results in equality. if the result is not zero or the comparison is not equal, the zero bit is cleared. if the a / d measurement is under range, the zero bit is set. lcd driver the tss400-s2 contains lcd-driver circuitry that is designed to get the best results for a wide range of applications. from a software point of view, the 4-input multiplexed 56-segment lcd driver looks very simple. no timing problems exist with multiplexing for getting a quiet, stable display. the lcd-driver-hardware outputs display information automatically without any software burden during the active and done modes of operation. software has only to decide which segment information is to be displayed and in which digit to display it. note: lcds are available for prototype development. contact the nearest ti sales office for more information.
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 16 post office box 655303 ? dallas, texas 75265 digit addressing the flac's most significant nibble ( 10e7) cannot be displayed because of the 7-digit configuration of the display driver. if it is necessary to display the most significant nibble, a shift right ( shiftr) with decimal correction of the flac contents has to be done. the following diagram shows the tss400-s2 display configuration and accompanying flac nibbles, and figure 6 shows the odd and even selects. flac nibble 10e7 10e6 10e5 10e4 10e3 10e2 10e1 10e0 selects e s1/s2 s3/s4 s5/s6 s7/s8 s9/s10 s11/s12 s13/s14 digit n e 1 2 3 4 5 6 7 com2 (even select ) com3 (even select ) com4 (even select ) com1 (even select ) com1 (odd select ) com2 (odd select ) com4 (odd select ) com3 (odd select ) a b c d e f g h figure 6. lcd odd and even selects segment addressing the opla (output programmable logic array) definition is based on the following hardware configuration. select lines common select lines 1 2 3 4 odd select s1 s3 s5 s7 s9 s11 s13 c f h e even select s2 s4 s6 s8 s10 s12 s14 a b d g lcd digit 1 2 3 4 5 6 7 caution: the common / select definition shown cannot be modified, and any display chosen to be used with the tss400-s2 must conform to the shown definition.
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 17 post office box 655303 ? dallas, texas 75265 segment addressing (continued) the chosen common / select configuration is designed to be fail safe. this means that no valid numbers or characters are displayed when a segment or common signal failure occurs. instead, meaningless segment combinations are displayed that cannot be mistaken as valid data. the tss400-s2 lcd driver contains a gate-level opla that is a 64 7 bit configuration. the seven bits represent the segment information a through g for 64 predefined combinations ( the h segment is independent of the opla and is given with the display instructions ). each of the predefined characters can be used with the display command. table 7 gives the segments displayed and the character for each. table 7. segments display and character character number segments character displayed segments 0 a b c d e f 0 or o 1 b c 1 or | 2 a b d e g 2 3 a b c d g 3 4 b c f g 4 5 a c d f g 5 or s 6 a c d e f g 6 7 a b c 7 8 a b c d e f g 8 or b 9 a b c d f g 9 10 a b c e f g a or r 11 c d e f g b 12 a d e f c or [ 13 b c d e g d 14 a d e f g e 15 a e f g f 16 none blank 17 b c d j 18 d e f l 19 a b e f g p 20 b c d e f u 21 d e g c 22 c e f g h 23 d e l 24 c e g n 25 c d e g o 26 e g r
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 18 post office box 655303 ? dallas, texas 75265 table 7. segments display and character (continued) character number segments character displayed segments 27 d e f g t 28 c d e v 29 b c d f g y 30 b c e f g h 31 b c g 1 32 none blank 33 a 34 f 35 a f 36 b 37 a b 38 bf 39 a b f 40 g minus sign 41 a g 42 f g 43 a f g 44 b g 45 a b g 46 b f g 47 a b f g degree 48 e 49 a e 50 e f 51 a e f 52 b e 53 a b e 54 b e f 55 a b e f 56 e g 57 a e g 58 e f g 59 a e f g f 60 c 61 d 62 a b c d ] 63 a b c d e j
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 19 post office box 655303 ? dallas, texas 75265 sensor macro programming language (smpl) the tss400-s2 features a processor that is programmed with an easy-to-use macro language (smpl). the internal rom is preprogrammed with optimized calibration, display, a / d-conversion routines, the smpl macro interpreter, and eeprom communications protocol. the tss400-s2 smpl language is an optimized 89-instruction language that is easier to use than assembly language. each smpl instruction is equivalent, on average, to six or seven assembly language instructions. this greatly reduces the amount of memory space required to store a given program and eases programming tasks. smpl interpreter instruction coding format the following rules should be followed in writing a program: ? label fields are a maximum of eight alphanumeric characters, starting with an alphabetic character. the label field must begin in column one. ? the mnemonic is to the right of a label and must be separated by at least one blank space. if no label is used, the mnemonic begins after the first column ( second column or further right ). ? the operand is to the right of the mnemonic and must be separated by at least one blank. ? a comment must start to the right of the operand and be separated by at least one blank. if a comment occupies a separate line, it must begin with an asterisk ( *) in column one. for legibility, it is recommended that fields begin in the following columns: ? label fields must begin in column 1 ? mnemonics should begin in column 11 ? operands should begin in column 21 ? comments to an instruction should begin in column 31 ? full-line comments must begin with an asterisk ( *) in column 1 mnemonic label 2 operand comment * column 1 column 11 column 21 column 31 2 labels are 8 characters max and must start in column 1. * an asterisk in column 1 reserves the entire line for a comment. table 8 lists the smpl language programming instructions in each of the following major categories: ? register-to-register transfer instructions ? arithmetic instructions ? arithmetic compare instructions ? bit-manipulation instructions ? counter instructions ? display instructions ? miscellaneous instructions ? constant-transfer instructions ? timer instructions ? input / output instructions ? program flow control instructions ? a/ d-conversion instructions
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 20 post office box 655303 ? dallas, texas 75265 table 8. smpl programming instructions function group smpl instruction description movflsto n move flac to storage register n movstofl n move storage register n to flac movrbsto n move regb to storage register n movstorb n move storage register n to regb exchrbfl exchange regb and flac registers movflrb move flac register to regb register movrbfl move regb register to flac register movflprm label move flac to eeprom starting at address label register-to-register tf movprmrb label move eeprom contents starting at address label to regb transfer prmmoder a+n move n number of bytes to read index with a incrementing registers from eeprom prmmodew a + n move n number of bytes to write index with a incrementing registers to eeprom expand movrbsto n move regb into an expanded storage register expand movstorb n move expanded storage register into regb expand movflsto n move flac into an expanded storage register expand movstofl n move expanded storage register into flac add add regb to flac decimally sub subtract regb from flac decimally mpy multiply flac and regb decimally div divide flac by regb decimally arithmetic addh add regb to flac hexadecimally arithmetic subh subtract regb from flac hexadecimally hexdec hexadecimal-to-decimal conversion round n round flac n times (0n compare read index to value n then set status flags cmpixw >n compare write index to value n then set status flags sbit n set flag bit n (0 n<16) rbit n reset flag bit n (0 n<16) bit mani p ulation tbit n test flag bit (0 n<16) bit manip u lation selgrp n select flag bits group n (0nn load counter n decimally with constant >nn movcnt n move counter n to regb movdbl move combined counters to regb
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 21 post office box 655303 ? dallas, texas 75265 table 8. smpl programming instructions (continued) function group smpl instruction description displdg n >nn display information of operand nn in digit n dis p lay displclr clear display dis lay displfl >mn display flac from digit m to digit n and append (m n+1) bytes containing information for each digit ldflpos n load flac with a positive constant (bcd format) contained in the n following bytes (n = 0 : 4 bytes) ldflneg n load flac with a negative constant (bcd format) contained in the n following bytes (n = 0 : 4 bytes) constant transfer ldrbpos n load regb with a positive constant (bcd format) contained in the n following bytes (n = 0 : 4 bytes) ldrbneg n load regb with a negative constant (bcd format) contained in the n following bytes (n = 0 : 4 bytes) clrfl clear flac register clrrb clear regb clrram clear ram ldtiml nnn load long timer with constant nnn ldtims nnn load short timer with constant nnn timer acttim actualize timers stptiml stop long timer stptims stop short timer / setr n set output rn (dln) / rstr n reset output rn (dln) / tstkey >nn test keyboard like described by operand / kintim actualize k input and timers input / output kin read k inputs to flac (lsd) and flag 12 thru 15 flkout output lsd of flac to k lines kout n output constant n to k lines rout >n transfer constant to r ports flrout output lsd of flac to r ports jmp label jump to label unconditionally jz label jump to label if zero (status bit zero = 1) jeq label jump to label if equal (status bit zero = 1) jnz label jump to label if not zero (status bit zero = 0) program-flow control jne label jump to label if not equal (status bit zero = 0) jp label jump to label if positive (status bit pos = 1) jn label jump to label if negative (status bit neg = 1) call label call subroutine label retn return from subroutine / svddon set converter supply voltage / svddoff reset converter supply voltage a / d conversion measr a byte n measure addressed a / d input a+1 and following byte contains n number of conversions and mode a / d c onvers i on adjbatt measure battery voltage and put result in flac chkbatt check battery voltage adjcomp measure a / d input and put result in flac chkcomp compare a / d input with value in flac
tss400-s2 m power programmable high-precision slms002 d4101, october 1993 22 post office box 655303 ? dallas, texas 75265 table 8. smpl programming instructions (continued) function group smpl instruction description done enter done mode off enter off mode nop no operation miscellaneous slv >nn host control instruction chapter >vxy switches the i/o line that data is transferred to and from the eeprom enbus x enable bus capability as background program via rn disbus disable bus capability absolute maximum ratings over operating free-air temperature range (unless otherwise noted) 2 supply voltage range, v dd ( see note 1 ) 0.3 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input voltage range, v i v ss 0.3 v to v dd + 0.3 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . diode current 2 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . operating free-air temperature range, t a : TSS400CFN-S2 0 c to 70 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . tss400qfn-s2 40 c to 105 c . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range 50 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. note 1: the voltage value is measured with respect to v ss . recommended operating conditions min nom max unit supply voltage, v dd 2.6 3 5.5 v supply voltage, v ss 0 0 0 v timer frequency (xtal) 32.768 khz o p erating free air tem p erature t a TSS400CFN-S2 0 25 70 c operating free - air temperat u re , t a tss400qfn-s2 40 25 105 c
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 23 post office box 655303 ? dallas, texas 75265 electrical characteristics, t a = 0 c to 70 c (unless otherwise noted) total device supply current parameter test conditions min typ max unit 2 v dd = 3 v 300 500 with a/d 2 v dd = 3 v, t a = 40 c to 105 c 300 500 m a with a/d 2 v dd = 5 v 800 1100 m a i dd( ti ) su pp ly current active mode v dd = 5 v, t a = 40 c to 105 c 800 1400 i dd(active) s u ppl y c u rrent , acti v e mode 2 v dd = 3 v 80 140 without a/d 2 v dd = 3 v, t a = 40 c to 105 c 80 140 m a witho u t a/d 2 v dd = 5 v 400 500 m a v dd = 5 v, t a = 40 c to 105 c 520 650 2 v dd = 3 v 4 8 i dd(done) su pp ly current done mode standby 2 v dd = 3 v, t a = 40 c to 105 c 6 9 m a i dd(d one ) su ly current , done mode standby 2 v dd = 5 v 10 18 m a v dd = 5 v, t a = 40 c to 105 c 12 20 2 v dd = 3 v 0.1 1 i dd(off) su pp ly current off mode halt 2 v dd = 3 v, t a = 40 c to 105 c 0.1 1 m a i dd( o ff) su ly current , off mode halt 2 v dd = 5 v 0.1 1 m a v dd = 5 v, t a = 40 c to 105 c 0.1 1 2 current values are for input levels in the range of 0 to 0.3 v for v ik(l) , v io(l) , and v dd 0.3 v for v ik(h) , v io(h) ( all outputs open ). k and i/o inputs (schmitt trigger) parameter test conditions min max unit v t positive going threshold voltage v dd = 3 v 1.5 2 v t+ positi v e - going threshold v oltage v dd = 5 v 2.7 3.9 v v t negative going threshold voltage v dd = 3 v 0.8 1.5 v v t negati v e - going threshold v oltage v dd = 5 v 1 1.9 hysteresis (v t v t ) v dd = 3 v 0.4 1.4 v h y steresis (v t+ v t ) v dd = 5 v 0.8 2.9 v v dd = 3.8 v, v i = 0 0.1 0.1 i i in p ut current v dd = 5.5 v, v i = 0 0.1 0.1 m a i i inp u t c u rrent v dd = 3.8 v, v i = v dd 0.1 0.1 m a v dd = 5.5 v, v i = v dd 0.1 0.1 k outputs parameter test conditions min max unit v dd = 3 v, i oh = 0.1 ma v dd 0.2 v dd v oh high-level output voltage v dd = 3 v, i oh = 0.3 ma v dd 0.6 v dd v v dd = 5 v, i oh = 0.5 ma v dd 0.6 v dd i/o output parameter test conditions min max unit v dd = 3 v, i oh = 0.1 ma v dd 0.2 v dd v oh high-level output voltage v dd = 3 v, i oh = 0.3 ma v dd 0.6 v dd v v dd = 5 v, i oh = 0.75 ma v dd 0.6 v dd v ol low level out p ut voltage v dd = 3 v, i ol = 0.5 ma v ss v ss + 0.4 v v ol lo w- le v el o u tp u t v oltage v dd = 5 v, i ol = 1 ma v ss v ss + 0.4 v
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 24 post office box 655303 ? dallas, texas 75265 electrical characteristics, t a = 0 c to 70 c (continued) r outputs parameter test conditions min max unit v dd = 3 v, i oh = 0.1 ma v dd 0.2 v dd v oh(r) high-level output voltage, r output v dd = 3 v, i oh = 0.3 ma v dd 0.6 v dd v () v dd = 5 v, i oh = 0.3 ma v dd 0.4 v dd v ol(r) low level out p ut voltage r out p ut v dd = 3 v, i ol = 0.3 ma v ss v ss + 0.4 v v ol(r) lo w- le v el o u tp u t v oltage , r o u tp u t v dd = 5 v, i ol = 0.3 ma v ss v ss + 0.4 v initn input parameter test conditions min max unit v dd = 3 v, v i = 0 0.2 1 i i(initn) input current, initn v dd = 5 v, v i = 0 0.5 2.2 m a () v dd = 3.8 v to 5.5 v, v i = v dd 0.1 0.1 sv dd output parameter test conditions min max unit v o out p ut voltage switched v dd v dd = 2.6 v, i svdd = 2 ma v dd 0.2 v dd v v o o u tp u t v oltage , s w itched v dd v dd = 2.6 v, i svdd = 6.5 ma v dd 0.3 v dd v i o output current, switched v dd v dd = 3.8 v to 5.5 v, sv dd off ( 0 v ) 0.1 0.1 m a lcd lines: common and segment (1/4 duty cycle) parameter test conditions min typ max unit v oh high level out p ut voltage v dd = 3 v, i oh = 50 m a v dd 0.4 v dd v v oh high - le v el o u tp u t v oltage v dd = 5 v, i oh = 100 m a v dd 0.4 v dd v v o out p ut voltage (2/3) v dd v dd = 3 v, i oz = 10 na (2/3) v dd 0.04 (2/3) v dd (2/3) v dd +0.04 v v o o u tp u t v oltage , (2/3) v dd v dd = 5 v, i oz = 10 na (2/3) v dd 0.04 (2/3) v dd (2/3) v dd +0.04 v v o out p ut voltage (1/3) v dd v dd = 3 v, i oz = 10 na (1/3) v dd 0.04 (1/3) v dd (1/3) v dd +0.04 v v o o u tp u t v oltage , (1/3) v dd v dd = 5 v, i oz = 10 na (1/3) v dd 0.04 (1/3) v dd (1/3) v dd +0.04 v v ol low level out p ut voltage v dd = 3 v, i ol = 50 m a v ss v ss +0.4 v v ol lo w- le v el o u tp u t v oltage v dd = 5 v, i ol = 100 m a v ss v ss +0.4 v
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 25 post office box 655303 ? dallas, texas 75265 electrical characteristics, t a = 0 c to 70 c (continued) adc current source, v rext = v svdd v ri (unless otherwise noted) parameter test conditions min typ max unit v i(r t) voltage ( across programming v dd = 3.5 v, i ri = 1.3 ma, t a = 25 c 0.236635 sv dd 0.240238 sv dd 0.243843 sv dd v v i(rext) g( g g resistor ) 2 v dd = 5 v, i ri = 1.3 ma, t a = 25 c 0.237836 sv dd 0.240238 sv dd 0.242641 sv dd v r i(r t) external p rogramming resistor v dd = 3.5 v, t a = 25 c 0.1 1.6 k w r i(rext) e x ternal programming resistor v dd = 5 v, t a = 25 c 0.1 1.6 k w v dd = 3 v, v rext /r ext = 1.3 ma, n = 00a0 16 = 10 0.07 te m p erature stability (dn/dt) v dd = 3 v, v rext /r ext = 1.3 ma, n = 0f5f 16 = 3935 0.14 lsb/ c temperat u re stabilit y (dn/dt) v dd = 5 v, v rext /r ext = 1.3 ma, n = 00a0 16 = 10 0.07 lsb/ c v dd = 5 v, v rext /r ext = 1.3 ma, n = 0f5f 16 = 3935 0.14 v dd = 3 v, t a = 25 c, n = 00a0 16 = 10 7 3.5 2.5 sv rejection ratio (dn / dsv v dd = 3 v, t a = 25 c, n = 0f5f 16 = 3935 14 7 5 lsb/ v sv dd re j ec ti on ra ti o (dn / dsv dd) v dd = 5 v, t a = 25 c, n = 00a0 16 = 10 7 3.5 2.5 lsb/ v v dd = 5 v, t a = 25 c, n = 0f5f 16 = 3935 14 7 5 adc parameter test conditions 3 min typ max unit v ih high-level analog input voltage for v dd = 3 v, n = 0f5f 16 = 3935 0.398514 sv dd 0.400666 sv dd 0.402819 sv dd v ih ggg a / d conversion v dd = 5 v, n = 0f5f 16 = 3935 0.398514 sv dd 0.400666 sv dd 0.402819 sv dd v v il low-level analog input voltage for v dd = 3 v, n = 00a0 16 = 10 0.236007 sv dd 0.238159 sv dd 0.240312 sv dd v v il gg a / d conversion v dd = 5 v, n = 00a0 16 = 10 0.236007 sv dd 0.238159 sv dd 0.240312 sv dd v i input volta g e ran g e for a/d v dd = 3 v, n = 00a8 16 to 0f5f 16 = 168 to 3935 0.161216 sv dd 0.162507 sv dd 0.163799 sv dd v v i gg conversion v dd = 3 v, n = 00a8 16 to 00f5f 16 = 168 to 3935 0.161216 sv dd 0.162507 sv dd 0.163799 sv dd v i ib input bias current ( all inputs ) 2 v i = v ss to v dd , current source off 30 na 2 this range is available only for v dd 3.5 v. the a/d range is limited due to the offset of the comparator. the range can be larger if the comparator offset is made smaller. 3 n = a /d conversion result for a single measurement. see measurement range and conversion formulas.
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 26 post office box 655303 ? dallas, texas 75265 operating characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions min typ max unit v dd = 3 v, ddv 120 lsb 1 1 v dd = 3 v, 120 lsb < ddv 240 lsb 1.5 1.5 lsb v dd = 3 v, 240 lsb < ddv 2600 lsb 2.5 2.5 lsb linearity v dd = 3 v, 2600 lsb < ddv 4.5 4.5 linearit y v dd = 5 v, 120 lsb ddv 1 1 v dd = 5 v, 120 lsb < ddv 240 lsb 1.5 1.5 lsb v dd = 5 v, 240 lsb < ddv 2600 lsb 2.5 2.5 lsb v dd = 5 v, 2600 lsb < ddv 4.5 4.5 v dd(bc) supply voltage, battery check 000 16 < conversion result < fff 16 4.8 v clock frequency internal mos v dd = 3 v, t a = 25 c 650 khz clock freq u enc y, internal mos v dd = 5 v, t a = 25 c 840 kh z single-compensated measurement v dd = 3.5 v 1.2 t c conversion time single-uncompensated measurement v dd = 3.5 v 1 ms adjcomp v dd = 3.5 v 1 processor frequency, internal (f proc ) 700 khz c l ca p acitance load lcd display, any common 1000 p f c l capacitance load lcd display, any segment 200 pf internal assembly language instruction execution time 2 15 8.5 6 m s 2 macro-command execution times typically require 150 internal assembly instruction executions per byte of macro code read from e eprom.
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 27 post office box 655303 ? dallas, texas 75265 typical characteristics 600 400 200 0 rc-mos oscillator frequency khz 800 1000 rc-mos oscillator frequency vs free-air temperature 1200 50 25 0 25 50 75 100 125 f osc t a free-air temperature c v dd = 3 v v dd = 5 v figure 7
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 28 post office box 655303 ? dallas, texas 75265 application information figure 8 shows all the components that are necessary to run a tss400-s2 and the connected sensors for a temperature-calibrated pressure application. in this case, a 3-v lithium battery is used as a power supply. the pressure application could be an altimeter, a pressure gauge, or a manometer. this example uses simple uncalibrated silicon sensors. it is assumed that a simple, easy-to-perform software calibration routine is used to get accurate results. this temperature-compensation software calibration and the 12-bit adc ensure that a high degree of accuracy can be realized with this application. all of the analog circuitry in figure 8 is connected to the sv dd ( switchable v dd ) terminal. by doing this, the sensor network is only powered when it is needed for a / d conversion. this is done to reduce total system power consumption. v cc scl sda a0 a1 a2 v ss r7 r0 i/o tss400-s2 seg114 com1- 4 v dd initn kc v ss agnd a1 k2 r1 k1 sv dd + a2 c1 c2 + battery pressure sensor temperature sensor switches eeprom x24(l)c04 7-digit 4-multiplex lcd v dd toscout toscin 32.768 khz 1/2 tlc1078 v cc scl sda a0 a1 a2 v ss eeprom x24(l)c04 2n2906 22 k w 3.3 k w 22 k w v dd 16 17 4 3 2 1 15 13 6 11 5 19 9 20 18 26 4 figure 8. temperature-compensated pressure application
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 29 post office box 655303 ? dallas, texas 75265 application information sdt-400 development tool the sdt-400 is an inexpensive software development tool used for development of tss400-s2 applications. it consists of three basic parts: ? a 5.25-inch floppy diskette that contains the tss400-s2 software simulator program, the asm400 smpl macro language assembler program, and demonstration and example routine programs ? the sdt-400 user's manual that details how to use the development system and the tss400-s2 ? a hardware development board the sdt-400 works with an ibm-compatible personal computer and supports program debug at the macro instruction level. it also provides on-screen simulation of the lcd display and most functions of the tss400-s2. these functions ( all internal registers, inputs, outputs, and flags ) can be edited on the screen in the simulator with the keyboard. it also provides a burn routine for downloading an application program into the eeproms on the hardware development board. the hardware development board has all of the components and connectors required for it to be connected to a personal computer parallel printer port and for it to serve as a prototyping system board for the application under development. hardware development board the hardware development board contains a seven-digit lcd display, a 16-key keypad, sockets for four 512 8 eeproms, a socket for the tss400-s2, connectors for the parallel printer port, all supply terminals, input terminals, and output terminals of the tss400-s2 and an on-board voltage regulator that allows a user to power the system from the personal computer cable, a 9-v transistor battery, or a dc power supply. the development system comes with four eeproms, two standard tss400s, a 3-v lcd, a 5-v lcd, and a cable to connect the development board to the personal computer. software simulator the software simulator, which runs on all ibm-at compatible personal computers, allows fast development of application software for the tss400-s2. all functions, with the exception of the hardware communication with inputs and outputs, can be simulated. the development of program algorithms requires no hardware. as shown in figure 9, all internal registers, inputs, outputs, and flags are shown simultaneously on one screen. these may be modified whenever needed, even during simulator's run mode from the keyboard. figure 9 shows the simulator software running on a pc.
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 30 post office box 655303 ? dallas, texas 75265 application information working registers flac = + 00000000 regb = + 00000000 bp pc code mneumonic lev 023 81 jp 116 0 024 16 0 025 69 call 1ea 0 026 ea 0 1ea 01 setr 1 1 1eb 02 setr 2 1 1ec 03 setr 3 1 1ed 04 setr 4 1 1ee d2 done 1 1ef 11 rstr 1 1 tim l s t = 000 000 b = 000 000 group 1 2 flag 0 = 0 0 flag 1 = 0 0 flag 2 = 0 0 flag 3 = 0 0 flag 4 = 0 0 flag 5 = 0 0 flag 6 = 0 0 flag 7 = 0 0 flag 8 = 0 0 flag 9 = 1 1 flag10 = 0 0 flag11 = 0 0 flag12 = 0 0 flag13 = 0 0 flag14 = 0 0 flag15 = 0 0 storage registers st00 = + 00000000 st01 = + 00000000 st02 = + 00000000 st03 = + 00000000 st04 = + 00000000 st05 = + 00000000 counter cnt2 cnt1 00 00 batt. check voltage = 5.00 volts output r1 = 0 r2 = 0 r3 = 0 r4 = 0 r5 = 0 r6 = 0 latches > effect dl 8 = 0 kport in dl 9 = 0 a1 dl10 = 0 is selected dl11 = 0 svdd is off dl12 = 0 0up 1 hz dl13 = 0 current off sts p= 0 z= 0 n= 0 a/dconv a1 = 800 a2 = 800 a3 = 800 a4 = 800 kport k1 = 0 k2 = 0 k4 = 0 k8 = 0 keyboard 0123 4567 89abcdef (open=0) 0000 0000 00000000 step run(snap) go pc/break mem f1/f2/f3wdws init load write target help os esc figure 9. sdt-400 simulator screen real-time debugging after verification of all software parts that do not need connection to the target hardware, the real-time tests with the development board connected to the target hardware can begin. the development board is connected to the printer port on the personal computer by means of the included cable. the tested user's program is burned into the eeproms with the appropriate simulator instruction and reread for verification. the user's program, now stored in the eeproms on the development board, can be started and stopped by instructions from the software simulator. real-time debugging with the development board is made by inserting pauses into the user's program as desired, usually when some subprogram portion is complete. this can be after computations are complete, a / d conversions are complete, the keyboard has been tested, and so on. the following are several possible locations for the pauses and checking a program: ? jumps to the same location ? waits for a definitive key to be pressed ? displays of the register that contain important information ? displays of the registers with wait states
tss400-s2 m power programmable high-precision sensor signal processor slms002 d4101, october 1993 31 post office box 655303 ? dallas, texas 75265 mechanical data plastic j-leaded chip carrier fn/s-pqcc-j** 4040005/a10/93 20-pin shown 0.048 (1,22) 0.042 (1,07) x 45 1 319 4 8 913 14 18 max min d 3 / e 3 d 2 / e 2 0.020 (0,51) 0.120 (3,05) max 0.180 (4,57) 0.050 (1,27) typ d d 1 e 1 e jedec outline pins** no. of d / e min max mo-047aa 20 0.385 (9,78) 0.395 (10,03) 0.350 (8,89) 0.356 (9,04) min max 0.456 (11,58) 0.450 (11,43) 0.495 (12,57) 0.485 (12,32) 28 mo-047ab 44 mo-047ac 52 mo-047ad 0.390 (9,91) 0.430 (10,92) 0.300 (7,62) typ 0.200 (5,08) 0.330 (8,38) 0.290 (7,34) max min 0.890 (22,61) 0.930 (23,62) 0.800 (20,32) 1.000 (25,40) 1.130 (28,70) 1.090 (27,69) mo-047af 84 1.185 (30,10) 1.195 (30,35) 1.150 (29,21) 1.158 (29,41) 0.956 (24,28) 0.950 (24,13) 0.995 (25,27) 0.985 (25,02) 68 mo-047ae 0.500 (12,70) 0.630 (16,00) 0.590 (14,99) 0.685 (17,40) 0.695 (17,65) 0.650 (16,51) 0.656 (16,66) 0.600 (15,24) 0.730 (18,54) 0.690 (17,53) 0.785 (19,94) 0.795 (20,19) 0.750 (19,05) 0.756 (19,20) d 2 / e 2 d 3 / e 3 d 1 / e 1 notes: a. all linear dimensions are in inches (millimeters). b. this drawing is subject to change without notice. c. dimensions d 1 and e 1 do not include mold flash or protrusion. protrusion shall not exceed 0.010 (0,25) on any side. d. all dimensions conform to jedec specification mo-047. e. maximum deviation from coplanarity is 0.004 (0,10).
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