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application note 42047 power factor correction (pfc) basics rev. 0.9.0 8/19/04 www.fairchildsemi.com what is power factor? power factor (pf) is de?ed as the ratio of the real power (p) to apparent power (s), or the cosine (for pure sine wave for both current and voltage) that represents the phase angle between the current and voltage waveforms (see figure 1). the power factor can vary between 0 and 1, and can be either inductive (lagging, pointing up) or capacitive (leading, point- ing down). in order to reduce an inductive lag, capacitors are added until pf equals 1. when the current and voltage wave- forms are in phase, the power factor is 1 (cos (0? = 1). the whole purpose of making the power factor equal to one is to make the circuit look purely resistive (apparent power equal to real power). real power (watts) produces real work; this is the energy transfer component (example electricity-to-motor rpm). reactive power is the power required to produce the mag- netic ?lds (lost power) to enable the real work to be done, where apparent power is considered the total power that the power company supplies, as shown in figure 1. this total power is the power supplied through the power mains to pro- duce the required amount of real power. figure 1. power factor triangle (lagging) the previously-stated de?ition of power factor related to phase angle is valid when considering ideal sinusoidal wave- forms for both current and voltage; however, most power supplies draw a non-sinusoidal current. when the current is not sinusoidal and the voltage is sinusoidal, the power factor consists of two factors: 1) the displacement factor related to phase angle and 2) the distortion factor related to wave shape. equation 1 represents the relationship of the displace- ment and distortion factor as it pertains to power factor. irms (1) is the currents fundamental component and irms is the currents rms value. therefore, the purpose of the power factor correction circuit is to minimize the input current distortion and make the current in phase with the v oltage. when the power factor is not equal to 1, the current wave- form does not follow the voltage waveform. this results not only in power losses, but may also cause harmonics that travel down the neutral line and disrupt other devices con- nected to the line. the closer the power factor is to 1, the closer the current harmonics will be to zero since all the power is contained in the fundamental frequency. understanding recent regulations in 2001, the european union put en61000-3-2, into effect to establish limits on the harmonics of the ac input current up to the 40 th harmonic. before en61000-3-2 came into effect, there was an amendment to it passed in october 2000 that stated the only devices required to pass the rigorous class d (figure 2) emission limits are personal computers, personal computer monitors, and television receivers. other devices were only required to pass the relaxed class a (figure 3) emission limits. figure 2. both current and voltage waveforms are in phase with a pf =1 (class d) figure 3: this is what is called quasi-pfc input, achieving a pf around 0.9 (class a) causes of inef?iencies one problem with switch mode power supplies (smps) is that they do not use any form of power factor correction and that the input capacitor c in (shown in figure 4) will only charge when v in is close to v peak or when v in is greater ?total power? apparent power (s) = volt amperes = i 2 z real power (p) = watts = (i 2 r) reactive power (q) = vars = (x l ? x c ) | 2 k kd irms irms pf ? = = cos ) 1 ( (1)
AN-42047 application note 2 rev. 0.9.0 8/19/04 than the capacitor voltage v cin . if c in is designed using the input voltage frequency, the current will look much closer to the input waveform (load dependent); however, any little interruption on the mainline will cause the entire system to react negatively. in saying that, in designing a smps, the hold-up time for c in is designed to be greater than the fre- quency of v in, so that if there is a glitch in v in and a few c ycles are missed, c in will have enough energy stored to continue to power its load. figure 4. smps input without pfc figure 5 represents a theoretical result of v cin (t) (shown in the circuit in figure 4) with a very light load, and hence, very little discharge of c in . as the load impedance increases, there will be more droop from v cin (t) between subsequent peaks, but only a small percentage with respect to the overall v in (e.g. with the input being 120v, maybe a 3-5 volt droop. as previously stated, c in will only charge when v in is greater than its stored voltage, meaning that a non-pfc cir- cuit will only charge c in a small percentage of the overall c ycle time. figure 5. v in with charging c in after 90 degrees (figure 6), the half cycle from the bridge drops below the capacitor voltage (c in ); which back biases the bridge, inhibiting current ?w into the capacitor (via v in ). notice how big the input current spike of the inductor is. all the circuitry in the supply chain (the wall wiring, the diodes in the bridge, circuit breakers, etc) must be capable of carrying this huge peak current. during these short periods the c in must be fully charged, therefore large pulses of cur- rent for a short duration are drawn from v in . there is a way to average this spike out so it can use the rest of the cycle to accumulate energy, in essence smoothing out the huge peak current, by using power factor correction. figure 6. voltage and current waveforms in a simple rectifier circuit in order to follow v in more closely and not have these high amplitude current pulses, c in must charge over the entire c ycle rather than just a small portion of it. todays non-linear loads make it impossible to know when a large surge of cur- rent will be required, so keeping the inrush to the capacitor constant over the entire cycle is bene?ial and allows a much smaller c in to be used. this method is called power factor correction. boost converters the heart of power f actor correction boost converter topology is used to accomplish this active power-factor correction in many discontinuous/continuous modes. the boost converter is used because it is easy to implement and works well. the simple circuit in figure 7 is a short refresher of how inductors can produce very high v oltages. initially, the inductor is assumed to be uncharged, so the voltage v o is equal to v in . when the switch closes, the current (i l ) gradually increases through it linearly since: v oltage (v l ) across it increases exponentially until it stabi- lizes at v in . notice the polarity of the voltage across the inductor, as it is de?ed by the current direction (in?w side is positive). when the switch opens causing the current to change from i max to zero (which is a decrease, or a negative slope). looking at it mathematically: or l times the change in current per unit time, the voltage approaches negative in?ity (the inductor reverses polarity). because the inductor is not ideal, it contains some amount of series resistance, which loads this ?n?ite?voltage to a ?ite number. with the switch open, and the inductor dis- charging, the voltage across it reverses and becomes additive with the source voltage v in . if a diode and capacitor were connected to the output of this circuit, the capacitor would charge to this high voltage (perhaps after many switch c ycles). this is how boost converters boost voltage, as shown in figure 8. v1 d1 cin r1 + ? rtn vo (to pwm) 50 time (s) 100 0 0 100 130 -100 -130 vin(t) vc(t) v input voltage (full rectified) input current charging bulk input capacitor voltage (vc in ) 0 180 90 270 360 deg = dt v l i l l 1 . t i l dt di l v l ? ? = ,
application note AN-42047 rev. 0.9.0 8/19/04 3 figure 7. flyback action of an inductor figure 8. pfc boost pre-regulator the input to the converter is the full-recti?d ac line volt- age. no bulk ?tering is applied following the bridge recti- ?r, so the input voltage to the boost converter ranges (at twice line frequency) from zero volts to the peak value of the ac input and back to zero. the boost converter must meet two simultaneous conditions: 1) the output voltage of the boost converter must be set higher than the peak value (hence the word boost) of the line voltage (a commonly used v alue is 385vdc to allow for a high line of 270vacrms), and 2) the current drawn from the line at any given instant must be proportional to the line voltage. w ithout using power factor correction a typical switched- mode power supply would have a power factor of around 0.6, therefore having considerable odd-order harmonic dis- tortion (sometimes with the third harmonic as large as the fundamental). having a power factor of less than 1 along with harmonics from peaky loads reduces the real power av ailable to run the device. in order to operate a device with these inef?iencies, the power company must supply addi- tional power to make up for the loss. this increase in power causes the power companies to use heavier supply lines, oth- erwise self-heating can cause burnout in the neutral line con- ductor. the harmonic distortion can cause an increase in operating temperature of the generation facility, which reduces the life of equipment including rotating machines, cables, transformers, capacitors, fuses, switching contacts, and surge suppressors. problems are caused by the harmon- ics creating additional losses and dielectric stresses in capacitors and cables, increasing currents in windings of rotating machinery and transformers and noise emissions in many products, and bringing about early failure of fuses and other safety components. they also can cause skin effect, which creates problems in cables, transformers, and rotating machinery. this is why power companies are concerned with the growth of smps, electronic voltage regulators, and converters that will cause thd levels to increase to unacceptable levels. having the boost preconverter voltage higher than the input voltage forces the load to draw current in phase with the ac main line voltage that, in turn, rids harmonic emissions. modes of operation there are two modes of pfc operation; discontinuous and continuous mode. discontinuous mode is when the boost converters mosfet is turned on when the inductor current reaches zero, and turned off when the inductor current meets the desired input reference voltage as shown in figure 9. in this way, the input current waveform follows that of the input v oltage, therefore attaining a power factor of close to 1. figure 9. discontinuous mode of operation discontinuous mode can be used for smps that have power levels of 300w or less. in comparison with continuous mode devices, discontinuous ones use larger cores and have higher i 2 r and skin effect losses due to the larger inductor current swings. with the increased swing a larger input ?ter is also required. on the positive side, since discontinuous mode devices switch the boost mosfet on when the inductor cur- rent is at zero, there is no reverse recovery current (i rr ) speci?ation required on the boost diode. this means that less expensive diodes can be used. continuous mode typically suits smps power levels greater than 300w. this is where the boost converters mosfet does not switch on when the boost inductor is at zero current, instead the current in the energy transfer inductor never reaches zero during the switching cycle (figure 10). w ith this in mind, the voltage swing is less than in discontin- uous mode?esulting in lower i 2 r losses?nd the lower ripple current results in lower inductor core losses. less v oltage swing also reduces emi and allows for a smaller input ?ter to be used. since the mosfet is not being turned on when the boost inductors current is at zero, a v ery fast rev erse recovery diode is required to keep losses to a minimum. i l v in l v o v l i l v o v l vi vi v in 0 0 0 v in i max pwm control v1 d1 d2 cin iin lp q1 + ? rtn vo inductor peak current inductor current inductor average current gating signal
AN-42047 application note 4 rev. 0.9.0 8/19/04 figure 10. continuous mode of operation f airchild offers products for all discontinuous and continu- ous modes of pfc operation, including critical conduction mode (fan7527b), average current mode (fan4810), and input current shaping mode (fan4803). discontinuous mode: critical conduction mode a critical conduction mode device is a voltage mode device that works in the area between continuous and dis- continuous mode. to better explain critical conduction mode lets look at the difference between discontinuous and contin- uous mode in a smps design such as a ?back converter. in discontinuous mode, the primary winding of the transformer has a dead time once the switch is turned off (including is a minimum winding reset time) and before it is energized again (figure 11). figure 11. discontinuous mode, flyback power supply ip (primary current) in continuous mode, the primary winding has not fully depleted all of its energy. figure 12 shows that the primary winding does not start energizing at zero, rather residual current still resides in the winding. figure 12. continuous mode, flyback power supply i p (primary current) in critical conduction mode there are no dead-time gaps between cycles and the inductor current is always at zero before the switch is turned on. in figure 9, the ac line current is shown as a continuous waveform where the peak switch current is twice the average input current. in this mode, the operation frequency varies with constant on time. continuous mode: a verage current mode the heart of the pfc controller is the gain modulator. the g ain modulator has two inputs and one output. as shown in figure 13, the left input to the gain modulator block is called the reference current (i sine ). the reference current is the input current that is proportional to the input full-wave-recti- ?d voltage. the other input, located at the bottom of the g ain modulator, is from the voltage error ampli?r. the error ampli?r takes in the output voltage (using a voltage divider) after the boost diode and compares it to a reference voltage of 5 volts. the error ampli?r will have a small bandwidth so as not to let any abrupt changes in the output or ripple errati- cally affect the output of the error ampli?r. the gain modulator multiplies or is the product of the refer- ence current and the error voltage from the error ampli?r (de?ed by the output voltage). figure 13 shows the critical blocks within the ml4821 (a stand alone pfc controller) to produce a power factor of greater than 95 percent. these critical blocks include the cur- rent control loop, voltage control loop, pwm control, and the gain modulator. the purpose of the current control loop is to force the current wa v eform to follow the shape of the voltage waveform. in order for the current to follow the voltage, the internal cur- rent ampli?r has to be designed with enough bandwidth 1 to capture enough of the harmonics of the output voltage. this bandwidth is designed using external capacitors and resis- tors. once the bandwidth has been designed which in most cases is a few khz (to not be affected by any abrupt tran- sient), it uses information from the gain modulator to adjust the pwm control that controls whether the power mosfet is switched on or off. the gain modulator and the voltage control loop 2 work together to sample the input current and output voltage, 3 respectively. these two measurements are taken and than compared against each other to determine if a gain should be applied to the input of the current control. this decision is than compared against a sample of the output current to determine the duty cycle of the pwm. the pwm control uses trailing-edge modulation as shown in figure 14. 1 the bandwidth is set by fswitching/6 2 the voltage control loop also needs to be bandwidth limited, again, this is designed using external passive components. 3 the output voltage of a continuous inductor current boost regulator has to be set above the maximum peak of the input voltage in order to function correctly as a pfc. the output should be 1.414 times the maximum input voltage. 0 0.5 1 1.5 2 2.5 3 inductor (line) current (a) i pk 0 i pk 0
application note AN-42047 rev. 0.9.0 8/19/04 5 figure 13. example of an average current mode pfc control (ml4821) figure 14. trailing-edge modulation 4 figure 15. typical average current mode waveform 4 trailing edge modulation is when the output switches on when the output of the comparator passes through the trailing edge of the sawtooth wave created. 2 current control loop v oltage control loop 3 4 5 7 14 ? + ? + ? + v ref inv ea out e/a i sine i gm gain modulator z i z f ia? ia+ ia out r s q osc clock r l i pr out ramp z cf 6 ? dbr + ac in dc in c + ? dc out d r c r s i gm i l i l i c i q i load i d r cl t on t s + ? input output current reference inductor current
AN-42047 application note 6 rev. 0.9.0 8/19/04 the line that goes through the saw tooth waveform is the out- put of the differential ampli?r within the current loop con- trol. the output of the differential ampli?r (located on the top of figure 13) goes into an r-s ?p ?p that controls the power mosfet. the average current mode waveform is shown in figure 14. figure 15 shows the waveform of what a typical average current pfc device looks like. continuous mode: input current shaping f airchilds fan4803 features input current shaping, another control method of the continuous current mode pfc. figure 16 shows the internal pfc block of the fan4803. unlike the conventional/typical average current mode pfc controller, the fan4803 does not need input voltage information and a multiplier. it changes the slope of an internal ramp according to the error ampli?r output voltage, while the current sense information and the ramp signal are used to determine the turn-on time. as shown in figure 17a, the switch is turned on when the current sense voltage meets the internal ramp sig- nal and the switch is turned off by the internal clock signal. to control the output voltage, the slope of the internal ramp signal is adjusted. by comparing figure 17a and figure 17b, one can see that the average current increases if the slope increases and decreases if the slope decreases. using the continuous mode characteristic, the following equations show that the inductor current is proportional to the sinusoidal waveform at the turn-on time. therefore the inductor current minimum value during one switching cycle follows the sinusoidal current reference as shown in figure 18. however, the inductor current peak value during one switching cycle is not controlled to follow the sinusoidal ref- erence. therefore the average inductor current might not be sinusoidal. to make the average inductor current close to the sinusoidal reference, the inductance has to be high enough to make the current ripple small. on l in l t di l v v = = : during on-time off l out in l t di l v v v = ? = ) ( : during off-time out in s off off in out on in v v t t t v v t v = ? = , ) ( : ccm condition out in s off cs v v veao t t veao vramp v = = = : switch off to on instant ) sin( ) ( ) sin( ) ( (min) t t t i i t v v veao t t i rs off o l l in out off o l + = = + figure 16. example of the input current shaping pfc controller (fan4803 r1 35 a 5v veao v c1 v i sense c 1 30pf 4 3 rp c comp i sense v out = 400v r comp c zero ? + comp gate output ?4
application note AN-42047 rev. 0.9.0 8/19/04 7 figure 17a. typical input current shaping pfc waveform figure 17b. typical input current shaping pfc waveform figure 18. input current shaping pfc waveform t t s t o t o + t off off t o +t s vcs average current vramp = v eao (t off / t s ) vcs = rs il vramp pfc out clock t o + t off off t o +t s vcs average current t t s t o vramp = v eao (t off / t s ) vcs = rs il vramp pfc out clock current reference inductor current
AN-42047 application note 8 rev. 0.9.0 8/19/04 leading edge modulation/trailing edge modulation (lem/tem) versus trailing edge modulation/trailing edge modulation (tem/tem) leading edge/trailing edge modulation is a patented fair- child technique to synchronize the pfc controller to the pwm controller. typically tem/tem is used in pfc/pwm controllers which results in an additional step as well as a larger pfc bulk capacitor (as shown below). t railing edge modulation/trailing edge modulation (tem/tem) figure 19a shows the pfc inductor being energized. figure 19b shows the energy from the inductor being trans- ferred into the pfc bulk capacitor. when the pwm switch is closed, as shown in figure 19c, the energy stored within the pfc bulk capacitor is used to drive the load. every time this cycle is repeated, the pfc bulk capacitor has to be fully charged since it is fully discharged when the pwm switch is closed. f airchild patented leading edge modulation/ t railing edge modulation (lem/tem) te c hnique in let/tem the pfc and pwm switches are tied together, b ut opening and closing 180 degrees out of phase, so when the pfc switch is open the pwm switch is closed and vice v ersa. initially when the pfc switch is closed, the pfc inductor is energized, once the pwm switch is closed, both the output and the pfc bulk capacitor are energized. figures 20a and 20b show that upon repetition of this cycle, the pfc b ulk capacitor does not have to be that large because it is not powering the output all by itself, the pfc inductor is helping out as well.
application note AN-42047 rev. 0.9.0 8/19/04 9 signal ac pfc bulk cap output cap pfc bulk cap output cap pfc bulk cap output cap closed open open open open closed current current current pfc section figure 19a. energizing the pfc inductor figure 19b. charging the pfc bulk capacitor figure 19c. powering the output pwm section signal ac pfc section pwm section signal ac pfc section pwm section vout gnd vout gnd vout gnd
AN-42047 application note 10 rev. 0.9.0 8/19/04 pfc bulk cap output cap pfc bulk cap output cap open open closed current signal ac pfc section pwm section signal ac pfc section pwm section closed current vout gnd vout gnd figure 20a. energizing the pfc inductor figure 20b. charging the pfc bulk capacitor and powering the output conclusion power companies do not get excited over low power factor driven devices, plus the extra cost of unused or wasted power can be quite large. this is why pfc on the device side has become an important part of the ?al power system design for so many products. there are many standards in place (example, en 61000-3-2) to drive power consumption to a power factor of 1 and keep total harmonic distortion to a minimum. depending on the output power and the designers needs, a smps can be designed with either a discontinuous or continuous mode stand alone pfc controller, or a continu- ous pfc/pwm mode device can be used. pfc controllers are forecasted to grow to $175 million in 2006, and stan- dards are reducing the minimum power limits on systems that require pfc, more and more pfc controllers will be used.
AN-42047 application note 8/19/04 0.0m 001 stock#an30042047 ? 2004 fairchild semiconductor corporation disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com

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