1 industrial temperature range idt74alvc1g07 3.3v cmos single gate buffer/driver gnd 2 3 4 5 1 a v cc nc y so5-1 february 2000 1999 integrated device technology, inc. dsc-5415/- c idt74alvc1g07 industrial temperature range functional block diagram 3.3v cmos single gate buffer/driver with open drain output applications: ? 3.3v high speed systems ? 3.3v and lower voltage computing systems features: C 0.5 micron cmos technology C esd > 2000v per mil-std-883, method 3015; > 200v using machine model (c = 200pf, r = 0) Cv cc = 3.3v 0.3v, normal range Cv cc = 1.65v to 3.6v, extended range Cv cc = 2.5v 0.2v C cmos power levels (0.4 w typ. static) C rail-to-rail output swing for increased noise margin C available in psop package pin configuration psop top view y a 24 pin description note: 1. h = high voltage level l = low voltage level function table (1) pin names description a data input y data output nc no internal connection description: this buffer/driver is built using advanced dual metal cmos technology. the outputs of the alvc1g07 device are open-drain and can be connected to other open-drain outputs to implement active-low wired-or or active-high wired-and functions. the maximum sink current is 24ma. the alvc1g07 has been designed with a 24ma output driver. this driver is capable of driving a moderate to heavy load while maintaining speed performance. input output ay hh ll drive features for a lvc 1g07: C high output drivers: 24ma C suitable for heavy loads
2 industrial temperature range idt74alvc1g07 3.3v cmos single gate buffer/driver dc electrical characteristics over operating range following conditions apply unless otherwise specified: operating condition: ta = C 40c to +85c, v cc = 2.3v to 3.6v symbol parameter test conditions min. typ. (1) max. unit v ih input high voltage level v cc = 1.65v to 1.95v 0.65 x v cc v v cc = 2.3v to 2.7v 1.7 v cc = 2.7v to 3.6v 2 v il input low voltage level v cc = 1.65v to 1.95v 0.35 x v cc v v cc = 2.3v to 2.7v 0.7 v cc = 2.7v to 3.6v 0.8 i ih input high current v cc = 3.6v v i = v cc 5a i il input low current v cc = 3.6v v i = gnd 5 i ozh high impedance output current v cc = 3.6v v o = v cc 10a i ozl (3-state output pins) v o = gnd 10 a v ik clamp diode voltage v cc = 2.3v, i in = C 18ma C 0.7 C 1.2 v v h input hysteresis v cc = 3.3v 100 mv i ccl i cch i ccz quiescent power supply current v cc = 3.6v v in = gnd or v cc 0.110 a d i cc quiescent power supply current variation one input at v cc - 0.6v, other inputs at v cc or gnd 750 a alvc 1g link absolute maximum ratings (1) symbol description max. unit v term (2) terminal voltage with respect to gnd C 0.5 to + 4.6 v v term (3) terminal voltage with respect to gnd C0.5 to v cc + 0.5 v t stg storage temperature C 65 to + 150 c i out dc output current C 50 to + 50 ma i ik continuous clamp current, v i < 0 or v i > v cc 50 ma i ok continuous clamp current, v o < 0 C 50 ma i cc i ss continuous current through each v cc or gnd 100 ma alvc 1g link capacitance (t a = +25 o c, f = 1.0mhz) symbol parameter (1) conditions typ. max. unit c in input capacitance v in = 0v 5 7 pf c out output capacitance v out = 0v 7 9 pf c i/o i/o port capacitance v in = 0v 7 9 pf alvc 1g link notes: 1. stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. v cc terminals. 3. all terminals except v cc . note: 1. as applicable to the device type. note: 1. typical values are at v cc = 3.3v, +25c ambient.
3 industrial temperature range idt74alvc1g07 3.3v cmos single gate buffer/driver output drive characteristics operating characteristics, t a = 25 o c switching characteristics (1) note: 1. v ih and v il must be within the min. or max. range shown in the dc electrical characteristics over operating range table for the appropriate v cc range. t a = C 40c to + 85c. note: 1. see test circuits and waveforms. t a = C 40c to + 85c. v cc = 1.8v 0.15v v cc = 2.5v 0.2v v cc = 3.3v 0.3v symbol parameter test conditions typical typical typical unit c pd power dissipation capacitance c l = 0pf, f = 10mhz 4 5 6 pf symbol parameter test conditions (1) min. max. unit v ol output low voltage v cc = 1.65v to 3.6v i ol = 0.1ma 0.2 v v cc = 1.65v i ol = 4ma 0.45 v cc = 2.3v i ol = 6ma 0.4 i ol = 12ma 0.7 v cc = 2.7v i ol = 12ma 0.4 v cc = 3.0v i ol = 24ma 0.55 v cc = 1.8v 0.15v v cc = 2.5v 0.2v v cc = 2.7v v cc = 3.3v 0.3v symbol parameter min. max. min. max. min. max. min. max. unit t plz t pzl a to y 1 6 0.5 3 ? 3.3 1 2.8 ns
4 industrial temperature range idt74alvc1g07 3.3v cmos single gate buffer/driver open v load gnd v cc pulse generator d.u.t. 500 w 500 w c l r t v in v out (1, 2) alvc 1g link data input 0v 0v 0v 0v t rem timing input asynchronous control synchronous control t su t h t su t h v ih v t v ih v t v ih v t v ih v t low-high-low pulse high-low-high pulse v t t w v t alvc 1g link same phase input transition opposite phase input transition 0v 0v v oh v ol t plh t phl t phl t plh output v ih v t v t v ih v t control input t plz 0v output normally low t pzh 0v switch closed output normally high enable disable switch open t phz 0v v lz v oh v t v t t pzl v load/2 v load/2 v ih v t v ol v hz alvc 1g link alvc 1g link alvc 1g link test cir cuits and w a veforms: test conditions propagation delay test circuits for all outputs enable and disable times set-up, hold, and release times switch position pulse width symbol v cc (1) = 3.3v 0.3v v cc (1) = 2.7v v cc (2) = 2.5v 0.2v unit v load 662 x vccv v ih 2.7 2.7 vcc v v t 1.5 1.5 vcc / 2 v v lz 300 300 150 mv v hz 300 300 150 mv c l 50 50 30 pf alvc 1g link notes: 1. pulse generator for all pulses: rate 10mhz; t f 2.5ns; t r 2.5ns. 2. pulse generator for all pulses: rate 10mhz; t f 2ns; t r 2ns. definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. note: 1. diagram shown for input control enable-low and input control disable-high. test switch t pzl t plz v load t phz /t pzh v load
5 industrial temperature range idt74alvc1g07 3.3v cmos single gate buffer/driver open v load gnd v cc pulse generator d.u.t. 1000 w 1000 w c l r t v in v out (1) alvc 1g link data input 0v 0v 0v 0v t rem timing input asynchronous control synchronous control t su t h t su t h v ih v t v ih v t v ih v t v ih v t low-high-low pulse high-low-high pulse v t t w v t alvc 1g link same phase input transition opposite phase input transition 0v 0v v oh v ol t plh t phl t phl t plh output v ih v t v t v ih v t control input t plz 0v output normally low t pzh 0v switch closed output normally high enable disable switch open t phz 0v v lz v oh v t v t t pzl v load/2 v load/2 v ih v t v ol v hz alvc 1g link alvc 1g link alvc 1g link test conditions propagation delay test circuits for all outputs enable and disable times set-up, hold, and release times switch position pulse width 1.8v 0.15v test cir cuits and w a veforms: symbol v cc (1) = 1.8v 0.15v unit v load 2 x v cc v v ih v cc v v t v cc / 2 v v lz 150 mv v hz 150 mv c l 30 pf alvc 1g link definitions: c l = load capacitance: includes jig and probe capacitance. r t = termination resistance: should be equal to z out of the pulse generator. note: 1. diagram shown for input control enable-low and input control disable-high. note: 1. pulse generator for all pulses: rate 10mhz; t f 2ns; t r 2ns. test switch t pzl t plz v load t phz /t pzh v load
6 industrial temperature range idt74alvc1g07 3.3v cmos single gate buffer/driver *to search for sales office near you, please click the sales button found on our home page or dial the 800# above and press 2. the idt logo is a registered trademark of integrated device technology, inc. ordering information corporate headquarters for sales: 2975 stender way 800-345-7015 or 408-727-6116 santa clara, ca 95054 fax: 408-492-8674 www.idt.com* picogate-logic (dy) packages due to their small size, picogate-logic packages require more complex symbolization guidelines. idts 5-pin psop (dy) packaged devices utilize a three-symbol name rule. the first symbol denotes device technology, the second symbol denotes device function, and t he third symbol denotes a wafer fab/assembly site code for internal tracking. examples: 1. a picogate-logic device with package code lr* is an idt74lvc1g79a. 2. a picogate-logic device with package code gc* is an idt74alvc1g04. picogate-logic (dy) package symbolization guidelines note: 1. code to be determined. technology code alvc g alvch j lvc l lvch (1) function code 00 a 02 b 04 c u04 d 06 t 07 v 08 e 14 f 32 g 79 r 86 h 125 m 126 n 132 y idt xx alvc xxx xx package device type temp. range dy 74 plastic small outline package (so5-1) single gate buffer/driver with open drain output, +24ma C 40c to +85c 1g07
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