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features description applications opa615 sbos299b ? february 2004 ? revised july 2005 wide-bandwidth, dc restoration circuit propagation delay: 1.9ns the opa615 is a complete subsystem for very fast and precise dc restoration, offset clamping, and bandwidth: low-frequency hum suppression of wideband ampli- ota: 710mhz fiers or buffers. although it is designed to stabilize the comparator: 730mhz performance of video signals, the circuit can also be low input bias current: 1a used as a sample-and-hold amplifier, high-speed sample-and-hold switching integrator, or peak detector for nanosecond pulses. transients: 5mv the device features a wideband operational transconductance amplifier (ota) with a sample-and-hold feedthrough high-impedance cascode current source output and rejection: 100db fast and precise sampling comparator that together charge injection: 40fc set a new standard for high-speed applications. both hold command delay time: 2.5ns the ota and the sampling comparator can be used as stand-alone circuits or combined to form a more ttl/cmos hold control complex signal processing stage. the self-biased, bipolar ota can be viewed as an ideal volt- age-controlled current source and is optimized for low broadcast/hdtv equipment input bias current. the sampling comparator has two telecommunications equipment identical high-impedance inputs and a current source output optimized for low output bias current and offset high-speed data acquisition voltage; it can be controlled by a ttl-compatible cad monitors/ccd image processing switching stage within a few nanoseconds. the nanosecond pulse integrator/peak transconductance of the ota and sampling detector comparator can be adjusted by an external resistor, pulse code modulator/demodulator allowing bandwidth, quiescent current, and gain complete video dc level restoration trade-offs to be optimized. sample-and-hold amplifier the opa615 is available in both an so-14 sur- shc615 upgrade face-mount and an msop-10 package. please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. production data information is current as of publication date. copyright ? 2004?2005, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters.
s w i t c h i n g s t a g e s a m p l i n g c o m p a r a t o r ( s c ) o p a 6 1 5 b i a s i n g o t a h o l d c o n t r o l e m i t t e r 2 c o l l e c t o r ( i o u t ) 1 2 1 s / h i n + s / h i n - + v c c - v c c i q a d j u s t s o t a b a s e c h o l d g r o u n d 3 4 9 7 1 0 1 1 1 3 5
absolute maximum ratings (1) opa615 sbos299b ? february 2004 ? revised july 2005 this integrated circuit can be damaged by esd. texas instruments recommends that all integrated circuits be handled with appropriate precautions. failure to observe proper handling and installation procedures can cause damage. esd damage can range from subtle performance degradation to complete device failure. precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ordering information (1) specified package temperature package transport media, product package designator range marking ordering number quantity opa615id rails, 50 opa615 so-14 d ?40 c to +85 c opa615id opa615idr tape and reel, 2500 opa615idgst tape and reel, 250 opa615 msop-10 (2) dgs ?40 c to +85 c bjt opa615idgsr tape and reel, 2500 (1) for the most current package and ordering information, see the package option addendum at the end of this document, or see the ti website at www.ti.com . (2) available q1 2006. supply voltage 6.5v differential input voltage v s common-mode input voltage range v s hold control pin voltage ?v s ? +v s storage temperature range ?40 c to +125 c lead temperature (10s soldering) +260 c junction temperature (t j ) +150 c esd ratings: human body model (hbm) (2) 1000v charge device model (cdm) 1000v machine model (mm) 150v (1) stresses above these ratings may cause permanent damage. exposure to absolute maximum conditions for extended periods may degrade device reliability. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied. (2) pin 2 for the so-14 package and pin 1 for the msop-10 package > 500v hbm. 2 www .ti.com
opa615 sbos299b ? february 2004 ? revised july 2005 block diagrams pin configurations 3 www .ti.com s w i t c h i n g s t a g e s a m p l i n g c o m p a r a t o r ( s c ) o p a 6 1 5 b i a s i n g o t a h o l d c o n t r o l e m i t t e r 2 c o l l e c t o r ( i o u t ) 1 2 1 s / h i n + s / h i n - + v c c - v c c i q a d j u s t s o t a b a s e c h o l d g r o u n d 3 4 9 7 1 0 1 1 1 3 5 s w i t c h i n g s t a g e s a m p l i n g c o m p a r a t o r ( s c ) o p a 6 1 5 b i a s i n g o t a h o l d c o n t r o l e m i t t e r 1 c o l l e c t o r ( i o u t ) 9 s / h i n + s / h i n - + v c c - v c c s o t a b a s e c h o l d g r o u n d 2 3 6 57 8 1 0 4 msop?10 so?14 12 3 4 5 1 0 98 7 6 + v c c i o u t , c o l l e c t o r , c s / h i n - s / h i n + g r o u n d e m i t t e r , e b a s e , b c h o l d - v c c h o l d c o n t r o l b j t m s o p ? 1 0 n o t e : ( 1 ) n o c o n n e c t i o n . 12 3 4 5 6 7 1 4 1 3 1 2 1 1 1 0 98 n c ( 1 ) + v c c i o u t , c o l l e c t o r , c s / h i n - s / h i n + g r o u n d n c ( 1 ) i q a d j u s t e m i t t e r , e b a s e , b c h o l d - v c c n c ( 1 ) h o l d c o n t r o l o p a 6 1 5 s o ? 1 4 t o p v i e w
electrical characteristics: v s = 5v opa615 sbos299b ? february 2004 ? revised july 2005 r l = 100 w , r q = 300 w , and r in = 50 w , unless otherwise noted. opa615id, opa615idgs typ min/max over temperature 0 c to ?40 c to min/ test parameter conditions +25 c +25 c (2) 70 c (3) +85 c (3) units max level (1) ac performance (ota) see figure 36 b small signal bandwidth (b to e) v o = 200mv pp , r l = 500 w 710 mhz min c v o = 1.4v pp , r l = 500 w 770 mhz min c v o = 2.8v pp , r l = 500 w 230 mhz min c large signal bandwidth (b to e) v o = 5v pp , r l = 500 w 200 mhz min c small signal bandwdith (b to c) g= +1, v o = 200mv pp , r l = 100 w 440 mhz min c g= +1, v o = 1.4v pp , r l = 100 w 475 mhz min c g= +1, v o = 2.8v pp , r l = 100 w 230 mhz min c large signal bandwidth (b to c) g= +1, v o = 5v pp , r l = 100 w 230 mhz min c rise-and-fall time (b to e) v o = 2v pp , r l = 500 w 2 ns max c rise-and-fall time (b to c) g = +1, v o = 2v pp , r l = 100 w 2 ns max c harmonic distortion (b to e) r e = 100 w 2nd-harmonic v o = 1.4v pp , f = 30mhz ?62 ?50 ?48 ?47 dbc min b 3rd-harmonic v o = 1.4v pp , f = 30mhz ?47 ?40 ?35 ?33 dbc min b input voltage noise base input, f > 100khz 4.6 6.2 6.9 7.4 nv/ ? hz max b input current noise base input, f > 100khz 2.5 3.1 3.6 3.9 pa/ ? hz max b input current noise emitter input, f > 100khz 21 23 25 27 pa/ ? hz max b dc performance (ota) see figure 37 b transconductance (v-base to i-collector) v b = 5mv pp , r c = 0 w , r e = 0 w 72 65 63 58 ma/v min a b-input offset voltage v b = 0v, r c = 0v, r e = 100 w 4 40 47 50 mv max a b-input offset voltage drift v b = 0v, r c = 0v, r e = 100 w 160 160 v/ c max b b-input bias current v b = 0v, r c = 0v, r e = 100 w 0.5 0.9 1.5 1.7 a max a b-input bias current drift v b = 0v, r c = 0v, r e = 100 w 12 12 na/ c max b e-input bias current v b = 0v, v c = 0v 35 110 120 135 a min a e-input bias current drift v b = 0v, v c = 0v 200 250 na/ c max b c-output bias current v b = 0v, v c = 0v 35 100 110 125 a max a c-output bias current v b = 0v, v c = 0v 200 250 na/ c max b input (ota base) see figure 37 b input voltage range r e = 100 w 3.4 3.2 3.1 3.0 v min b input impedance b-input 7 || 1.5 m w || pf typ c ota power-supply rejection ratio v s to v io at e-input 54 49 47 46 db min a (?psrr) output (ota collector) see figure 37 b output voltage compliance i e = 2ma 3.5 3.4 3.4 3.4 v min a output current v c = 0v 20 18 17 17 ma min a output impedance v c = 0v 1.2 || 2 m w || pf typ c comparator performance ac performance output current bandwidth i o < 4ma pp 730 520 480 400 mhz min b output current rise and fall time i io = 2ma pp , r l = 50 w at c hold 1.4 1.5 1.7 2 ns max b control propagation delay time hold 3 track and track 3 hold 2.5 ns typ c signal propagation delay time s/h in+ ? s/h in? to c hold current 1.9 ns typ c input differential voltage noise s/h in+ ? s/h in? 6 7.5 8 9 nv/ ? hz max b charge injection track-to-hold 40 fc typ c feedthrough rejection hold mode, v in = 1v pp , f < 20mhz 100 db typ c (1) test levels: (a) 100% tested at +25 c. over temperature limits set by characterization and simulation. (b) limits set by characterization and simulation. (c) typical value only for information. (2) junction temperature = ambient for +25 c tested specifications. (3) junction temperature = ambient at low temperature limit; junction temperature = ambient +23 c at high temperature limit for over temperature specifications. 4 www .ti.com
opa615 sbos299b ? february 2004 ? revised july 2005 electrical characteristics: v s = 5v (continued) r l = 100 w , r q = 300 w , and r in = 50 w , unless otherwise noted. opa615id, opa615idgs typ min/max over temperature 0 c to ?40 c to min/ test parameter conditions +25 c +25 c (2) 70 c (3) +85 c (3) units max level (1) dc performance input bias current s/h in+ = s/h in? = 0v 1 3 3.5 4.0 a max a output offset current s/h in+ = s/h in? = 0v, track mode 10 50 70 80 a max a input impedance s/h in+ and s/h in? 200 || 1.2 k w || pf typ c input differential voltage range s/h in+ ? s/h in? 3.0 v typ c input common-mode voltage range s/h in+ and s/h in? 3.2 v typ c common-mode rejection ratio (cmrr) 2 50 55 60 a/v max a output voltage compliance c hold pin 3.5 v typ c output current c hold pin 5 3 2.5 2.0 ma min a output impedance c hold pin 0.5 || 1.2 m w || pf typ c transconductance s/h in+ ? s/h in? to c hold current 35 21 20 19 ma/v min a v in = 300mv pp minimum hold logic high voltage tracking high 2 2 2 v max a maximum hold logic low voltage holding low 0.8 0.8 0.8 v min a logic high input current v hold = +5v 0.5 1 1 1.2 a max a logic low input current v hold = 0v 140 200 220 230 a max a comparator power-supply rejection s/h in+ = s/h in? = 0v, track mode 2 50 55 60 a/v max a ratio (psrr) power supply specified operating voltage 5 v typ c minimum operating voltage 4 4 4 v min b maximum operating voltage 6.2 6.2 6.2 v max a maximum quiescent current r q = 300 w (4) 13 14 16 17 ma max a minimum quiescent current r q = 300 w (4) 13 12 11 9 ma min a thermal characteristics specified operating range d package ?40 to +85 c typ c thermal resistance q ja junction-to-ambient dgs msop-10 150 c/w typ c d so-14 100 c/w typ c (4) so-14 package only. 5 www .ti.com
typical characteristics ota opa615 sbos299b ? february 2004 ? revised july 2005 t a = +25 c, i q = 13ma, unless otherwise noted. ota transconductance vs frequency ota transconductance vs quiescent current figure 1. figure 2. ota transconductance vs input voltage ota transfer characteristics figure 3. figure 4. ota-c small signal pulse response ota-c large signal pulse response figure 5. figure 6. 6 www .ti.com 1 2 0 1 0 0 8 0 6 0 4 0 2 00 f r e q u e n c y ( h z ) t r a n s c o n d u c t a n c e ( m a / v ) 1 0 k 1 m 1 0 m 1 0 0 m 1 g i o u t v i n 5 0 w 5 0 w i q = 1 4 . 3 m a ( 8 9 m a / v ) , r q = 0 w i q = 1 3 m a ( 7 2 m a / v ) , r q = 3 0 0 w i q = 9 . 6 m a ( 2 8 m a / v ) , r q = 2 k w v i n = 1 0 m v p p 1 2 0 1 0 0 8 0 6 0 4 0 3 00 q u i e s c e n t c u r r e n t ( m a ) t r a n s c o n d u c t a n c e ( m a / v ) 8 9 1 0 1 1 1 2 1 3 1 4 1 5 v i n = 1 0 0 m v p p i o u t v i n 5 0 w 5 0 w 1 0 0 9 0 8 0 7 0 6 0 5 0 4 0 3 0 2 0 i n p u t v o l t a g e ( m v ) t r a n s c o n d u c t a n c e ( m a / v ) - 5 0 - 4 0 - 3 0 - 2 0 - 1 0 0 1 0 2 0 3 0 4 0 5 0 s m a l l ? s i g n a l a r o u n d i n p u t v o l t a g e i q = 9 . 6 m a i q = 1 4 . 3 m a i q = 1 3 m a 2 0 1 5 1 05 0 - 5 - 1 0 - 1 5 - 2 0 o t a i n p u t v o l t a g e ( m v ) o t a o u t p u t c u r r e n t ( m a ) - 2 0 0 0 2 0 0 - 1 5 0 - 1 0 0 - 5 0 5 0 1 0 0 1 5 0 i q = 9 . 6 m a i q = 1 4 . 3 m a i q = 1 3 m a i o u t v i n 5 0 w 5 0 w 0 . 1 5 0 . 1 0 0 . 0 50 - 0 . 0 5 - 0 . 1 0 - 0 . 1 5 t i m e ( 1 0 n s / d i v ) o u t p u t v o l t a g e ( v ) f i n = 1 0 m h z g = + 1 v / v v i n = 0 . 2 v p p 32 1 0 - 1 - 2 - 3 t i m e ( 1 0 n s / d i v ) o u t p u t v o l t a g e ( v ) f i n = 1 0 m h z g = + 1 v / v v i n = 4 v p p
opa615 sbos299b ? february 2004 ? revised july 2005 typical characteristics (continued) t a = +25 c, i q = 13ma, unless otherwise noted. ota b-input resistance vs quiescent current ota c-output resistance vs quiescent current figure 7. figure 8. ota e-output resistance vs quiescent current ota input voltage and current noise density figure 9. figure 10. ota b-input offset voltage and bias current ota transfer characteristics vs input voltage vs temperature figure 11. figure 12. 7 www .ti.com 1 4 0 1 2 0 1 0 0 8 0 6 0 4 0 2 00 q u i e s c e n t c u r r e n t ( m a ) o t a b ? i n p u t r e s i s t a n c e ( m w ) 8 9 1 0 1 2 1 1 1 3 1 4 1 5 1 8 1 6 1 4 1 2 1 08 6 4 2 0 q u i e s c e n t c u r r e n t ( m a ) o t a c ? o u t p u t r e s i s t a n c e ( m w ) 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 8 0 1 6 0 1 4 0 1 2 0 1 0 0 8 0 6 0 4 0 2 00 q u i e s c e n t c u r r e n t ( m a ) o t a e ? o u t p u t r e s i s t a n c e ( w ) 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 0 0 1 01 f r e q u e n c y ( h z ) v o l t a g e n o i s e d e n s i t y ( n v / h z ) c u r r e n t n o i s e d e n s i t y ( p a / h z ) 1 0 0 1 k 1 0 k 1 0 0 k 1 m 1 0 m b ? i n p u t c u r r e n t n o i s e ( 2 . 5 p a / h z ) b ? i n p u t v o l t a g e n o i s e ( 4 . 6 n v / h z ) e ? i n p u t c u r r e n t n o i s e ( 2 1 . 0 p a / h z ) 2 . 0 1 . 5 1 . 0 0 . 50 - 0 . 5 - 1 . 0 - 1 . 5 - 2 . 0 a m b i e n t t e m p e r a t u r e ( c ) b ? i n p u t o f f s e t v o l t a g e ( m v ) 0 . 1 0 0 . 0 5 0- 0 . 0 5 - 0 . 1 0 b ? i n p u t b i a s c u r r e n t ( m v ) - 4 0 - 2 0 1 2 0 0 2 0 4 0 6 0 8 0 1 0 0 b ? i n p u t b i a s c u r r e n t b ? i n p u t o f f s e t v o l t a g e 3 5 3 0 2 5 2 0 1 5 1 05 0 - 5 - 1 0 - 1 5 - 2 0 - 2 5 - 3 0 - 3 5 o t a ? b i n p u t v o l t a g e ( m v ) o t a ? c o u t p u t c u r r e n t ( m a ) - 3 . 5 - 3 - 2 . 5 - 2 - 1 . 5 - 1 - 0 . 5 0 0 . 5 1 1 . 5 2 2 . 5 3 3 . 5 i o u t v i n d e g e n e r a t e d e ? i n p u t r e = r l = 1 0 0 w 1 0 0 w 1 0 0 w i q = 1 4 . 3 m a i q = 1 3 m a i q = 9 . 6 m a
opa615 sbos299b ? february 2004 ? revised july 2005 typical characteristics (continued) t a = +25 c, i q = 13ma, unless otherwise noted. ota-e output frequency response ota-e output pulse response figure 13. figure 14. ota-c output frequency response ota-e output harmonic distortion vs frequency figure 15. figure 16. ota-c output harmonic distortion vs frequency ota quiescent current vs r q figure 17. figure 18. 8 www .ti.com 2 0 0 1 6 0 1 2 0 8 0 4 00 - 4 0 - 8 0 - 1 2 0 - 1 6 0 - 2 0 0 t i m e ( 2 0 n s / d i v ) o u t p u t v o l t a g e ( m v ) 2 . 0 1 . 6 1 . 2 0 . 8 0 . 4 0- 0 . 4 - 0 . 8 - 1 . 2 - 1 . 6 - 2 . 0 o u t p u t v o l t a g e ( v ) v i n v o 5 0 w 1 0 0 w 5 0 0 w s m a l l ? s i g n a l 8 0 m v l e f t s c a l e l a r g e ? s i g n a l 1 . 6 v r i g h t s c a l e 30 - 3 - 6 - 9 - 1 2 - 1 5 f r e q u e n c y ( h z ) g a i n ( d b ) 1 m 1 0 m 1 0 0 m 1 g v i n v o 5 0 w 1 0 0 w 5 0 0 w v o = 0 . 6 v p p v o = 1 . 4 v p p v o = 5 v p p v o = 2 . 8 v p p v o = 0 . 2 v p p - 4 0 - 4 5 - 5 0 - 5 5 - 6 0 - 6 5 - 7 0 f r e q u e n c y ( m h z ) h a r m o n i c d i s t o r t i o n ( d b c ) 1 1 0 1 0 0 v o u t = 1 . 4 v p p 2 n d ? h a r m o n i c 3 r d ? h a r m o n i c v i n v o u t 5 0 w 1 0 0 w 30 - 3 - 6 - 9 - 1 2 - 1 5 f r e q u e n c y ( h z ) g a i n ( d b ) 1 m 1 0 m 1 0 0 m 1 g v o = 0 . 6 v p p v o = 1 . 4 v p p v o = 0 . 2 v p p v o = 2 . 8 v p p v o = 5 v p p v i n v o 5 0 w 1 0 0 w 1 0 0 w - 2 0 - 2 5 - 3 0 - 3 5 - 4 0 - 4 5 - 5 0 - 5 5 - 6 0 f r e q u e n c y ( m h z ) h a r m o n i c d i s t o r t i o n ( d b c ) 1 1 0 1 0 0 v o u t = 1 . 4 v p p v o u t v i n 5 0 w 1 0 0 w 1 0 0 w 3 r d ? h a r m o n i c 2 n d ? h a r m o n i c 1 6 1 5 1 4 1 3 1 2 1 1 1 09 8 q u i e s c e n t c u r r e n t ( m a ) 0 . 1 1 1 0 1 0 0 1 k 1 0 k 1 0 0 k r q ( w ) + i q - i q
sota (sampling operational transconductance amplifier) opa615 sbos299b ? february 2004 ? revised july 2005 typical characteristics (continued) t a = +25 c, i q = 13ma, unless otherwise noted. sota transconductance vs frequency sota transconductance vs quiescent current figure 19. figure 20. sota transconductance vs input voltage sota transfer characteristics figure 21. figure 22. sota pulse response sota pulse response figure 23. figure 24. 9 www .ti.com 4 0 3 0 2 0 1 00 f r e q u e n c y ( h z ) t r a n s c o n d u c t a n c e ( m a / v ) 1 m 1 0 m 1 0 0 m 1 g v i n 5 0 w i o u t + 5 v s o t a h o l d c o n t r o l 5 0 w v i n = 1 0 m v p p 4 0 3 0 2 0 1 00 q u i e s c e n t c u r r e n t ( m a ) t r a n s c o n d u c t a n c e ( m a / v ) 8 9 1 0 1 1 1 2 1 3 1 4 1 5 r q a d j u s t e d 4 5 4 0 3 5 3 0 2 5 2 0 1 5 1 05 0 i n p u t v o l t a g e ( m v ) t r a n s c o n d u c t a n c e ( m a / v ) - 1 0 0 - 8 0 - 6 0 - 4 0 - 2 0 0 2 0 4 0 6 0 8 0 1 0 0 s m a l l ? s i g n a l a r o u n d i n p u t v o l t a g e 86 4 2 0 - 2 - 4 - 6 - 8 s o t a i n p u t v o l t a g e ( m v ) s o t a o u t p u t c u r r e n t ( m a ) - 2 0 0 - 1 5 0 - 1 0 0 - 5 0 0 5 0 1 0 0 1 5 0 2 0 0 1 5 0 1 0 0 5 00 - 5 0 - 1 0 0 - 1 5 0 t i m e ( 1 0 n s / d i v ) o u t p u t v o l t a g e ( m v ) f i n = 2 0 m h z r l = 5 0 w i o u t = 4 m a p p t r i s e = 2 n s h o l d c o n t r o l = + 5 v 1 5 0 1 0 0 5 00 - 5 0 - 1 0 0 - 1 5 0 t i m e ( 1 0 n s / d i v ) o u t p u t v o l t a g e ( m v ) f i n = 2 0 m h z r l = 5 0 w i o u t = 4 m a p p t r i s e = 1 0 n s h o l d c o n t r o l = + 5 v
opa615 sbos299b ? february 2004 ? revised july 2005 typical characteristics (continued) t a = +25 c, i q = 13ma, unless otherwise noted. sota propagation delay vs overdrive sota propagation delay vs temperature figure 25. figure 26. sota propagation delay vs slew rate sota switching transients figure 27. figure 28. sota hold command delay time sota bandwidth vs output current swing figure 29. figure 30. 10 www .ti.com 1 . 3 1 . 2 1 . 1 1 . 0 0 . 9 0 . 8 i n p u t v o l t a g e ( m v ) t r a n s c o n d u c t a n c e ( m a / v ) 0 4 0 0 6 0 0 2 0 0 8 0 0 1 0 0 0 1 2 0 0 v o d 1 0 0 w 1 0 0 w v o d g n d s o t a v o d n e g a t i v e p o s i t i v e 2 . 0 1 . 8 1 . 6 1 . 4 1 . 2 1 . 0 0 . 8 0 . 6 0 . 4 0 . 20 t e m p e r a t u r e ( c ) p r o p a g a t i o n d e l a y ( n s ) - 4 0 - 2 0 1 2 0 0 2 0 4 0 6 0 8 0 1 0 0 f a l l i n g e d g e r i s i n g e d g e 1 05 0 - 5 - 1 0 t i m e ( 1 0 n s / d i v ) s w i t c h i n g t r a n s i e n t ( m v ) 1 0 0 w 1 0 0 w t t l 5 0 w v o u t o n ? o f f o f f ? o n 1 . 4 1 . 3 1 . 2 1 . 1 1 . 0 0 . 9 0 . 8 r i s e t i m e ( n s ) p r o p a g a t i o n d e l a y ( n s ) 0 3 4 5 1 2 6 7 8 9 1 0 p o s i t i v e n e g a t i v e v i n = 1 . 2 v p p - 0 . 6 v + 0 . 6 v 0 v 1 5 0 1 0 0 5 00 - 5 0 - 1 0 0 - 1 5 0 t i m e ( 1 0 n s / d i v ) o u t p u t v o l t a g e ( m v ) 2 . 5 2 . 0 1 . 5 1 . 0 0 . 5 0- 5 0 h o l d c o m m a n d ( v ) 63 0 - 3 - 6 - 9 - 1 2 - 1 5 f r e q u e n c y ( h z ) g a i n ( d b ) 1 m 1 0 m 1 0 0 m 2 g 1 g i o u t = 0 . 5 m a p p i o u t = 4 m a p p i o u t = 2 m a p p
opa615 sbos299b ? february 2004 ? revised july 2005 typical characteristics (continued) t a = +25 c, i q = 13ma, unless otherwise noted. sota feedthrough rejection vs frequency sota common-mode rejection vs frequency figure 31. figure 32. sota input bias current vs temperature sota output bias current vs temperature figure 33. figure 34. 11 www .ti.com 0 - 2 0 - 4 0 - 6 0 - 8 0 - 1 0 0 - 1 2 0 f r e q u e n c y ( h z ) f e e d t h r o u g h r e j e c t i o n ( d b ) 1 m 1 0 m 1 0 0 m 1 g h o l d c o n t r o l = 0 v ( o f f ? i s o l a t i o n ) 0 - 2 0 - 4 0 - 6 0 - 8 0 - 1 0 0 - 1 2 0 f r e q u e n c y ( h z ) c o m m o n ? m o d e r e j e c t i o n ( d b ) 1 0 0 k 1 m 1 0 m 1 g 1 0 0 m h o l d c o n t r o l = 5 v v + = v - 5 0 4 0 3 0 2 0 1 00 - 1 0 - 2 0 - 3 0 - 4 0 - 5 0 t e m p e r a t u r e ( c ) o u t p u t b i a s c u r r e n t ( m a ) - 4 0 - 2 0 1 2 0 0 2 0 4 0 6 0 8 0 1 0 0 h o l d c o n t r o l = 5 v v + = v - = 0 v 0 . 4 0 0 . 3 5 0 . 3 0 0 . 2 5 0 . 2 0 0 . 1 5 0 . 1 0 0 . 0 50 t e m p e r a t u r e ( c ) i n p u t b i a s c u r r e n t ( m a ) - 4 0 - 2 0 1 2 0 0 2 0 4 0 6 0 8 0 1 0 0 p o s i t i v e i n p u t n e g a t i v e i n p u t
discussion of performance operational transconductance section and overview opa615 sbos299b ? february 2004 ? revised july 2005 the opa615, which contains a wideband operational transconductance amplifier (ota) and a fast sam- amplifier (ota) section and overview pling comparator (sota), represents a complete subsystem for very fast and precise dc restoration, offset clamping and correction to gnd or to an adjustable reference voltage, and low frequency hum the symbol for the ota section is similar to that of a suppression of wideband operational or buffer ampli- bipolar transistor, and the self-biased ota can be fiers. viewed as either a quasi-ideal transistor or as a although the ic was designed to improve or stabilize voltage-controlled current source. application circuits the performance of complex, wideband video signals, for the ota look and operate much like transistor it can also be used as a sample-and-hold amplifier, circuits?the bipolar transistor is also a volt- high-speed integrator, peak detector for nanosecond age-controlled current source. like a transistor, it has pulses, or as part of a correlated double sampling three terminals: a high-impedance input (base) system. a wideband operational transconductance optimized for a low input bias current of 0.3 m a, a amplifier (ota) with a high-impedance cascode cur- low-impedance input/output (emitter), and the rent source output and a fast and precise sampling high-impedance current output (collector). comparator sets a new standard for high-speed the ota consists of a complementary buffer ampli- sampling applications. fier and a subsequent complementary current mirror. both the ota and the sampling comparator can be the buffer amplifier features a darlington output used as stand-alone circuits or combined to create stage and the current mirror has a cascoded output. more complex signal processing stages such as the addition of this cascode circuitry increases the sample-and-hold amplifiers. the opa615 simplifies current source output resistance to 1.2m w . this the design of input amplifiers with high hum sup- feature improves the ota linearity and drive capabili- pression; clamping or dc-restoration stages in pro- ties. any bipolar input voltage at the high impedance fessional broadcast equipment, high-resolution cad base has the same polarity and signal level at the low monitors and information terminals; and signal pro- impedance buffer or emitter output. for the open-loop cessing stages for the energy and peak value of diagrams, the emitter is connected to gnd; the nanoseconds pulses. this device also eases the collector current is then determined by the voltage design of high-speed data acquisition systems behind between base and emitter times the a ccd sensor or in front of an analog-to-digital transconductance. in application circuits (figure 36 b), converter. a resistor r e between the emitter and gnd is used to set the ota transfer characteristics. an external resistor on the so-14 package, r q , allows the user to set the quiescent current. r q is the following formulas describe the most important connected from pin 1 (i q adjust) to ?v cc . it deter- relationships. r e is the output impedance of the buffer mines the operating currents of the ota section and amplifier (emitter) or the reciprocal of the ota controls the bandwidth and ac behavior as well as transconductance. above 5ma, the collector current, the transconductance of the ota. i c , will be slightly less than indicated by the formula. besides the quiescent current setting feature, a proportional-to-absolute-temperature (ptat) supply current control will increase the quiescent current the r e resistor may be bypassed by a relatively large versus temperature. this variation holds the capacitor to maintain high ac gain. the parallel transconductance (g m ) of the ota and comparator combination of r e and this large capacitor form a relatively constant versus temperature. the circuit high-pass filter, enhancing the high frequency gain. parameters listed in the specification table are other cases may require an rc compensation net- measured with r q set to 300 w , giving a nominal work in parallel to r e to optimize the high-frequency quiescent current at 13ma. while not always shown response. the large signal bandwidth (v o = 1.4v pp ) in the application circuits, this r q = 300 w is required measured at the emitter achieves 770mhz. the to get the 13ma quiescent operating current. frequency response of the collector is directly related to the resistor value between the collector and gnd; it decreases with increasing resistor values, because of the low-pass filter formed with the ota c-output capacitance. 12 www .ti.com i c v i n r e r e o r r e v i n i c r e
basic application circuits opa615 sbos299b ? february 2004 ? revised july 2005 figure 35 shows a simplified block diagram of the while the ota function and labeling appear similar to opa615 ota. both the emitter and the collector those of a transistor, it offers essential distinctive outputs offer a drive capability of 20ma for driving differences and improvements: 1) the collector cur- low impedance loads. the emitter output is not rent flows out of the c terminal for a positive b-to-e current-limited or protected. momentary shorts to input voltage and into it for negative voltages; 2) a gnd should be avoided, but are unlikely to cause common emitter amplifier operates in non-inverting permanent damage. mode while the common base operates in inverting mode; 3) the ota is far more linear than a bipolar transistor; 4) the transconductance can be adjusted with an external resistor; 5) as a result of the ptat biasing characteristic, the quiescent current increases as shown in the typical performance curve vs tem- perature and keeps the ac performance constant; 6) the ota is self-biased and bipolar; and 7) the output current is approximately zero for zero differen- tial input voltages. ac inputs centered on zero produce an output current centered on zero. most application circuits for the ota section consist of a few basic types which are best understood by analogy to discrete transistor circuits. just as the transistor has three basic operating modes?common emitter, common base, and common collector?the ota has three equivalent operating modes; com- mon-e, common-b, and common-c (see figure 36 , figure 37 and figure 38 ). figure 36 shows the ota connected as a common-e amplifier, which is equiv- alent to a common emitter transistor amplifier. input and output can be ground-referenced without any biasing. the amplifier is noninverting because a figure 35. simplified ota block diagram current flowing out of the emitter will also flow out of the collector as a result of the current mirror shown in figure 35 . figure 36. a) common emitter amplifier using a discrete transistor; b) common-e amplifier using the ota portion of the opa615 13 www .ti.com + v c c ( 1 3 ) + v c c ( 5 ) c ( 1 2 ) b ( 3 ) e ( 2 ) + 1 r b r l r b r e v - s i n g l e t r a n s i s t o r v + v i v o ( a ) c o m m o n e m i t t e r a m p l i f i e r v o 1 0 0 w o t a v i b e r l r e n o n i n v e r t i n g g a i n ( b ) c o m m o n ? e a m p l i f i e r f o r o t a i n v e r t i n g g a i n v s e v e r a l v o l t s o s 3 2 c 1 2 t r a n s c o n d u c t a n c e v a r i e s o v e r t e m p e r a t u r e . t r a n s c o n d u c t a n c e r e m a i n s c o n s t a n t o v e r t e m p e r a t u r e . v o s 0
opa615 sbos299b ? february 2004 ? revised july 2005 figure 37 shows the common-c amplifier. it consti- figure 38 shows the common-b amplifier. this con- tutes an open-loop buffer with low offset voltage. its figuration produces an inverting gain, and the input is gain is approximately 1 and will vary with the load. low-impedance. when a high impedance input is needed, it can be created by inserting a buffer amplifier (such as the buf602) in series. figure 37. a) common collector amplifier using a discrete transistor; b) common-c amplifier using the ota portion of the opa615 figure 38. a) common base amplifier using a discrete transistor; b) common-b amplifier using the ota portion of the opa615 14 www .ti.com v - s i n g l e t r a n s i s t o r v + v i v o ( a ) c o m m o n c o l l e c t o r a m p l i f i e r ( e m i t t e r f o l l o w e r ) v o 1 0 0 w o t a v i ( b ) c o m m o n ? c a m p l i f i e r f o r o t a ( b u f f e r ) o s g 1 v 0 . 7 v o s g 1 v 0 b 3 c 1 2 r e r e r o = 1 g m g = 1 1 + 1 g m x r e 1 e 2 i n v e r t i n g g a i n v i v o s i n g l e t r a n s i s t o r ( a ) c o m m o n ? b a s e a m p l i f i e r o t a v i ( b ) c o m m o n ? b a m p l i f i e r f o r o t a o s r l n o n i n v e r t i n g g a i n v s e v e r a l v o l t s r e v o r l r e b e 3 2 c 1 2 g = - - r l r e + g m 1 r l r e v o s 0 v + 1 0 0 w
sampling comparator opa615 sbos299b ? february 2004 ? revised july 2005 this innovative circuit achieves the high slew rate representative of an open-loop design. in addition, the opa615 sampling comparator features a very the acquisition slew current for a hold or storage short switching (2.5ns) propagation delay and utilizes capacitor is higher than standard diode bridge and a new switching circuit architecture to achieve excel- switch configurations, removing a main contributor to lent speed and precision. the limits of maximum sampling rate and input fre- quency. it provides high impedance inverting and noninverting analog inputs, a high-impedance current source out- the switching circuits in the opa615 use current put and a ttl-cmos-compatible hold control input. steering (versus voltage switching) to provide im- proved isolation between the switch and analog the sampling comparator consists of an operational sections. this design results in low aperture time transconductance amplifier (ota), a buffer amplifier, sensitivity to the analog input signal, reduced power and a subsequent switching circuit. this combination supply and analog switching noise. sample-to-hold is subsequently referred to as the sampling oper- peak switching charge injection is 40fc. ational transconductance amplifier (sota). the ota and buffer amplifier are directly tied together at the additional offset voltage or switching transient the buffer outputs to provide the two identical induced on a capacitor at the current source output high-impedance inputs and high open-loop by the switching charge can be determined by the transconductance. even a small differential input following formula: voltage multiplied with the high transconductance results in an output current?positive or nega- tive?depending upon the input polarity. this charac- teristic is similar to the low or high status of a the switching stage input is insensitive to the low conventional comparator. the current source output slew rate performance of the hold control command features high output impedance, output bias current and compatible with ttl/cmos logic levels. with compensation, and is optimized for charging a ca- ttl logic high, the comparator is active, comparing pacitor in dc restoration, nanosecond integrators, the two input voltages and varying the output current peak detectors and s/h circuits. the typical accordingly. with ttl logic low, the comparator comparator output current is 5ma and the output output is switched off, showing a very high im- bias current is minimized to typically 10 m a in the pedance to the hold capacitor. sampling mode. 15 www .ti.com o f f s e t ( v ) c h a r g e ( p c ) c h t o t a l ( p f )
application information basic connections opa615 sbos299b ? february 2004 ? revised july 2005 the opa615 operates from 5v power supplies power-supply bypass capacitors should be located as ( 6.2v maximum). absolute maximum is 6.5v . do close as possible to the device pins. solid tantalum not attempt to operate with larger power supply capacitors are generally best. see board layout at voltages or permanent damage may occur. the end of the applications discussion for further suggestions on layout. figure 39 shows the basic connections required for operation. these connections are not shown in sub- sequent circuit diagrams. figure 39. basic connections 16 www .ti.com s o t a o t a r q r q g n d 9 3 4 s w i t c h i n g s t a g e s a m p l i n g c o m p a r a t o r ( s c ) 7 1 0 1 1 s / h i n + s / h i n - h o l d c o n t r o l c h o l d b a s e r b ( 2 5 w t o 2 0 0 w ) 2 1 2 b i a s i n g 5 1 3 - v c c + v c c - 5 v + 5 v 1 2 . 2 m f 1 0 n f 4 7 0 p f 1 0 n f 2 . 2 m f 4 7 0 p f s o l i d t a n t a l u m + + r q i q a d j u s t c o l l e c t o r e m i t t e r r q = 3 0 0 w s e t s a p p r o x i m a t e l y i q = 1 3 m a ( 2 0 w t o 2 0 0 w )
dc-restore system opa615 sbos299b ? february 2004 ? revised july 2005 figure 40 and figure 41 offer two possible dc-restore systems using the opa615. figure 41 implements a dc-restore function as a unity-gain amplifier. as can be expected from its name, this dc-restore circuit does not provide any amplification. in applications where some amplification is needed, consider using the circuit design shown in figure 40 . figure 41. dc restoration of a buffer amplifier for either of these circuits to operate properly, the source impedance needs to be low, such as the one provided by the output of a closed-loop amplifier or buffer. consider the video input signal shown in figure 42 , and the complete dc restoration system shown in figure 40 . this signal is amplified by the ota section of the opa615 by a gain of: figure 40. complete dc restoration system figure 42. ntsc horizontal scan line 17 www .ti.com h c l v i n c h o l d v o u t o t a o p a 6 1 5 1 0 1 1 7 4 2 3 1 2 1 0 0 w 1 0 0 w s o t a 1 0 0 w s o t a h c l v i n c h o l d v o u t o t a r 1 r 2 r 2 r 1 = v i n x o p a 6 1 5 3 1 2 2 4 7 1 0 1 1 1 0 0 w 1 0 0 w 1 0 0 w g r 2 r 1 7 . 5 b l a n k i n g b a c k p o r c h 1 0 0 8 9 7 0 5 9 4 1 3 0 1 1 0 w y c y g r n m a g r b l u b l k f r o n t p o r c h s y n c t i p b r e e z e w a y c o l o r b u r s t l u m i n a n c e + c h r o m i n a n c e 1 0 0 8 0 6 0 4 0 2 0 1 00 - 2 0 - 4 0 i r e u n i t s 4 0 i r e 1 v p p
opa615 sbos299b ? february 2004 ? revised july 2005 the dc restoration is done by the sota section by when the sota is sampling, it is charging or sampling the output signal at an appropriate time. discharging the c hold capacitor depending on the the sampled section of the signal is then compared level of the output signal sampled. the detail of an to a reference voltage that appears on the appropriate timing is illustrated in figure 43 . non-inverting input of the sota (pin 10), or ground in figure 40 . figure 43. dc-restore timing 18 www .ti.com s a m p l e 0 v 7 . 5 1 0 0 8 0 6 0 4 0 2 0 1 00 - 2 0 - 4 0 0 v h o l d h c l o u t p u t v o l t a g e i n p u t v o l t a g e i r e u n i t s 7 . 5 1 0 0 8 0 6 0 4 0 2 0 1 00 - 2 0 - 4 0 i r e u n i t s
clamped video/rf amplifier sample-and-hold amplifier opa615 sbos299b ? february 2004 ? revised july 2005 another circuit example for the preamplifier and the clamp circuit is shown in figure 44 . the preamplifier uses the wideband, low noise opa656, again con- figured in a gain of +2v/v. here, the opa656 has a typical bandwidth of 200mhz with a settling time of about 21ns (0.02%) and offers a low bias current jfet input stage. the video signal passes through the capacitor c b , blocking the dc component. to restore the dc level to the desired baseline, the opa615 is used. the inverting input (pin 11) is connected to a reference voltage. during the high time of the clamp pulse, the switching comparator (sota) will compare the output of the op amp to the reference level. any voltage difference between those pins will result in an output current that either charges or discharges the hold capacitor, c hold . this charge creates a voltage across the capacitor, which is buffered by the ota. multiplied by the transconductance, the voltage will cause a current flow in the collector, c, terminal of figure 44. clamped video/rf amplifier the ota. this current will level-shift the opa656 up to the point where its output voltage is equal to the reference voltage. this level-shift also closes the control loop. because of the buffer, the voltage with a control propagation delay of 2.5ns and across the c hold stays constant and maintains the 730mhz bandwidth, the opa615 can be used advan- baseline correction during the off-time of the clamp tageously in a high-speed sample-and-hold amplifier. pulse. figure 45 illustrates this configuration. the external capacitor (c hold ) allows for a wide range of flexibility. by choosing small values, the circuit can be optimized for a short clamping period or with high values for a low droop rate. another advantage of this circuit is that small clamp peaks at the output of the switching comparator are integrated and do not cause glitches in the signal path. figure 45. sample-and-hold amplifier 19 www .ti.com o p a 6 5 6 r 2 3 0 0 w r e o t a v i n r b v o u t h c l c h o l d ? c u r r e n t c o n t r o l ? n o n ? i n v e r t i n g o p a 6 1 5 1 0 0 w 2 3 4 7 1 1 1 0 1 2 1 0 0 w v r e f 1 0 0 w r 1 3 0 0 w s o t a c b h o l d / t r a c k 5 0 w 1 0 0 w 1 5 0 w 1 0 0 w o t a 2 1 2 3 4 3 0 0 w 5 0 w c h o l d 2 2 p f v i n 1 0 1 1 7 3 0 0 w v o u t s o t a o p a 6 1 5
fast pulse peak detector phase detector for fast pll systems integrator for ns-pulses opa615 sbos299b ? february 2004 ? revised july 2005 to illustrate how the digitization is realized in the figure 45 circuit, figure 46 shows a 100khz a circuit similar to that shown in figure 47 (the sinewave being sampled at a rate of 1mhz. the integrator for ns-pulses) can be devised to detect and output signal used here is the i out output driving a isolate positive pulses from negative pulses. this 50 w load. circuit, shown in figure 48 , uses the opa615 as well as the buf602. this circuit makes use of diodes to isolate the positive-going pulses from the nega- tive-going pulses and charge-different capacitors. figure 46. 1mhz sample-and-hold of a 100khz figure 48. fast bipolar peak detector sine wave figure 49 shows the circuit for a phase detector for the integrator for ns-pulses using the opa615 fast pll systems. given a reference pulse train f ref (shown in figure 47 ) makes use of the fast and a pulse train input signal f in out of phase, the comparator and its current-mode output. placing the sota of the opa615 acts in this circuit as a hold-control high, a narrow pulse charges the capaci- comparator, either charging or discharging the ca- tor, increasing the average output voltage. to pacitor. this voltage is then buffered by the ota and minimize ripples at the inverting input and maximize fed to the vco. the capacitor charge, a t-network is used in the feedback path. figure 47. integrator for ns-pulses figure 49. phase detector for fast pll-systems 20 www .ti.com + 2 . 5 + 1 . 5 + 0 . 5 - 0 . 5 - 1 . 5 - 2 . 5 1 m h z s a m p l e ? a n d ? h o l d o f a 1 0 0 k h z s i n e w a v e t i m e ( 1 m s / d i v ) o u t p u t v o l t a g e ( v ) 54 3 2 1 0 h o l d ? a n d ? t r a c k s i g n a l ( v ) h o l d c o n t r o l + v o u t 5 0 w 1 0 0 w 1 5 0 w 1 0 0 w 1 0 0 w 5 0 w + 1 o t a 8 4 2 1 2 3 4 - v o u t 3 0 0 w 5 0 w 2 7 p f 2 7 p f v i n 1 0 1 1 7 b u f 6 0 2 o p a 6 1 5 s o t a 1 5 0 w 5 0 w v i n h o l d c o n t r o l 2 7 p f 1 0 0 w 8 2 0 w 1 m f 6 2 0 w 5 0 w o t a v o u t 1 2 2 3 4 1 1 1 0 7 s o t a s o t a f r e f f i n c i n t + 5 v v o u t f r e f f i n f o u t f o u t = f r e f x n v o u t f i n f r e f i o u t v o u t 7 5 w n p h a s e v c o o t a o p a 6 1 5 7 5 w 7 5 w 1 1 1 0 3 2 1 2 4 1 0 0 w 7
correlated double sampler opa615 sbos299b ? february 2004 ? revised july 2005 the signal coming from the ccd is applied to the two sample-and-hold amplifiers, with their outputs con- noise is the limiting factor for the resolution in a ccd nected to the difference amplifier. the timing diagram system, where the kt/c noise is dominant (see clarifies the operation (see figure 52 ). at time t 1 , the figure 51 ). to reduce this noise, imaging systems sample and hold (s/h 1 ) goes into the hold mode, use a circuit called a correlated double sampler taking a sample of the reset level including the noise. (cds). the name comes from the double sampling this voltage (v reset ) is applied to the noninverting technique of the ccd charge signal. a cds using input of the difference amplifier. at time t 2 , the two opa615s and one opa694 is shown in fig- sample-and-hold (s/h 2 ) will take a sample of the ure 50 . the first sample (s 1 ) is taken at the end of the video level, which is v reset ? v video . the output reset period. when the reset switch opens again, the voltage of the difference amplifier is defined by the effective noise bandwidth changes because of the equation v out = v in+ ? v in? . the sample of the reset large difference in the switch r on and r off resist- voltage contains the kt/c noise, which is eliminated ance. this difference causes the dominating kt/c by the subtraction of the difference amplifier. noise essentially to freeze in its last point. the double sampling technique also reduces the the other sample (s 2 ) is taken during the video white noise. the white noise is part of the reset portion of the signal. ideally, the two samples differ voltage (v reset ) as well as of the video amplitude only by a voltage corresponding to the transferred (v reset ? v video ). with the assumption that the noise charge signal. this is the video level minus the noise of the noise of the second sample was unchanged ( d v). from the instant of the first sample, the noise ampli- tudes are the same and are correlated in time. the cds function will eliminate the kt/c noise as therefore, the noise can be reduced by the cds well as much of the 1/f and white noise. function. figure 52 is a block diagram of a cds circuit. two sample-and-hold amplifiers and one difference ampli- fier constitute the correlated double sampler. figure 50. correlated double sampler 21 www .ti.com v o u t v i n 1 o p a 6 9 4 s o t a 7 1 0 1 1 4 v h o l d 1 2 7 p f 4 0 2 w 5 0 w 1 0 0 w 1 0 0 w 3 0 0 w 3 0 0 w 4 0 2 w 4 0 2 w 4 0 2 w o t a 1 2 2 3 v i n 2 s o t a 7 1 0 1 1 4 v h o l d 2 2 7 p f 5 0 w 1 0 0 w 1 0 0 w 3 0 0 w 3 0 0 w o t a 1 2 2 3
opa615 sbos299b ? february 2004 ? revised july 2005 figure 51. improving snr with correlated double sampling figure 52. cds - circuit concept 22 www .ti.com r e s e t l e v e l s i m p l i f i e d c c d o u t p u t s i g n a l n o t e : s i g n a l s a r e o u t o f s c a l e . v i d e o l e v e l s 2 s 1 d v k t / c ? n o i s e p p s / h 1 v i n t 2 v i d e o h o l d s 2 s 1 v i n t 1 t 2 v i d e o o u t 0 v s / h 2 v r e s e t v r e s e t - v v i d e o d i f f e r e n c e a m p l i f i e r v o u t = v i n + - v i n - t 1 r e s e t h o l d
board layout guidelines input and esd protection opa615 sbos299b ? february 2004 ? revised july 2005 d) connections to other wideband devices on the board may be made with short direct traces or achieving optimum performance with a high- fre- through onboard transmission lines. for short quency amplifier like the opa615 requires careful connections, consider the trace and the input to the attention to printed circuit board (pcb) layout para- next device as a lumped capacitive load. relatively sitics and external component types. recommen- wide traces (50mils to 100mils) should be used, dations that will optimize performance include: preferably with ground and power planes opened up around them. a) minimize parasitic capacitance to any ac ground for all of the signal i/o pins. parasitic e) socketing a high-speed part like the opa615 is capacitance on the output and inverting input pins not recommended. the additional lead length and can cause instability; on the non-inverting input, it can pin-to-pin capacitance introduced by the socket can react with the source impedance to cause uninten- create an extremely troublesome parasitic network tional bandlimiting. to reduce unwanted capacitance, which can make it almost impossible to achieve a a window around the signal i/o pins should be smooth, stable frequency response. best results are opened in all of the ground and power planes around obtained by soldering the opa615 directly onto the those pins. otherwise, ground and power planes pcb. should be unbroken elsewhere on the board. b) minimize the distance (< 0.25") from the power supply pins to high frequency 0.1 m f decoupling the opa615 is built using a very high-speed, comp- capacitors. at the device pins, the ground and power lementary bipolar process. the internal junction plane layout should not be in close proximity to the breakdown voltages are relatively low for these very signal i/o pins. avoid narrow power and ground small geometry devices. these breakdowns are re- traces to minimize inductance between the pins and flected in the absolute maximum ratings table where the decoupling capacitors. the power-supply connec- an absolute maximum 6.5v supply is reported. all tions should always be decoupled with these capaci- device pins have limited esd protection using internal tors. an optional supply-decoupling capacitor across diodes to the power supplies, as shown in figure 53 . the two power supplies (for bipolar operation) will improve 2nd-harmonic distortion performance. larger (2.2 m f to 6.8 m f) decoupling capacitors, effective at a lower frequency, should also be used on the main supply pins. these may be placed somewhat farther from the device and may be shared among several devices in the same area of the pcb. c) careful selection and placement of external components will preserve the high frequency performance of the opa615. resistors should be a very low reactance type. surface-mount resistors figure 53. internal esd protection work best and allow a tighter overall layout. metal-film and carbon composition, axially-leaded resistors can also provide good high frequency performance. these diodes also provide moderate protection to again, keep these leads and pcb trace length as input overdrive voltages above the supplies. the short as possible. never use wirewound-type re- protection diodes can typically support 30ma continu- sistors in a high frequency application. other network ous current. where higher currents are possible (for components, such as noninverting input termination example, in systems with 15v supply parts driving resistors, should also be placed close to the package. into the opa615), current-limiting series resistors should be added into the two inputs. keep these resistor values as low as possible since high values degrade both noise performance and frequency re- sponse. 23 www .ti.com e x t e r n a l p i n + v c c - v c c i n t e r n a l c i r c u i t r y
packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish msl peak temp (3) opa615id active soic d 14 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year opa615idg4 active soic d 14 50 green (rohs & no sb/br) cu nipdau level-2-260c-1 year opa615idr active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-2-260c-1 year OPA615IDRG4 active soic d 14 2500 green (rohs & no sb/br) cu nipdau level-2-260c-1 year (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs) or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. -- the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis. package option addendum www.ti.com 17-nov-2005 addendum-page 1

important notice texas instruments incorporated and its subsidiaries (ti) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. all products are sold subject to ti?s terms and conditions of sale supplied at the time of order acknowledgment. ti warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with ti?s standard warranty. testing and other quality control techniques are used to the extent ti deems necessary to support this warranty. except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. ti assumes no liability for applications assistance or customer product design. customers are responsible for their products and applications using ti components. to minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. ti does not warrant or represent that any license, either express or implied, is granted under any ti patent right, copyright, mask work right, or other ti intellectual property right relating to any combination, machine, or process in which ti products or services are used. information published by ti regarding third-party products or services does not constitute a license from ti to use such products or services or a warranty or endorsement thereof. use of such information may require a license from a third party under the patents or other intellectual property of the third party, or a license from ti under the patents or other intellectual property of ti. reproduction of information in ti data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. reproduction of this information with alteration is an unfair and deceptive business practice. ti is not responsible or liable for such altered documentation. resale of ti products or services with statements different from or beyond the parameters stated by ti for that product or service voids all express and any implied warranties for the associated ti product or service and is an unfair and deceptive business practice. ti is not responsible or liable for any such statements. following are urls where you can obtain information on other texas instruments products and application solutions: products applications amplifiers amplifier.ti.com audio www.ti.com/audio data converters dataconverter.ti.com automotive www.ti.com/automotive dsp dsp.ti.com broadband www.ti.com/broadband interface interface.ti.com digital control www.ti.com/digitalcontrol logic logic.ti.com military www.ti.com/military power mgmt power.ti.com optical networking www.ti.com/opticalnetwork microcontrollers microcontroller.ti.com security www.ti.com/security telephony www.ti.com/telephony video & imaging www.ti.com/video wireless www.ti.com/wireless mailing address: texas instruments post office box 655303 dallas, texas 75265 copyright ? 2005, texas instruments incorporated

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