1 june 1998 ha-5147/883 100mhz, ultra low noise, precision, high slew rate operational ampli?r features this circuit is processed in accordance to mil-std- 883 and is fully conformant under the provisions of paragraph 1.2.1. high slew rate . . . . . . . . . . . . . . . . . . . . . . 28v/ s (min) wide gain bandwidth (a v 10) . . . . . . . 100mhz (min) low noise (at 1khz) . . . . . . . . . . . . . . . 4.5nv/ hz (max) low offset voltage. . . . . . . . . . . . . . . . . . . .100 v (max) low offset drift with temperature. . . . 1.8 v/ o c (max) high cmrr . . . . . . . . . . . . . . . . . . . . . . . . . . 100db (min) high voltage gain . . . . . . . . . . . . . . . . . . 700kv/v (min) applications high speed signal conditioners wide bandwidth instrumentation ampli?rs low level transducer ampli?rs fast, low level voltage comparators highest quality audio preampli?rs pulse/rf ampli?rs description the ha-5147/883 monolithic operational ampli?r features an unparalleled combination of precision dc and wideband high speed characteristics. utilizing the intersil di technol- ogy and advanced processing techniques, this unique design unites low noise precision instrumentation perfor- mance with high speed wideband capability. this ampli?r s impressive list of features include low v os , wide gain-bandwidth, high open loop gain, and high cmrr. additionally, this ?xible device operates over a wide supply range while consuming only 120mw of power. using the ha-5147/883 allows designers to minimize errors while maximizing speed and bandwidth in applications requiring gains greater than ten. this device is ideally suited for low level transducer signal ampli?r circuits. other applications which can utilize the ha-5147/883 s qualities include instrumentation ampli?rs, pulse or rf ampli?rs, audio preampli?rs, and signal condi- tioning circuits. pinouts ordering information part number temp. range ( o c) package pkg. no. ha4-5147/883 -55 to 125 20 ld clcc j20.a ha7-5147/883 -55 to 125 8 ld cerdip f8.3a ha-5147/883 (cerdip) top view ha-5147/883 (clcc) top view 1 2 3 4 8 7 6 5 v+ out bal v- - bal nc -in +in + 4 5 6 7 8 9101112 13 3212019 15 14 18 17 16 bal nc v- nc nc nc nc nc v+ out nc nc nc nc bal nc nc + nc -in +in - spec number 511009-883 file number 3715.2 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | copyright intersil corporation 1999
2 spec number 511009-883 absolute maximum ratings thermal information voltage between v+ and v- terminals . . . . . . . . . . . . . . . . . . . . 44v differential input voltage (note 1). . . . . . . . . . . . . . . . . . . . . . . . 0.7v voltage at either input terminal . . . . . . . . . . . . . . . . . . . . . . v+ to v- input current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25ma output current . . . . . . . . . . . . . . . . . . . full short circuit protection esd rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <2000v operating conditions temperature range . . . . . . . . . . . . . . . . . . . . . . . . . -55 o c to 125 o c supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15v v incm 1/2 (v+ - v-) r l 600 ? thermal resistance (typical, note 2) ja ( o c/w) jc ( o c/w) cerdip package . . . . . . . . . . . . . . . . 115 28 clcc package . . . . . . . . . . . . . . . . . . 65 15 package power dissipation limit at 75 o c for t j 175 o c cerdip package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 870mw clcc package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.54w package power dissipation derating factor above 75 o c cerdip package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8.7mw/ o c clcc package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15.4mw/ o c maximum junction temperature (t j ) . . . . . . . . . . . . . . . . . . . 175 o c maximum storage temperature range . . . . . . . . . .-65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . . 300 o c caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress only rating and operatio n of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not im plied. notes: 1. for differential input voltages greater than 0.7v, the input current must be limited to 25ma to protect the back-to-back inpu t diodes. 2. ja is measured with the component mounted on an evaluation pc board in free air. table 1. dc electrical performance specifications device tested at: v supply = 15v, r source = 5 0? , r load = 100k ? , v out = 0v, unless otherwise speci?d. parameter symbol conditions group a subgroups temp. ( o c) min max units input offset voltage v io v cm = 0v 1 25 -100 100 v 2, 3 125, -55 -300 300 v input bias current i b v cm = 0v, r s = 10k ? , 5 0? 1 25 - 80 na 2, 3 125, -55 - 150 na input offset current i io v cm = 0v, +r s = 10k ? , -r s = 10k ? 1 25 -75 75 na 2, 3 125, -55 -135 135 na common mode range +cmr v+ = +4.7v, v- = -25.3v 1 25 10.3 - v 2, 3 125, -55 10.3 - v -cmr v+ = +25.3v, v- = -4.7v 1 25 - -10.3 v 2, 3 125, -55 - -10.3 v large signal voltage gain +a vol v out = 0v and +10v, r l = 2k ? 4 25 700 - kv/v 5, 6 125, -55 300 - kv/v -a vol v out = 0v and -10v, r l = 2k ? 4 25 700 - kv/v 5, 6 125, -55 300 - kv/v common mode rejection ratio +cmrr ? v cm = +11v 1 25 100 - db ? v cm = +10v 2, 3 125, -55 100 - db -cmrr ? v cm = -11v 1 25 100 - db ? v cm = -10v 2, 3 125, -55 100 - db +i b i b + 2 ------------------------------ ?? ?? ha-5147/883
3 output voltage swing +v out1 r l = 2k ? 4 25 11.5 - v 5, 6 125, -55 11.5 - v -v out1 r l = 2k ? 4 25 - -11.5 v 5, 6 125, -55 - -11.5 v +v out2 r l = 600 ? 42510-v -v out2 r l = 600 ? 4 25 - -10 v output current +i out v out = -10v 4 25 16.5 - ma -i out v out = +10v 4 25 - -16.5 ma quiescent power supply current +i cc v out =0v,i out = 0ma 1 25 - 4 ma 2, 3 125, -55 - 4 ma -i cc v out =0v,i out = 0ma 1 25 -4 - ma 2, 3 125, -55 -4 - ma power supply rejection ratio +psrr ? v sup = +14v 1 25 86 - db ? v sup = +13.5v 2, 3 125, -55 86 - db -psrr ? v sup = +14v 1 25 86 - db ? v sup = +13.5v 2, 3 125, -55 86 - db offset voltage adjustment +v io adj note 3 1 25 v io -1 - mv 2, 3 125, -55 v io -1 - mv -v io adj note 3 1 25 v io +1 - mv 2, 3 125, -55 v io +1 - mv note: 3. offset adjustment range is [v io (measured) 1mv] minimum referred to output. this test is for functionality only to assure adjustment through 0v. table 1. dc electrical performance specifications (continued) device tested at: v supply = 15v, r source = 5 0? , r load = 100k ? , v out = 0v, unless otherwise speci?d. parameter symbol conditions group a subgroups temp. ( o c) min max units table 2. ac electrical performance specifications device tested at: v supply = 15v, r source = 50 ? , r load = 2k ? , c load = 50pf, a vcl = +10v/v, unless otherwise speci?d. parameter symbol conditions group a subgroups temp. ( o c) min max units slew rate +sr v out = -3v to +3v 7 25 28 - v/ s -sr v out = +3v to -3v 7 25 28 - v/ s rise and fall time t r v out = 0 to +200mv 10% t r 90% 7 25 - 50 ns t f v out = 0 to -200mv 10% t f 90% 7 25 - 50 ns overshoot +os v out = 0 to +200mv 7 25 - 40 % -os v out = 0 to -200mv 7 25 - 40 % ha-5147/883 spec number 511009-883
4 spec number 511009-883 table 3. electrical performance specifications device characterized at: v supply = 15v, r load = 2k ? , c load = 50pf, a v = +10v/v, unless otherwise speci?d. parameter symbol conditions notes temp. ( o c) min max units average offset voltage drift v io tc v cm = 0v 4 -55 to 125 - 1.8 v/ o c differential input resistance r in v cm = 0v 4 25 0.8 - m ? low frequency peak-to-peak noise e np-p 0.1hz to 10hz 4 25 - 0.25 v p-p input noise voltage density e n r s = 20 ? , f o = 10hz 4 25 - 10 nv / hz r s = 20 ? , f o = 100hz 4 25 - 5.6 nv / hz r s = 20 ? , f o = 1khz 4 25 - 4.5 nv / hz input noise current density i n r s = 2m ? , f o = 10hz 4 25 - 4.0 pa / hz r s = 2m ? , f o = 100hz 4 25 - 2.3 pa / hz r s = 2m ? , f o = 1khz 4 25 - 0.6 pa / hz gain bandwidth product gbwp v o = 100mv, f o = 10khz 4 25 120 - mhz v o = 100mv, f o = 1mhz 4 25 100 - mhz full power bandwidth fpbw v peak = 10v 4, 5 25 445 - khz minimum closed loop stable gain clsg r l = 2k ? , c l = 50pf 4 -55 to 125 10 - v/v settling time t s to 0.1% for a 10v step 4 25 - 600 s output resistance r out open loop 4 25 - 100 ? quiescent power consumption pc v out =0v,i out = 0ma 4, 6 -55 to 125 - 120 mw notes: 4. parameters listed in table 3 are controlled via design or process parameters and are not directly tested at final production. these pa- rameters are lab characterized upon initial design release, or upon design changes. these parameters are guaranteed by characteriza- tion based upon data from multiple production runs which reflect lot to lot and within lot variation. 5. full power bandwidth guarantee based on slew rate measurement using fpbw = slew rate/(2 v peak ). 6. quiescent power consumption based upon quiescent supply current test maximum. (no load on output.) table 4. electrical test requirements mil-std-883 test requirements subgroups (see tables 1 and 2) interim electrical parameters (pre burn-in) 1 final electrical test parameters 1 (note 7), 2, 3, 4, 5, 6, 7 group a test requirements 1, 2, 3, 4, 5, 6, 7 groups c and d endpoints 1 note: 7. pda applies to subgroup 1 only. ha-5147/883
5 die characteristics die dimensions: 104.3 x 65 x 19 mils 2650 x 1650 x 483 m metallization: type: al, 1% cu thickness: 16k ? 2k ? glassivation: type: nitride (si 3 n 4 ) over silox (sio 2 , 5% phos.) silox thickness: 12k? 2k? nitride thickness: 3.5k? 1.5k? worst case current density: 3.6 x 10 5 a/cm 2 at 15ma this device meets glassivation integrity test requirement per mil-std-883 method 2021 and mil-i-38535 paragraph 30.5.5.4. substrate potential (powered up): v- transistor count: 63 process: bipolar dielectric isolation metallization mask layout ha-5147/883 bal bal v+ out nc v- +in -in ha-5147/883 spec number 511009-883
6 spec number 511009-883 burn-in circuits ha-5147/883 cerdip ha-5147/883 clcc note: r 1 = r 3 = 1k ? , 5%, 1 / 4 w (min.) r 2 = 10k ? , 5%, 1 / 4 w (min.) c 1 = c 2 = 0.01 f/socket or 0.1 f/row (min.) d 1 = d 2 = 1n4002 or equivalent/board |(v+) - (v-)| = 30v v+ d 1 r 1 d 2 c 2 v- + - 1 3 4 8 7 6 5 c 1 r 2 2 r 3 9 10111213 32 1 20 19 15 14 18 16 r 2 v- + - r 3 c 2 d 2 17 d 1 c 1 v+ 4 5 6 7 8 r 1 ha-5147/883
7 typical performance information t a = 25 o c, v supply = 15v, unless otherwise speci?d note: tested offset adjustment range is |v os 1mv| minimum referred to output. typical range is 4mv with r t = 10k ? . suggested offset voltage adjustment large and small signal response test circuit vertical scale: input = 0.5v/div. output = 5v/div. horizontal scale: 500ns/div. large signal response vertical scale: input = 10mv/div. output = 100mv/div. horizontal scale: 100ns/div. small signal response v+ + - 1 3 4 8 7 6 5 r t 2 10k ? + v ac 50pf 1.8k ? 200 ? - 50 ? v ac out a v = +10v/v out in out in ha-5147/883 spec number 511009-883
8 spec number 511009-883 ha-5147/883 ceramic leadless chip carrier packages (clcc) d j x 45 o d3 b h x 45 o a a1 e l l3 e b3 l1 d2 d1 e 1 e2 e1 l2 plane 2 plane 1 e3 b2 0.010 e h s s 0.010 e f s s -e- 0.007 e f m s hs b1 -h- -f- j20.a mil-std-1835 cqcc1-n20 (c-2) 20 pad ceramic leadless chip carrier package symbol inches millimeters notes min max min max a 0.060 0.100 1.52 2.54 6, 7 a1 0.050 0.088 1.27 2.23 - b----- b1 0.022 0.028 0.56 0.71 2, 4 b2 0.072 ref 1.83 ref - b3 0.006 0.022 0.15 0.56 - d 0.342 0.358 8.69 9.09 - d1 0.200 bsc 5.08 bsc - d2 0.100 bsc 2.54 bsc - d3 - 0.358 - 9.09 2 e 0.342 0.358 8.69 9.09 - e1 0.200 bsc 5.08 bsc - e2 0.100 bsc 2.54 bsc - e3 - 0.358 - 9.09 2 e 0.050 bsc 1.27 bsc - e1 0.015 - 0.38 - 2 h 0.040 ref 1.02 ref 5 j 0.020 ref 0.51 ref 5 l 0.045 0.055 1.14 1.40 - l1 0.045 0.055 1.14 1.40 - l2 0.075 0.095 1.91 2.41 - l3 0.003 0.015 0.08 0.38 - nd 5 5 3 ne 5 5 3 n20 203 rev. 0 5/18/94 notes: 1. metallized castellations shall be connected to plane 1 terminals and extend toward plane 2 across at least two layers of ceramic or completely across all of the ceramic layers to make electrical connection with the optional plane 2 terminals. 2. unless otherwise speci?d, a minimum clearance of 0.015 inch (0.38mm) shall be maintained between all metallized features (e.g., lid, castellations, terminals, thermal pads, etc.) 3. symbol ? is the maximum number of terminals. symbols ?d and ?e are the number of terminals along the sides of length ??and ?? respectively. 4. the required plane 1 terminals and optional plane 2 terminals (if used) shall be electrically connected. 5. the corner shape (square, notch, radius, etc.) may vary at the manufacturer s option, from that shown on the drawing. 6. chip carriers shall be constructed of a minimum of two ceramic layers. 7. dimension ??controls the overall package thickness. the maxi- mum ? dimension is package height before being solder dipped. 8. dimensioning and tolerancing per ansi y14.5m-1982. 9. controlling dimension: inch.
9 all intersil semiconductor products are manufactured, assembled and tested under iso9000 quality systems certi?ation. intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design and/or specifications at a ny time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by intersil is believed to b e accurate and reli- able. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third p arties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its sub sidiaries. for information regarding intersil corporation and its products, see web site http://www.intersil.com sales of?e headquarters north america intersil corporation p. o. box 883, mail stop 53-204 melbourne, fl 32902 tel: (321) 724-7000 fax: (321) 724-7240 europe intersil sa mercure center 100, rue de la fusee 1130 brussels, belgium tel: (32) 2.724.2111 fax: (32) 2.724.22.05 asia intersil (taiwan) ltd. taiwan limited 7f-6, no. 101 fu hsing north road taipei, taiwan republic of china tel: (886) 2 2716 9310 fax: (886) 2 2715 3029 spec number 511009-883 ha-5147/883 ceramic dual-in-line frit seal packages (cerdip) notes: 1. index area: a notch or a pin one identification mark shall be locat- ed adjacent to pin one and shall be located within the shaded area shown. the manufacturer? identification shall not be used as a pin one identification mark. 2. the maximum limits of lead dimensions b and c or m shall be measured at the centroid of the finished lead surfaces, when solder dip or tin plate lead finish is applied. 3. dimensions b1 and c1 apply to lead base metal only. dimension m applies to lead plating and finish thickness. 4. corner leads (1, n, n/2, and n/2+1) may be configured with a partial lead paddle. for this configuration dimension b3 replaces dimension b2. 5. this dimension allows for off-center lid, meniscus, and glass overrun. 6. dimension q shall be measured from the seating plane to the base plane. 7. measure dimension s1 at all four corners. 8. n is the maximum number of terminal positions. 9. dimensioning and tolerancing per ansi y14.5m - 1982. 10. controlling dimension: inch bbb c a - b s c q l a seating base d plane plane -d- -a- -c- -b- d e s1 b2 b a e m c1 b1 (c) (b) section a-a base lead finish metal e a/2 a m s s ccc c a - b m d s s aaa c a - b m d s s e a f8.3a mil-std-1835 gdip1-t8 (d-4, configuration a) 8 lead ceramic dual-in-line frit seal package symbol inches millimeters notes min max min max a - 0.200 - 5.08 - b 0.014 0.026 0.36 0.66 2 b1 0.014 0.023 0.36 0.58 3 b2 0.045 0.065 1.14 1.65 - b3 0.023 0.045 0.58 1.14 4 c 0.008 0.018 0.20 0.46 2 c1 0.008 0.015 0.20 0.38 3 d - 0.405 - 10.29 5 e 0.220 0.310 5.59 7.87 5 e 0.100 bsc 2.54 bsc - ea 0.300 bsc 7.62 bsc - ea/2 0.150 bsc 3.81 bsc - l 0.125 0.200 3.18 5.08 - q 0.015 0.060 0.38 1.52 6 s1 0.005 - 0.13 - 7 90 o 105 o 90 o 105 o - aaa - 0.015 - 0.38 - bbb - 0.030 - 0.76 - ccc - 0.010 - 0.25 - m - 0.0015 - 0.038 2, 3 n8 88 rev. 0 4/94
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