arm evaluation start-up kit with embedded linux? LH0E776 LH0E776 LH0E776 LH0E776 summary specification ver. 1.00 sharp corporation
LH0E776 summary specification ver. 1.00 september 30, 2002 1 1. overview LH0E776 board is an evaluation board for embedded linux (axlinux) or other oses and it has the lh79532 -micro controller chip that has the arm7tdmi? core embedded. an embedded system is thus realized by this small format a7 size board. LH0E776 board includes the lh79532, flash rom, sdram, ethernet, rs232c and other communication methods. moreover LH0E776 board has a jtag-ice port for jtag debugging. 2. feature 2-1. contents of the package - LH0E776 board (1) - ac adapter (1) - LH0E776 introduction (1), general precautions (1), mac address (1) - cd-rom (1) cd-rom contains the following contents :/tool :/tool :/tool :/tool gnu tool chain for arm software/ for axlinux application :/bin :/bin :/bin :/bin boot image axlinux image flash rom data of shipment :/src :/src :/src :/src axlinux source /sampleprogrames /sampleprogrames /sampleprogrames /sampleprogrames sample programs :/doc :/doc :/doc :/doc LH0E776 introduction, hardware specification, board circuit diagram etc. 2-2. principal device cpu : lh79532 flash rom : 4m bytes (2m words by 16 bit, 90ns, sharp lh28f320bje-pbtl90) sdram : 32 bytes (two of 8m words by 16 bit, 7.5ns, toshiba tc59sm716aft-75) ethernet ic : 10base-t communication ic other : 7 bit leds and dip switches for debugging communication : ethernet 10base-t rs-232c - 2 ports debugging : jtag connector extend : external memory interface connector, lcd panel connector the original axlinux was developed by axe, inc. the original axlinux was developed by axe, inc. the original axlinux was developed by axe, inc. the original axlinux was developed by axe, inc. linux is a registered tradema linux is a registered tradema linux is a registered tradema linux is a registered trademark rk rk rk or trademark or trademark or trademark or trademark of linus torvalds in the united states and other countries. of linus torvalds in the united states and other countries. of linus torvalds in the united states and other countries. of linus torvalds in the united states and other countries. the product names on this documentation is either a registered trademark or trademark of each company. the product names on this documentation is either a registered trademark or trademark of each company. the product names on this documentation is either a registered trademark or trademark of each company. the product names on this documentation is either a registered trademark or trademark of each company.
LH0E776 summary specification ver. 1.00 september 30, 2002 2 block diagram ethernet controller (cs8900a) rx/tx buffers 10base-t endec filters xfmrs micro controller unit (lh79532) arm7tdmi core rs-232c buffer 20 mhz 32 khz ? pll ? clcdc ? spi ? uart ? jtag ? dma ? pio ? timer memory 32mbyte sdram 4 mbyte flash rom main bus external signals ethernet (10base-t) jtag-ice port ? clcdc(stn/tft) ? pio(13bit) interrupt timer dma pwm wait ? power 5v,3.3v,gnd reset rs-232c (2ch) ? system bus data[0]- [15] address[0]- [22] ? chip enable 3 ? spi ? power 3.3v,gnd cn5 cn6 cn1, cn2 cn4 cn3 LH0E776 board fig. 1. LH0E776 board block diagram.
LH0E776 summary specification ver. 1.00 september 30, 2002 3 3. memory map there are 8 external chip select signals (external i/o chip select : nce[0]-[7]) in lh79532 pin mapping. and for nce[6]-[7] ?these two signals can be used as sdram select signal (ndcs[0] ?[1]). table 1. lhe776 chip select assignement. external chip select ce0 flash rom external interface * ce1 cs8900a (i/o mode) ce2 cs8900a (memory mode) ce[3]-[5] external interface (cn5) ce6(dcs0) sdram ce7(dcs1) no connection table 2. LH0E776 memory mapping. address rpc_map = '0' rpc_map = '1' 0x00000000 flash, ethernet i/o sdram 0x40000000 sdram sdram 0x80000000 flash, ethernet i/o flash, ethernet i/o 0xc0000000 /// /// 0xffff0000 /// 0xffff0400 /// /// 0xffff0800 dma dma 0xffff2000 lcdc lcdc 0xffff2400 /// /// 0xffff2800 /// /// 0xffff4000 uart0 uart0 0xffff4400 uart1 uart1 0xffff4800 /// /// 0xffff4c00 pio pio 0xffff5000 pwm pwm 0xffff5400 spi spi 0xffff5800 counter/timer counter/timer 0xffff5c00 /// /// 0xffff7000 rtc rtc 0xffff7400 intc intc 0xffff7800 rpc rpc 0xffff7c00 pll pll 0xffff8000 wdt wdt 0xffff8400 /// /// 0xffff8800 /// /// 0xffffa000 mainasb mainasb 0xffffa400 ebi ebi 0xffffac00 cache ctrl. cache ctrl. 0xffffb000 /// /// 0xffffc000 sdramc sdramc 0xffffc800 /// /// 0xffffe400 /// /// note: /// - reserved.
LH0E776 summary specification ver. 1.00 september 30, 2002 4 4. explanation for individual blocks clock the lh79532 uses an internal oscillator circuit known as pll. it connects to a 32khz crystal and provides variable frequency from 10mhz to 50mhz. it can also generate the frequency from 1mhz by dividing pll clock in the pll controller. the ethernet controller ic (cirrus logic cs8900a) connects to a 20mhz crystal and runs at 20mhz. memory flash rom : 4m bytes 2m words by 16 bit flash rom is mounted on the LH0E776 board. a 16 bit width bus connects the flash rom to the lh79532. the chip select signal ce0 is assigned to the flash rom. sdram : 32m bytes two of 8m words by 16bit sdram are mounted on the LH0E776 board. a 32 bit width bus connects these two sdram chips to the lh79532. the chip select signal dcs0 is assigned to these sdram. the flash rom is assigned ce0, when LH0E776 board boots (rpc_map=0), ce0 will be assign 0x00000000 as the memory address. so, when LH0E776 board starts up, program counter begins at the start of the flash rom address. if the rpc_map of lh79532?s internal register is changed, the memory map of LH0E776 board will be switched. in such a case, the sdram controller should have already been initialized and configured before switching. ethernet the ethernet controller ic of the cirrus logic cs8900a enables network communication through the 10base-t. the chip select signal ce1 is for i/o mode use and ce2 is for memory mode use on the cs8900a. please see the cs8900a data sheet for further details. there are two ethernet status leds. the red one indicates link status and the green one indicates activity status. leds/dip switches LH0E776 board has 7 bit leds and dip switches connecting to pio[25]-[31](piob[0]-[6]). pb0-pb6 are displayed on the LH0E776 board. writing to piob of the lh79532 registers will turn to on or off these leds.* it is also possible to turning on or off these leds by switching corresponding dip switches. reading piob of lh79532 registers make possible judging on or off statuses of dip switches. you can also use these 7 bit piob as spi or intr. please refer to piob multiple functions of lh79532 data sheet.
LH0E776 summary specification ver. 1.00 september 30, 2002 5 5. external interface ethernet interface LH0E776 board includes an ethernet controller ic and can provide ethernet 10base-t communication. table 3. ethernet connecter pin assignment. rj45 pin function 1 erx- 2 erx+ 3 etx- 6 etx+ 4,5,7,8,9,10 nc uart(rs232c) interface lh79532 has 2 uart channels and therefore LH0E776 board has 2 d-sub 9 pin plug which acts as rs232c ports. channel 0 of cn1 provides rxd, txd signals and rts, cts signals as modem control signal. channel 1 of cn2 provides only rxt, txd signals. table 4. rs232c connecter pin assignment. rs232c pin function 2 rxd 3 txd 5 gnd 7 rts (channel 0 only) 8 cts (channel 0 only) 1,4,6,9 nc jtag interface there is a 20 pin connector for jtag-ice debugging. table 5. jtag connecter pin assignment. jtag pin function 1,2 spu 3 ntrst 5 tdi 7 tms 9 tck 13 tdo 15 nsrst 17,19 nc 4,6,8,10,11,12,14,16,18,17,19,20 gnd external expansion interface LH0E776 board has two external expansion interfaces (cn5-60pin, cn6-36pin). the external expansion interfaces provide address bus, data bus, memory control signals, lcd panel signals, pio signals of the lh79532 and also provide power resource (3,3v and 5.0v) and gnd. see the table 6 and table 7 in detail. it is possible to use the pios as spi, intc, pwm, timer, dma signals by internal multiplexing lh79532.
LH0E776 summary specification ver. 1.00 september 30, 2002 6 table 6. external interface signals (cn5 ? 60pin). pin# signal pin# signal 1 ra[0] 31 rd[4] 2 ra[1] 32 rd[5] 3 ra[2] 33 rd[6] 4 ra[3] 34 rd[7] 5 ra[4] 35 rd[8] 6 ra[5] 36 rd[9] 7 ra[6] 37 rd[10] 8 ra[7] 38 rd[11] 9 ra[8] 39 rd[12] 10 ra[9] 40 rd[13] 11 ra[10] 41 rd[14] 12 ra[11] 42 rd[15] 13 ra[12] 43 nce[0] 14 ra[13] 44 nce[3] 15 ra[14] 45 nce[4] 16 ra[15] 46 nce[5] 17 ra[16] 47 nwe[0] 18 ra[17] 48 nwe[1] 19 ra[18] 49 nre 20 ra[19] 50 pio[41](piob[16]) / nwait 21 ra[20] 51 nreseto 22 ra[21] 52 pio[15](piob[0]) / spi_clk 23 ra[22] 53 pio[16](piob[1]) / spi_enb 24 ra[23] 54 pio[17](piob[2]) / spi_out 25 ra[24] 55 pio[18](piob[3]) / spi_in 26 ra[25] 56 pio[19](piob[4]) / intr0 27 rd[0] 57 vcc3.3 28 rd[1] 58 vcc3.3 29 rd[2] 59 gnd 30 rd[3] 60 gnd table 7. external interface signals (cn6 ? 36pin). pin# signal pin# signal 1 pio[33](piob[8]) / pwm0 / ctout2 19 pio[10](pioa[10]) / clvd[3] 2 pio[34](piob[9]) / pwm1 / ctout3 20 pio[11](pioa[11]) / clvd[4] 3 pio[35](piob[10]) / deot0 21 pio[12](pioa[12]) / clvd[5] 4 pio[36](piob[11]) / ndack0 22 pio[13](pioa[13]) / clvd[6] 5 pio[37](piob[12]) / dreq0 23 pio[14](pioa[14]) / clvd[7] 6 pio[38](piob[13]) / deot1 / pwm2 24 pio[15](pioa[15]) / clvd[8] / intr4 7 pio[39](piob[14]) / ndack1 / pwm3 25 pio[16](pioa[16]) / clvd[9] / intr5 8 pio[40](piob[15])/dreq1/pwm_sync 26 pio[17](pioa[17]) / clvd[10] / intr6 9 vcc3.3 27 pio[18](pioa[18]) / clvd[11] / intr7 10 vcc3.3 28 pio[19](pioa[19]) / clvd[12] / nudsr0 11 pio[2](pioa[2]) / clcp 29 pio[20](pioa[20]) / clvd[13] / nudtr0 12 pio[3](pioa[3]) / clac 30 pio[21](pioa[21]) / clvd[14] / nudcd0 13 pio[4](pioa[4]) / cllp 31 pio[22](pioa[22]) / clvd[15] / nuri0 14 pio[5](pioa[5]) / clfp 32 pio[23](pioa[23]) / clvd[16] / nucts0 15 pio[6](pioa[6]) / clpower 33 pio[24](pioa[24]) / clvd[17] / nurst0 16 pio[7](pioa[7]) / clvd[0] 34 vpow (ac adapter voltage) 17 pio[8](pioa[8]) / clvd[1] 35 gnd 18 pio[9](pioa[9]) / clvd[2] 36 gnd
LH0E776 summary specification ver. 1.00 september 30, 2002 7 6. board layout ver1.1 jtag connecter cpu lh79532 ethernet led (green ,orange) reset led (red) reset front external in/out (cn6) dips sdram(low) power circuit power supply connecter rs232c ch1 ethernet connecter through hole for external battery rs232c ch0 external in/out (cn5) cn1 cn2 cn3 cn4 cn8 cn7 u1 u4 u5 sw2 piob led (yellow) x7 sw3 1 2 1 2 35 36 59 60 power switch sw1 1 2 19 20 1 8 sdram(high) ver1.1 rs232c ch1 external in/out (cn5) back rs232c driver ethernet ic power circuit lvc 14 lvc 32 rs232c ch0 external in/out (cn5) external in/out (cn6) cn1 cn2 cn3 cn8 u6 u2 u7 u9 cn7 1 2 1 2 35 36 59 60 1 2 19 20 cn4 flash u3 e2023 irda irda device pattern only u18 u17 jtag connecter ethernet connecter through hole for external battery power supply connecter
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