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             ? 25v/16a, r ds(on) =7.5m ? (typ.) @ v gs =10v r ds(on) =10m ? (typ.) @ v gs =4.5v ? ? ? ? ? super high dense cell design ? ? ? ? ? avalanche rated ? ? ? ? ? reliable and rugged ? ? ? ? ? thermal pad exposed with standard sop-8 outline ? ? ? ? ? lead free available (rohs compliant) n-channel mosfet sop ? 8 exposed      ? power management in notebook computer, portable equipment and battery powered systems apm4220 handling code temp. range package code package code ka : sop-8-p operating junction temp. range c : -55 to 150c handling code tu : tube tr : tape & reel lead free code l : lead free device blank : original device apm4220 ka : apm4220 xxxxx xxxxx - date code lead free code ?  ?  = thermal pad (connected to drain plane for better heat dissipation) g s d d ( 5,6,7,8 ) (4) (1, 2, 3) d d s s note: anpec lead-free products contain molding compounds/die attach materials and 100% matte in plate termina- tion finish; which are fully compliant with rohs and compatible with both snpb and lead-free soldiering operations. anpec lead-free products meet or exceed the lead-free requirements of ipc/jedec j std-020c for msl classifica- tion at lead-free peak reflow temperature.
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 # symbol parameter rating unit common ratings +  ,#%- .  *  / v dss drain-source voltage 25 v gss gate-source voltage 20 v t j maximum junction temperature 150 c t stg storage temperature range -55 to 150 c mounted on large heat sink t c =25 c 50 p d maximum power dissipation t c =100 c 20 w r jc thermal resistance-junction to case 2.5 c/w mounted on pcb of 1in 2 pad area  t a =25 c 50 i dp 300  s pulse drain current tested t a =100 c 25 a t a =25 c 16 i d continuous drain current t a =100 c 8 a t a =25 c 3 p d maximum power dissipation t a =100 c 1.2 w r ja thermal resistance-junction to ambient 40 c/w mounted on pcb of minimum footprint  t a =25 c 50 i dp 300  s pulse drain current tested t a =100 c 25 a t a =25 c 13 i d continuous drain current t a =100 c 6 a t a =25 c 2.5 p d maximum power dissipation t a =100 c 1 w r ja thermal resistance-junction to minimum footprint 50 c/w        .the value of r ja is when the device mounted on 1in 2 pad with 2oz. copper, t 10s. notes:  . the value of r ja is when the device mounted on minimum pad with 2oz. copper, t 10s.
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 0 notes: a: pulse test ; pulse width 300 s, duty cycle 2 %. b: guaranteed by design, not subject to production testing. apm4220ka symbol parameter test condition min. typ. max. unit drain-source avalanche ratings e as avalanche energy, single pulsed i d =15a, v dd =15v 50 mj static characteristics bv dss drain-source breakdown voltage v gs =0v, i ds =250 a 25 v v ds =20v, v gs =0v 1 v ds =20v, v gs =0v i dss zero gate voltage drain current t a =25 c 30 a v gs(th) gate threshold voltage v ds =v gs , i ds =250 a 1.3 1.8 2.5 v i gss gate leakage current v gs =20v, v ds =0v 100 na v gs =10v, i ds =16a 7.5 9 r ds(on) a drain-source on-state resistance v gs =4.5v, i ds =14a 10 12 m ? v sd a diode forward voltage i sd =3a, v gs =0v 0.8 1.3 v gate charge characteristics b q g total gate charge 20 26 q gs gate-source charge 4.8 q gd gate-drain charge v ds =10v, v gs =4.5v, i ds =12a 8.4 nc dynamic characteristics b r g gate resistance v gs =0v, v ds =0v, f=1mhz 2 ? c iss input capacitance 1785 c oss output capacitance 500 c rss reverse transfer capacitance v gs =0v, v ds =15v, frequency=1.0mhz 300 pf t d(on) turn-on delay time 10 19 t r turn-on rise time 7 13 t d(off) turn-off delay time 69 95 t f turn-off fall time v dd =15v, r l =15 ? , i ds =1a, v gen =10v, r g =6 ? 32 46 ns !  "#    (t a = 25 c unless otherwise noted)
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 1 1e-4 1e-3 0.01 0.1 1 10 30 1e-3 0.01 0.1 1 2 mounted on 1in 2 pad r ja : 40 o c/w 0.01 0.02 0.05 0.1 0.2 single pulse duty = 0.5 $% "#    i d - drain current (a) safe operation area v ds - drain - source voltage (v) power dissipation p tot - power (w) t j - junction temperature ( c) i d - drain current (a) drain current t j - junction temperature ( c) thermal transient impedance square wave pulse duration (sec) 0 20406080100120140160 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 0 20406080100120140160 0 3 6 9 12 15 18 0.01 0.1 1 10 100 0.01 0.1 1 10 100 rds(on) limit 1s t a =25 o c 10ms 300 s 1ms 100ms dc normalized transient thermal resistance
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 % $% "#   &" '( v ds - drain - source voltage (v) i d - drain current (a) output characteristics r ds(on) - on - resistance (m ? ) drain-source on resistance i d - drain current (a) transfer characteristics v gs - gate - source voltage (v) i d - drain current (a) t j - junction temperature ( c) gate threshold voltage normalized threshold voltage 0246810 0 10 20 30 40 50 v gs =4,5,6,7,8,9,10v 3v 2.5v 0 1020304050 0 2 4 6 8 10 12 14 16 18 v gs =10v v gs =4.5v 012345 0 10 20 30 40 50 t j =125 o c t j =25 o c t j =-55 o c -50 -25 0 25 50 75 100 125 150 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 i ds =250 a
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 2 $% "#   &" '( drain-source on resistance normalized on resistance t j - junction temperature ( c) v sd - source - drain voltage (v) source-drain diode forward i s - source current (a) v ds - drain - source voltage (v) c - capacitance (pf) capacitance gate charge q g - gate charge (nc) v gs - gate-source voltage (v) -50 -25 0 25 50 75 100 125 150 0.00 0.25 0.50 0.75 1.00 1.25 1.50 1.75 2.00 r on @t j =25 o c: 7.5m ? v gs = 10v i ds = 12a 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.1 1 10 50 t j =150 o c t j =25 o c 0 5 10 15 20 25 0 500 1000 1500 2000 2500 3000 frequency=1mhz coss ciss crss 0 5 10 15 20 25 30 35 40 0 1 2 3 4 5 6 7 8 9 10 v ds =10v i d = 12a
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 3 t d (on) t r t d (off) t f v gs v ds 90% 10% ) # $ "  
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*)   dut 0.01 ? tp v dd v ds l i l r g v dd r d dut v gs v ds r g tp e as v dd t av i as v ds t p v dsx(sus)
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 4      sop-8-p pin ( reference jedec registration ms-012) millimeters inches dim min. max. min. max. a 1.35 1.75 0.053 0.069 a1 0.10 0.25 0.004 0.010 d 4.80 5.00 0.189 0.197 d1* 3.34 3.84 0.132 0.151 e 3.80 4.00 0.150 0.157 e1* 2.23 2.68 0.088 0.106 h 5.80 6.20 0.228 0.244 l 0.40 1.27 0.016 0.050 e1 0.33 0.51 0.013 0.020 e2 1.27bsc 0.50bsc 1 8 8 h e e1 e2 0.015x45 d a a1 0.004max. 1 l e1 d1 * thermal pad dimension
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 5 terminal material solder-plated copper (solder material : 90/10 or 63/37 snpb), 100%sn lead solderability meets eia specification rsi86-91, ansi/j-std-002 category 3.  t 25 c to peak tp ramp-up t l ramp-down ts preheat tsmax tsmin t l t p 25 temperature time critical zone t l to t p  ,"
   (ir/convection or vpr reflow) #% +      "     ,    profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (t l to t p ) 3 c/second max. 3 c/second max. preheat  temperature min (tsmin)  temperature max (tsmax)  time (min to max) (ts) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above:  temperature (t l )  time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak/classificatioon temperature (tp) see table 1 see table 2 time within 5 c of actual peak temperature (tp) 10-30 seconds 20-40 seconds ramp-down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. notes: all temperatures refer to topside of the package .measured on the body surface.
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 !$ table 1. snpb entectic process ? package peak reflow temperatures package thickness volume mm 3 <350 volume mm 3 350 <2.5 mm 240 +0/-5 c 225 +0/-5 c 2.5 mm 225 +0/-5 c 225 +0/-5 c  table 2. pb-free process ? package classification reflow temperatures package thickness volume mm 3 <350 volume mm 3 350-2000 volume mm 3 >2000 <1.6 mm 260 +0 c* 260 +0 c* 260 +0 c* 1.6 mm ? 2.5 mm 260 +0 c* 250 +0 c* 245 +0 c* 2.5 mm 250 +0 c* 245 +0 c* 245 +0 c* *tolerance: the device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means peak reflow temperature +0 c. for example 260 c+0 c) at the rated msl level.  "     ,   &" '( " $ t ao e w po p ko bo d1 d f p1 test item method description solderability mil-std-883d-2003 245 c,5 sec holt mil-std 883d-1005.7 1000 hrs bias @ 125 c pct jesd-22-b, a102 168 hrs, 100% rh, 121 c tst mil-std 883d-1011.9 -65 c ~ 150 c, 200 cycles    %$   
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 !! application a b c j t1 t2 w p e 330 1 62 +1.5 12.75+ 0.15 2 0.5 12.4 0.2 2 0.2 12 0. 3 8 0.1 1.75 0.1 f d d1 po p1 ao bo ko t sop- 8-p 5.5 1 1.55 +0.1 1.55+ 0.25 4.0 0.1 2.0 0.1 6.4 0.1 5.2 0. 1 2.1 0.1 .3 0.013 ") $      anpec electronics corp. head office : 5f, no. 2 li-hsin road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 taipei branch : 7f, no. 137, lane 235, pac chiao rd., hsin tien city, taipei hsien, taiwan, r. o. c. tel : 886-2-89191368 fax : 886-2-89191369 " + )  application carrier width cover tape width devices per reel sop- 8-p 12 9.3 2500  " $ &" '( a j b t2 t1 c (mm)


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