38 ghz lna technical data features ? low noise figure: 4.8 db ? frequency range: 37C40ghz ? high gain (adjustable): 3 v, 120 ma @ 23 db gain 3 v, 80 ma @ 20 db gain ? 50 w input/output matching description the HMMC-5038 mmic is a high- gain low-noise amplifier (lna) designed for communication receivers that operate from 37 ghz to 40 ghz. the gain of this four stage lna can be adjusted by altering the gate bias of the output two, or three, stages while maintaining optimum noise figure bias for the input stage(s). large fets provide high power handing capability to avoid power compression. the backside of the chip is both rf and dc ground. this helps simplify the assembly process and reduce assembly related performance variations and costs. the HMMC-5038 is fabricated using a phemt integrated circuit structure that provides good noise and gain performance. chip size: 1630 x 760 m m (64.2 x 29.9 mils) chip size tolerance: 10 m m ( 0.4 mils) chip thickness: 127 15 m m (5.0 0.6 mils) pad dimensions: 80 x 80 m m (3.1 x 3.1 mils) HMMC-5038 absolute maximum ratings [1] symbol parameters/conditions units min. max. v d1, 2-3-4 drain supply voltages v 5 i g1, 2-3-4 gate supply voltages v -3.0 0 i dd total drain current ma 300 p in rf input power dbm 15 t ch channel temperature [2] c +160 t a backside ambient temp. c -55 +125 t stg storage temperature c -65 +165 t max maximum assembl y temp. c +310 note: 1. absolute maximum ratings for continuous operation unless otherwise noted. 2. refer to dc specifications/physical properties table for derating information.
2 dc specifications/physical properties [1] symbol parameters and test conditions units min. typ. max. v d1, 2-3-4 low noise drain supply operating voltages v 2 3 5 i d1 first stage drain supply current ma 22 (v dd = 3 v, v g1 = -0.8 v) i d2-3-4 drain supply current for stages 2, 3, and 4 combined ma 98 (v dd = 3 v, v gg = -0.8 v) v g1, 2, 3-4 gate supply operating voltages (i dd = 120 ma) v -0.8 v p pinch-off voltage (v dd = 3 v, i dd 10 ma) v -2 -1.2 -0.8 q ch-bs thermal resistance [2] c/w 62 (channel-to-backside @ t ch = 160 c) t ch channel temperature [3] (t a = 125 c, mttf > 10 6 hrs, c 150 v dd = 3 v, i dd = 120 ma) notes: 1. backside ambient operating temperature t a = 25 c unless otherwise noted. 2. thermal resistance ( c/watt) at a channel temperature t ( c) can be estimated using the equation: q (t) @ 62 x [t( c)+ 273] / [160 c + 273]. 3. derate mttf by a factor of two for every 8 c above t ch . rf specifications, t a = 25 c, v dd = 3 v, i dd = 120 ma, z o = 50 w symbol parameters and test conditions units min. typ. max. bw operating bandwidth ghz 37 40 s 21 small signal gain [1] db 20 23 d s 21 small signal gain flatness db 0.5 (rl in ) min minimum input return loss w/o external db 8 12 capacitive matching [2] (rl out ) min minimum output return loss db 12 18 s 12 reverse isolation db 50 p -1db output power @ 1db gain compression dbm 12 nf noise figure [3] db 4.8 notes: 1. gain may be reduced by biasing for lower i dd . increasing i dd will increase gain. 2. minimum input return may be improved by approximately 3 db by including a small capacitive (~30 ff) stub on the input transmission line. 3. noise figure may be further reduced by optimizing dc bias conditions.
3 applications the HMMC-5038 low noise amplifier (lna) is designed for use in digital radio communica- tion systems and point-to- multipoint links that operate within the 37 ghz to 40 ghz frequency band. high gain and low noise temperature make it ideally suited as a front-end gain stage in the receiver. the mmic solution is a cost effective alternative to hybrid assemblies. biasing and operation the recommended dc bias condition is with all drains connected to single 3 volt supply and all gates connected to an adjustable negative voltage supply as shown in figure 1(a). the gate voltage is adjusted for a total drain supply current of typically 120 ma. reducing the current in stages 3 and 4 will reduce the overall gain. the gain can be adjusted further by altering the current through stage 2 with little affect on noise figure. optimum noise figure is realized with v d1 = 3 to 4 volts and i d1 = 20 to 25 ma. the second, third, and fourth stage dc drain bias lines are connected internally and there- fore require only a single bond wire. an additional bond wire is needed for the first stage dc drain bias, v d1 . the third and fourth stage dc gate bias lines are connected internally. a total of three dc gate bond wires are required: one for v g1 , one for v g2 , and one for the v g3 -to-v g4 connection as shown in figure 1. a dc blocking capacitor is needed in the rf input transmis- sion line only if there is dc voltage present. the rf output is ac-coupled. optimum input match is achieved when an optional capacitive (~30 ff) stub is included on the input transmission line. this capacitance compliments the bond wire inductance to com- plete the input matching network. no ground wires are needed because ground connections are made with plated through-holes to the backside of the device. assembly techniques a conductive epoxy such as ablebond ? 71-1lm1 or ablebond ? 84-1lm1 is the recommended assembly method provided the absolute maximum thermal ratings are not exceeded. solder die attach using a fluxless gold-tin (ausn) solder preform may also be used. the device should be attached to an electrically conductive surface to complete the dc and rf ground paths. the backside metallization on the device is gold. it is recommended that the rf input and rf output connections be made using either 500 line/inch (or equivalent) gold wire mesh, or dual 0.7 mil diameter gold wire. the rf wires should be kept as short as possible to minimize inductance. the bias supply can be 0.7 mil diameter gold wires. thermosonic wedge is the preferred method for wire bonding to the gold bond pads. mesh wires can be attached using a 2 mil round tacking tool and a tool force of approximately 22 grams with an ultrasonic power of roughly 55 db for a duration of 76 8 msec. a guided- wedge at an ultrasonic power level of 64 db can be used for the 0.7 mil wire. the recommended wire bond stage temperature is 150 2 c. for more detailed information see agilent application note #999 gaas mmic assembly and handling guidelines. gaas mmics are esd sensitive. proper precautions should be used when handling these devices.
4 figure 1. HMMC-5038 common assembly diagrams. (note: to assure stable operation, bias supply feeds should be bypassed to ground with a capacitor, c b > 100 nf typical.) figure 2. HMMC-5038 bonding pad locations. (dimensions in micrometers) (a) single drain-supply and single gate-supply assembly. (b) separate first-stage gate bias supply. this diagram shows an optional variation to the v g2 jumper-wire bonding scheme presented in (a). 600 120 1090 1550 1630 0 ( @ 100 pf) ( @ 100 pf) ( @ 100 pf) ( @ 100 pf) 0 330 660 0 80 500 760 0 80 350 620 820 1070 1360
5 100 0 50 36 40 39 37 38 42 41 43 small signal gain (db) reverse isolation (db) frequency (ghz) figure 3. gain and isolation vs. frequency. spec range (37 ?40 ghz) isolation gain v dd = 3.0 v, i d1 = 25 ma, i d2,3,4 = 95 ma 0 10 20 30 40 40 120 100 60 80 140 160 noise figure (db) gain (db) i dd (ma) figure 6. 38 ghz noise figure and gain vs. i dd . noise figure gain v dd = 3.0 v 3 4 5 6 7 10 15 20 25 30 24 4 36 40 39 37 38 42 41 43 input return loss (db) output return loss (db) frequency (ghz) figure 4. input and output return loss vs. frequency. spec range (37 ?40 ghz) output input v dd = 3.0 v, i d1 = 25 ma, i d2,3,4 = 95 ma 24 20 16 12 4 8 20 16 12 8 36 40 39 37 38 42 41 43 noise figure (db) frequency (ghz) figure 5. noise figure vs. frequency. spec range (37 ?40 ghz) v dd = 4.0 v, i d1 = 25 ma, i d2,3,4 = 60 to 125 ma 0 2 4 6 10 8 40 120 100 60 80 140 p -1 (dbm) gain (db) i d2,3,4 (ma) figure 7. 38 ghz gain and power performance vs. i d2,3,4 . gain p -1 v dd = 4.0 v, i d1 = 25 ma 0 5 10 15 20 10 15 20 25 30
this data sheet contains a variety of typical and guaranteed performance data. the information supplied should not be interpreted as a complete list of circuit specifica- tions. in this data sheet the term typical refers to the 50th percentile performance. for additional information contact your local agilent sales representative. www.semiconductor.agilent.com data subject to change. copyright ? 1999 agilent technologies 5965-5445e (11/99)
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