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revisions ltr description date (yr-mo-da) approved a make corrections on sheet 11 terminal connections for case outline x. update boilerplate to mil-prf-38535 requirements.- ltg 02-08-27 thomas m. hess rev sheet rev a a a sheet 15 16 17 18 19 20 rev status rev a a a a of sheets sheet 1 2 3 4 5 6 7 8 9 10 11 12 13 14 pmic n/a prepared by larry t. gauder defense supply center columbus standard microcircuit drawing checked by thanh v. nguyen columbus, ohio 43216 http://www.d scc.dla.mil this drawing is available for use by all departments approved by monica l. poelking microcircuit, digital, cmos, 8-bit microcontroller, monolithic silicon and agencies of the department of defense drawing approval date 00-10-05 amsc n/a revision level a size a cage code 67268 5962-00518 sheet 1 of 20 dscc form 2233 apr 97 5962-e559-02 distribution statement a . approved for public releas e; distribution is unlimited.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 2 dscc form 2234 apr 97 1. scope 1.1 scope . this drawing documents two product assurance class le vels consisting of high reliability (device classes q and m) and space application (device class v). a choice of case outlines and lead finishes are available and are reflected in the part or identifying number (pin). when available, a choice of radiation hardness assurance (rha ) levels are reflected in the pin. 1.2 pin . the pin is as shown in the following example: 5962 - 00518 01 q q x ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? federal rha device device case lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) des ignator (see 1.2.4) (see 1.2.5) \ / (see 1.2.3) \/ drawing number 1.2.1 rha designator . device classes q and v rha marked devices meet the mil-prf-38535 specified rha levels and are marked with the appropriate rha designator. device class m rha marked devices meet the mil-prf-38535, appendix a specified rha levels and are marked with the appropriate rha designator. a dash (-) indicates a non-rha device. 1.2.2 device type(s) . the device type(s) identify the circuit function as follows: device type generic number circuit function 01 80c32 cmos 8-bit microcontroller 1.2.3 device class designator . the device class designator is a single letter identifying the product assurance level as follows: device class device requirements documentation m vendor self-certification to the requirements for mil-std-883 compliant, non-jan class level b microcircuits in accordance with mil-prf-38535, appendix a q or v certification and qualification to mil-prf-38535 1.2.4 case outline(s) . the case outline(s) are as designated in mil-std-1835 and as follows: outline letter descriptive designator terminals package style q cdip2-t40 40 dual-in-line package x cqcc2-j44 44 leaded chip carrier 1.2.5 lead finish . the lead finish is as specified in mil-pr f-38535 for device classes q and v or mil-prf-38535, appendix a for device class m.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level a sheet 3 dscc form 2234 apr 97 1.3 absolute maximum ratings . 1 / supply voltage (v dd ) ............................................................................................ -0.3 v to +7.0 v input voltage (v in ) ............................................................................................ -0.3 v to v dd +0.3 v output current (i out ) ............................................................................................... 80 ma power dissipation (p d ) ............................................................................................ 0.3 w storage temperature range (t stg )............................................................................ -65 c to 150 c lead temperature (solder ing 10 seconds ).............................................................. +265 c junction temperature (t j ) ....................................................................................... 165 c thermal resistance, junction to case ( jc ).............................................................. 30 c/w 1.4 recommended operating conditions . supply voltage range (v dd )..................................................................................... 4.5 v dc to 5.5 v dc case operating temperature range (t c ) ................................................................. -55 c to +125 c 2. applicable documents 2.1 government specification, standards, and handbooks . the following specification, standards, and handbooks form a part of this drawing to the extent specified herein. unless ot herwise specified, the issues of these documents are those liste d in the issue of the department of defense i ndex of specifications and standards (dodi ss) and supplement thereto, cited in the solicitation. specification department of defense mil-prf-38535 - integrated circuits, manufacturing, general specification for. standards department of defense mil-std-883 - test method standard microcircuits. mil-std-1835 - interface standard electronic component case outlines. handbooks department of defense mil-hdbk-103 - list of standard microcircuit drawings. mil-hdbk-780 - standard microcircuit drawings. (unless otherwise indicated, copies of the specificat ion, standards, and handbooks are ava ilable from the standardization document order desk, 700 robbins avenue, building 4d, philadelphia, pa 19111-5094.) 1 / stresses above the absolute maximum rating may cause permanent damage to the device. extended operation at the maximum levels may degrade performance and affect reliability.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level a sheet 4 dscc form 2234 apr 97 2.2 order of precedence . in the event of a conflict between the text of th is drawing and the references cited herein, the text of this drawing takes precedence. nothing in this docum ent, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. requirements 3.1 item requirements . the individual item requirements for device classes q and v shall be in accordance with mil-prf-38535 and as specified herein or as modified in the device manufacturer' s quality management (qm) plan. the modification in the qm plan shall not affect the form, fit, or function as described herein. the individual item requirements for device class m shall be in accordance with mil-prf-38535, appendix a for non-jan class level b devices and as specified herein. 3.2 design, construction, and physical dimensions . the design, construction, and physica l dimensions shall be as specified in mil-prf-38535 and herein for device classes q and v or mil-prf-38535, appendix a and herein for device class m. 3.2.1 case outline(s) . the case outline(s) shall be in accordance with 1.2.4. 3.2.2 terminal connections . the terminal connections sha ll be as specified on figure 1. 3.2.3 functional diagram . the functional diagram sha ll be as specified on figure 2. 3.2.4 timing waveforms . the timing waveforms shall be as specified on figure 3. 3.3 electrical perform ance characteristics and posti rradiation parameter limits . unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as s pecified in table i and shall apply over th e full case operating temperature range. 3.4 electrical test requirements . the electrical test requirements shall be the subgroups specified in t able ii. the electrical tests for each subgroup are defined in table i. 3.5 marking . the part shall be marked with the pin listed in 1.2 her ein. in addition, the manufacturer's pin may also be marked as listed in mil-hdbk-103. for pa ckages where marking of the entire smd pi n number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. for rha product using this option, the rha designator shall still be marked. marking for device cl asses q and v shall be in accordance with mil-prf-38535. marking for device class m shall be in accordance with mil-prf-38535, appendix a. 3.5.1 certification/compliance mark . the certification mark for device classes q and v shall be a "qml" or "q" as required in mil-prf-38535. the compliance mark for device class m shall be a "c" as required in mil-prf-38535, appendix a. 3.6 certificate of compliance . for device classes q and v, a certificate of compliance shall be required from a qml-38535 listed manufacturer in order to supply to t he requirements of this drawing (see 6.6.1 herein). for device class m, a certifica te of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in mil-hdbk-103 (see 6.6.2 herein). the certificate of compliance submitted to ds cc-va prior to listing as an approv ed source of supply for this drawing shall affirm that the manufactu rer's product meets, for device classes q and v, the requirements of mil-prf-38535 and herein or for device class m, the requi rements of mil-prf-38535, appendix a and herein. 3.7 certificate of conformance . a certificate of conformance as required for device classes q and v in mil-prf-38535 or for device class m in mil-prf-38535, appendix a s hall be provided with each lot of microcircuits delivered to this drawing. 3.8 notification of change for device class m . for device class m, notification to dscc-va of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in mil-prf-38535, appendix a.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 5 dscc form 2234 apr 97 3.9 verification and review for device class m . for device class m, dscc, dscc's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. offs hore documentation shall be made available onshore at the option of the reviewer. 3.10 microcircuit group assignment for device class m . device class m devices covered by this drawing shall be in microcircuit group number 105 (see mil-prf-38535, appendix a).
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 6 dscc form 2234 apr 97 table i. electrical per formance characteristics . test symbol conditions -55 c t c +125 c unless otherwise specified group a subgroups device type limits unit min max v oh1 i oh = -400 a v dd = 4.5 v, v ss = 0.0 v 1, 2, 3 all 2.4 v v oh2 i oh = -60 a v dd = 4.5 v, v ss = 0.0 v 1, 2, 3 all 2.4 v v oh3 1 / i oh = -150 a v dd = 4.5 v, v ss = 0.0 v 1, 2, 3 all 3.375 v v oh4 1 / i oh = -25 a v dd = 4.5 v, v ss = 0.0 v 1, 2, 3 all 3.375 v v oh5 1 / i oh = -40 a v dd = 4.5 v, v ss = 0.0 v 1, 2, 3 all 4.05 v high output voltage v oh6 1 / i oh = -10 a v dd = 4.5 v, v ss = 0.0 v 1, 2, 3 all 4.04 v v ol1 i ol = 3.2 ma v dd = 4.5 v, v ss = 0.0 v 1, 2, 3 all 0.45 v low output voltage v ol2 i ol = 1.6 ma v dd = 4.5 v, v ss = 0.0 v 1, 2, 3 all 0.45 v quiescent current i dd 2 / v dd = 5.5 v, v ss = 0.0 v f = 30 mhz 1, 2, 3 all 15 ma supply current i dd(s) 3 / v dd = 5.5 v, v ss = 0.0 v f = 30 mhz 1, 2, 3 all 50 ma i dd(pd1) 1 / 4 / v dd = 2.0 v, v ss = 0.0 v 1, 2, 3 all 75 a power down supply current i dd(pd2) 4 / v dd = 5.5 v, v ss = 0.0 v 1, 2, 3 all 75 a low level input leakage current i il v in (under test) = 0.45 v v dd = 5.5 v, v ss = 0.0 v 1, 2, 3 all -10 10 a high level input leakage current i ih v in (under test) = 5.5 v v dd = 5.5 v, v ss = 0.0 v 1, 2, 3 all -10 10 a see footnotes at end of table.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 7 dscc form 2234 apr 97 table i. electrical per formance characteristics ? continued. test symbol conditions -55 c t c +125 c unless otherwise specified group a subgroups device type limits unit min max low level input current i il2 v in (under test) = 0.45 v v in (remaining inputs) = 0.0 v v dd = 5.5 v, v ss = 0.0 v 1, 2, 3 all -75 a high to low transition current i it v in (under test) = 2.0 v v in (remaining inputs) = 0.0 v v dd = 5.5 v, v ss = 0.0 v 1, 2, 3 all -750 a input clamp voltage (to v ss ) 1 / v ic1 i in (under test) = 100 a v dd = open, v ss = 0.0 v 1, 2, 3 all 0.2 v input clamp voltage (to v dd ) 1 / v ic2 i in (under test) = 100 a v dd = 0.0 v, v ss = open 1, 2, 3 all -0.2 v reset resistor rrst v dd = 4.5 v 1, 2, 3 all 50 200 k ? functional test 1 5 / instruction set verify truth table without load v il = 0.0 v, v ih = 3.0 v v out = 1.5 v v dd = 4.0 v, v ss = 0.0 v f = 1.0 mhz see 4.4.1b 7, 8 all functional test 2 5 / internal register verify truth table without load v il = 0.0 v, v ih = 3.0 v v out = 1.5 v, f = 1.0 mhz v dd = 5.5 v, v ss = 0.0 v see 4.4.1b 7, 8 all functional test 3 5 / interrupts verify truth table without load v il = 0.8 v, v ih = 2.2 v v out = 1.5 v, f = 1.0 mhz v dd = 4.5 v, v ss = 0.0 v see 4.4.1b 7, 8 all functional test 4 5 / timer verify truth table without load v il = 0.8 v, v ih = 2.2 v v out = 1.5 v, f = 1.0 mhz v dd = 5.5 v, v ss = 0.0 v see 4.4.1b 7, 8 all functional test 5 5 / serial port verify truth table with load v il = 0.0 v, v ih = 3.0 v v out = 1.5 v, f = 1.0 mhz v dd = 4.5 v, v ss = 0.0 v see 4.4.1b outputs: 1ttl +50 pf 7, 8 all see footnotes at end of table.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 8 dscc form 2234 apr 97 table i. electrical per formance characteristics ? continued. test symbol conditions -55 c t c +125 c unless otherwise specified group a subgroups device type limits unit min max functional test 6 5 / external data verify truth table with load v il = 0.0 v, v ih = 3.0 v v out = 1.5 v, , f = 1.0 mhz v dd = 5.5 v, v ss = 0.0 v see 4.4.1b outputs: 1ttl +50 pf 7, 8 all functional test 7 5 / program counter verify truth table with load v il = 0.0 v, v ih = 3.0 v v out = 1.5 v, , f = 12 mhz v dd = 4.5 v, v ss = 0.0 v see 4.4.1b outputs: 1ttl +50 pf 7, 8 all functional test 8 5 / ram verify truth table with load v il = 0.0 v, v ih = 3.0 v v out = 1.5 v, , f = 12 mhz v dd = 5.5 v, v ss = 0.0 v see 4.4.1b outputs: 1ttl +50 pf 7, 8 all input/output capacitance c in /c out v in/out (not under test) = 0 v v dd = v ss = 0.0 v f = 1.0 mhz, see 4.4.1c 4 all 10 pf ale pulse width 6 / t lhll 9, 10, 11 all 60 ns address valid to ale 6 / t avll 9, 10, 11 all 15 ns address hold to ale 6 / t llax 9, 10, 11 all 35 ns ale to valid inst. in 6 / t lliv 9, 10, 11 all 100 ns psen to valid inst. in 6 / t pliv 9, 10, 11 all 65 ns address to valid inst. in 6 / t aviv f = 30 mhz v dd = 4.5 v and 5.5 v, v ss = 0.0 v see figure 4 9, 10, 11 all 130 ns see footnotes at end of table.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 9 dscc form 2234 apr 97 table i. electrical per formance characteristics ? continued. test symbol conditions -55 c t c +125 c unless otherwise specified group a subgroups device type limits unit min max rd to valid data in 6 / t rldv 9, 10, 11 all 135 ns ale to valid data in 6 / t lldv 9, 10, 11 all 235 ns ale to wr 6 / t llwl 9, 10, 11 all 90 115 ns address to wr 6 / t avwl 9, 10, 11 all 115 ns address to rd 6 / t avrl 9, 10, 11 all 115 ns ale to psen 1 / t llpl 9, 10, 11 all 25 ns psen pulse width 1 / t plph 9, 10, 11 all 80 ns psen to in inst. hold 1 / t pxix 9, 10, 11 all 0.0 ns psen to address valid 1 / t pxav 9, 10, 11 all 30 ns rd pulse width 1 / t rlrh 9, 10, 11 all 180 ns wr pulse width 1 / t wlwh 9, 10, 11 all 180 ns ale to data address hold 1 / t llaxr 9, 10, 11 all 55 ns rd to data hold 1 / t rhdx 9, 10, 11 all 0.0 ns rd to data float 1 / t rhdz 9, 10, 11 all 60 ns address to valid data in 1 / t avdv 9, 10, 11 all 260 ns ale to rd 1 / t llrl 9, 10, 11 all 90 115 ns data valid to wr 1 / t qvwx 9, 10, 11 all 20 ns data setup to wr high 1 / t qvwh 9, 10, 11 all 215 ns wr to data hold 1 / t whqx 9, 10, 11 all 20 ns rd low to address float 1 / t rlaz 9, 10, 11 all 0.0 ns wr high to ale high 1 / t whlh f = 30 mhz v dd = 4.5 v and 5.5 v, v ss = 0.0 v see figure 4 9, 10, 11 all 20 40 ns see footnotes at end of table.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 10 dscc form 2234 apr 97 table i. electrical per formance characteristics ? continued. test symbol conditions -55 c t c +125 c unless otherwise specified group a subgroups device type limits unit min max rd high to ale high 1 / t rhlh 9, 10, 11 all 20 40 ns serial port clock cycle time 1 / t xlxl 9, 10, 11 all 400 ns out data setup to clock 1 / t qvxh 9, 10, 11 all 300 ns clock to out data hold 1 / t xhqx 9, 10, 11 all 50 ns clock to in data hold 1 / t xhdx 9, 10, 11 all 0.0 ns clock high to in data valid 1 / t xhdv f = 30 mhz v dd = 4.5 v and 5.5 v, v ss = 0.0 v see figure 4 9, 10, 11 all 300 ns 1 / guaranteed but not tested. 2 / i dd is measured with all output pins disconnected; xtal1 driven with t clch = t chcl = 5.0 ns, v il = v ss +0.5 v, v ih = v dd ?0.5v; xtal2 = nc; ea = rst = v ss ; port0 = v dd . 3 / i dd(s) is measured with all output pins disconnected; xtal1 driven with t clch = t chcl = 5.0 ns, v il = v ss +0.5 v, v ih = v dd ?0.5v; xtal2 = nc; port0 = ea = rst = v ss . 4 / i dd(pd) is measured with all output pi ns disconnected; ea = port0 = v dd ; xtal2 = nc; xtal1 = rst = v ss . 5 / functional test includes: instruction set, internal registers, interrupts, timer, serial port, external data, program counte r, ram, idle mode, power-down mode. other parameters (guaranteed): v il min = -0.5 v v il max = 0.2v dd ?0.25 v (0.85 v at 5.5 v) except pin ea: v il max = 0.2v dd ?0.45 v. v ih max = v dd +0.5 v v ih min = 0.2v dd +1.1 v (2.0 v at 4.5 v) except pins xtal1, reset: v ih min = 0.7v dd +0.2 v. 6 / measurements shall be performed on a 100 percent basis, read and record.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level a sheet 11 dscc form 2234 apr 97 device type 01 case outline q pin number pin symbol pin number pin symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 t2/p1.0 t2ex/p1.1 p1.2 p1.3 p1.4 p1.5 p1.6 p1.7 rst p3.0/rxd p3.1/txd p3.2/int0 p3.3/int1 p3.4/t0 p3.5/t1 p3.6/wr p3.7/rd xtal2 xtal1 v ss 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 p2.0 p2.1 p2.2 p2.3 p2.4 p2.5 p2.6 p2.7 psen ale ea p0.7 p0.6 p0.5 p0.4 p0.3 p0.2 p0.1 p0.0 v dd device type 01 case outline x pin number pin symbol pin number pin symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 nc t2/p1.0 t2ex/p1.1 p1.2 p1.3 p1.4 p1.5 p1.6 p1.7 rst p3.0.rxd nc p3.1/txd p3.2/int0 p3.3/int1 p3.4/t0 p3.5/t1 p3.6/wr p3.7/rd xtal2 xtal1 v ss 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 nc p2.0 p2.1 p2.2 p2.3 p2.4 p2.5 p2.6 p2.7 psen ale nc ea p0.7 p0.6 p0.5 p0.4 p0.3 p0.2 p0.1 p0.0 v dd nc = no connection. figure 1. terminal connections .
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 12 dscc form 2234 apr 97 note: 1. for this device, the rom is only externally addressable and by using ea signal requirements. figure 2. functional diagram .
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 13 dscc form 2234 apr 97 figure 3. timing waveforms .
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 14 dscc form 2234 apr 97 figure 3. timing waveforms ? continued.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 15 dscc form 2234 apr 97 shift register timing waveforms symbol parameter min max unit t xlxl serial port clock time 12t clcl s t qvxh output data setup to clock rising edge 10t clcl -133 ns t xhqx output data hold after clock rising edge 2t clcl -117 ns t xhdx input data hold after clock rising edge 0 ns t xhdv clock rising edge to input data valid -- 10t lcl -133 ns figure 3. timing waveforms ? continued.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level a sheet 16 dscc form 2234 apr 97 4. quality assurance provisions 4.1 sampling and inspection . for device classes q and v, sampling and inspection procedures shall be in accordance with mil-prf-38535 or as modified in the device manufacturer's qua lity management (qm) plan. the modification in the qm plan shall not affect the form, fit, or function as described herein. for device class m, sampling and inspection procedures shall be in accordance with mil-prf-38535, appendix a. 4.2 screening . for device classes q and v, screening shall be in accordance with mil-prf-38535, and shall be conducted on all devices prior to qualification and technology conform ance inspection. for device class m, screening shall be in accordance with method 5004 of mil-std-883, and shall be conduct ed on all devices prior to qua lity conformance inspection. 4.2.1 additional criteria for device class m . a. burn-in test, method 1015 of mil-std-883. (1) test condition b. the test circuit shall be maintai ned by the manufacturer under document revision level control and shall be made available to the preparing or acquiring ac tivity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015. (2) t a = +125 c, minimum. b. interim and final electrical test parameter s shall be as specified in table ii herein. 4.2.2 additional criteria for device classes q and v . a. the burn-in test duration, test condi tion and test temperature, or approved alte rnatives shall be as specified in the device manufacturer's qm plan in accordance with mil-prf- 38535. the burn-in test circuit shall be maintained under document revision level control of the device manufacturer' s technology review board (trb) in accordance with mil-prf-38535 and shall be made available to the acquiring or preparing activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of mil-std-883. b. interim and final electrical test parameter s shall be as specified in table ii herein. c. additional screening for device class v beyond the require ments of device class q shall be as specified in mil-prf-38535, appendix b. 4.3 qualification inspection for device classes q and v . qualification inspection for device classes q and v shall be in accordance with mil-prf-38535. inspections to be perform ed shall be those specified in mil-prf-38535 and herein for groups a, b, c, d, and e inspec tions (see 4.4.1 through 4.4.4). 4.4 conformance inspection . technology conformance inspection for cl asses q and v shall be in accordance with mil-prf-38535 including groups a, b, c, d, and e inspections and as specified herein. qualit y conformance inspection for device class m shall be in accordance with mil-prf-38535, appendi x a and as specified herein. inspections to be performed for device class m shall be those specified in method 5005 of mi l-std-883 and herein for groups a, b, c, d, and e inspections (see 4.4.1 through 4.4.4).
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level a sheet 17 dscc form 2234 apr 97 4.4.1 group a inspection . a. tests shall be as specified in table ii herein. b. for device class m, subgroups 7 and 8 tests shall be sufficient to verify the truth table. for device classes q and v, subgroups 7 and 8 shall include verifying the functionality of the device. c. subgroup 4 (c in and c out measurements) shall be measured only for t he initial test and after process or design changes which may affect input capacitance. a minimum samp le of 3 devices with zero rejects shall be required. table ii. electrical test requirements . test requirements subgroups (in accordance with mil-std-883, method 5005, table i) subgroups (in accordance with mil-prf-38535, table iii) device class m device class q device class v interim electrical parameters (see 4.2) final electrical parameters (see 4.2) 1 / 1, 2, 3, 4, 5, 6, 7, 8a, 8b, 9, 10, 11 1 / 1, 2, 3, 4, 5, 6, 7,8a, 8b, 9, 10, 11 2 / 1, 2, 3, 4, 5, 6, 7,8a, 8b, 9, 10, 11 group a test requirements (see 4.4) 1, 2, 3, 4, 5, 6, 7, 8a, 8b, 9, 10, 11 1, 2, 3, 4, 5, 6, 7,8a, 8b, 9, 10, 11 1, 2, 3, 4, 5, 6, 7,8a, 8b, 9, 10, 11 group c end-point electrical parameters (see 4.4) 1, 4, 7, 9 1, 4, 7, 9 1, 2, 3, 4, 5, 6, 7, 8a, 8b, 9, 10, 11 group d end-point electrical parameters (see 4.4) 1, 4, 7, 9 1, 4, 7, 9 1, 4, 7, 9 group e end-point electrical parameters (see 4.4) 1, 4, 7, 9 1, 4, 7, 9 1, 4, 7, 9 1 / pda applies to subgroup 1. 2 / pda applies to subgroups 1 and 7. 4.4.2 group c inspection . the group c inspection end-point electrical param eters shall be as specified in table ii herein. 4.4.2.1 additional criteria for device class m . steady-state life test conditions, method 1005 of mil-std-883: a. test condition b. the test circuit shall be maintai ned by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in acco rdance with the intent specified in test method 1005 of mil-std-883. b. t a = +125 c, minimum. c. test duration: 1,000 hours, except as permitted by method 1005 of mil-std-883.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level a sheet 18 dscc form 2234 apr 97 4.4.2.2 additional criteria for device classes q and v . the steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's qm plan in accordance with mil-prf-38535. the test circuit shall be maintained under document revision level c ontrol by the device manufacturer's trb in accordance with mil-prf-38535 and shall be made available to the acquiring or prepar ing activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of mil-std-883. 4.4.3 group d inspection . the group d inspection end-point electrical param eters shall be as specified in table ii herein. 4.4.4 group e inspection . group e inspection is required only for par ts intended to be marked as radiation hardness assured (see 3.5 herein). a. end-point electrical parameters shall be as specified in table ii herein. b. for device classes q and v, the devices or test vehicl e shall be subjected to radiation hardness assured tests as specified in mil-prf-38535 for the rha level being tested. for device class m, the devices shall be subjected to radiation hardness assured tests as specified in mil- prf-38535, appendix a for the rha level being tested. all device classes must meet the postirradiation end-point el ectrical parameter limits as defined in table i at t a = +25 c 5 c, after exposure, to the subgroups specified in table ii herein. c. when specified in the purchase or der or contract, a copy of the rha delta limits shall be supplied. 5. packaging 5.1 packaging requirements . the requirements for packaging shall be in accordance with mil-prf-38535 for device classes q and v or mil-prf-38535, appendix a for device class m. 6. notes 6.1 intended use . microcircuits conforming to this drawing are intended for use for gove rnment microcircuit applications (original equipment), design applic ations, and logistics purposes. 6.1.1 replaceability . microcircuits covered by this drawing will repl ace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 substitutability . device class q devices will replace device class m devices. 6.2 configuration control of smd's . all proposed changes to existing smd's will be coordinated with the users of record for the individual documents. this coordination will be accomplished using dd form 1692, engineering change proposal. 6.3 record of users . military and industrial users should inform de fense supply center columbus when a system application requires configuration control and which smd's are applic able to that system. dscc will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. users of drawings covering microelectronic devices (fsc 5962) shoul d contact dscc-va, telephone (614) 692-0544. 6.4 comments . comments on this drawing should be directed to dscc-va , columbus, ohio 43216-5000, or telephone (614) 692-0547. 6.5 abbreviations, symbols, and definitions . the abbreviations, symbols, and definitions used herein are defined in mil-prf-38535, mil-hdbk-1331, and as follows:
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 19 dscc form 2234 apr 97 pin descriptions . port 0 - port 0 is an 8-bit open drain bi-directional i/o port. po rt 0 pins that have 1?s written to them float and in that st ate can be used as high impedance inputs. port 0 is also the mult iplexed low-order address and data bus during accesses to external program and data memory. in this application, it uses strong internal pull-ups when emitting 1?s. external pull-ups are required duri ng program verification. port 0 can sink eight ls ttl inputs. port 0 also outputs the code bytes during program verification in the device. port 1 - port 1 is an 8-bit bi-directional i/o port with internal pull-ups. port 1 pi ns that have 1?s written to them are pull ed high by the internal pull-ups, and in that state can be used as inputs. as inputs, port 1 pins that are externally being pulled low will source current because of the internal pull-ups. port 1 also receives the low order address byte during program verification. it can drive cmos inputs without external pull-ups. also in this device port 1 can sink/source three ls ttl inputs. two inputs of port 1 are also used for timer/counter 2: - p1.0 (t2): external clock inputs. - p1.1 (t2ex): trigger input to be reloaded or c aptured causing timer/counter 2 to interrupt. port 2 - port2 is an 8-bit bi-directional i/o port with internal pull-ups. port 2 pins that have 1?s written to them are pulle d high by the internal pull-ups and in that state can be used as input s. as inputs, port 2 pins that are externally being pulled low will source current because of the internal pull-ups. port 2 emits the high-order addr ess byte during fetches from external program memory and during accesses to external data memory that use 16-bit addresses. in this application, it uses strong internal pull-ups when emitting 1?s. duri ng access to external data memory that use 8-bit addresses, port 2 emits the contents of the p2 special function register. port 2 can sink/source three ls ttl inputs. it can drive cmos inputs with external pull-ups. and in this device port 2 also receives the high-order address bits and control signals during program verification. port 3 - port 3 is an 8-bit bi-directional i/o port with internal pull-ups. port 3 pi ns that have 1?s written to them are pull ed high by the internal pull-ups and in that state can be used as input s. as inputs, port 3 pins that are externally being pulled low will source current because of the pull-ups. it also serv es the functions of various s pecial features of the mcs-51 familyas listed below. port pin alternate function p3.0 p3.1 p3.2 p3.3 p3.4 p3.5 p3.6 p3.7 rxd (serial input port) txd (serial output port) int0 (external interrupt 0) int1 (external interrupt 1) t0 (timer 0 external input) t1 (timer 1 external input) wr (external data memory write strobe) rd (external data memory read strobe) port 3 can sink/source three ls ttl inputs. it can drive cmos inputs without external pull-ups. rst - a high level on this for two machine cycles while the o scillator is running, resets the device. an internal pull-down resistor permits power-on rese t using only a capacitor connected to v dd . as soon as the reset is applied (v in ), ports 1, 2 and 3 are tied to ?1?. this operation is achi eved asynchronously even if the oscillator does not startup. ale - address latch enable output for latching the low byte of the address during accesses to external memory. ale is activated as though for this purpose at a constant rate of 1/6 of the o scillator frequency except during an external data memory access at which time one ale pulse is ski pped. ale can sink/source 8 ls ttl inputs. it can drive cmos inputs without an external pull-up.
standard microcircuit drawing size a 5962-00518 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 20 dscc form 2234 apr 97 pin descriptions - continued. psen - program store enable is the read strobe to external program memory. psen is activated twice each machine cycle during fetches from external program memory (how ever, when executing out of external program memory, two activations of psen are skipped during each access to exte rnal data memory). psen is not activated during fetches from internal program memory. psen can sink/source 8 ls ttl inputs. it can drive cmos inputs without an external pull-up. ea - when ea is held high, the cpu executes out of inte rnal program memory (unless the program counter exceeds 3fffh). when ea is held low, the cpu executes only out of external program memory. ea must not be floated. xtal1 - input to the inverting amplifier that forms the oscilla tor. receives the external oscillator signal when an external oscillator is used. xtal2 - output of the inverting amplifier that forms the osc illator and input of the internal clock generator. this pin should be floated when an external oscillator is used. 6.6 sources of supply . 6.6.1 sources of supply for device classes q and v . sources of supply for device classes q and v are listed in qml-38535. the vendors listed in qml-38535 have submitted a certificate of compliance (see 3.6 herein) to dscc-va and have agreed to this drawing. 6.6.2 approved sources of supply for device class m . approved sources of supply for cl ass m are listed in mil-hdbk-103. the vendors listed in mil-hdbk-103 have agreed to this drawi ng and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by dscc-va.
standard microcircuit drawing bulletin date: 02-08-27 approved sources of supply for smd 5962-00518 are listed below for immediate acquisition information only and shall be added to mil-hdbk-103 and qml-38535 during the next revision. mil-hdbk-103 and qml-38535 will be revised to include the addition or deletion of sources. the vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accept ed by dscc-va. this bulletin is superseded by the next dated revision of mil-hdbk-103 and qml-38535. standard microcircuit drawing pin 1 / vendor cage number vendor similar pin 2 / 5962-0051801qqc f7400 mc-80c32e-30mq 5962-0051801vqc f7400 sc-80c32e-30sv 5962-0051801qxc f7400 mj-80c32e-30mq 5962-0051801vxc f7400 sj-80c32e-30sv 1 / the lead finish shown for each pin representing a hermetic package is the most readily available from the manufacturer listed for that part. if the desired lead finish is not listed contact the vendor to determine its availability. 2 / caution . do not use this number for item acquisition. items acquired to this number may not satisfy the performance requirements of this drawing. vendor cage vendor name number and address f7400 atmel nantes la chantrerie 44306 nantes cedex 3, france usa point of contact: atmel 2325 orchard parkway san jose, ca 95131 the information contained herein is disseminated for convenience only and the government assumes no liability whatsoever for any inaccuracies in the information bulletin.

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