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spicoder? sa01 UR5HCSPI-SA01 very low-power keyboard encoder and power management ic for h/pcs semtech, spicoder, and keycoder are registered trademarks of semtech corporation. self-power management is a trademark of semtech corporation. all other trademarks belong to their respective companies. copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 1 hid & system management products, keycoder? family description features ? strongarm? handheld pcs windows? ce platforms web phones personal digital assistants (pdas) wearable computers internet appliances the spicoder? sa01 UR5HCSPI-SA01, a member of semtech?s keycoder? product family, is a keyboard encoder and power management ic designed specifically for handheld pcs (h/pcs), web phones and other systems that run microsoft? windows? ce and utilize the intel strongarm? processor. the spicoder? sa01 offers several features necessary to h/pcs, including extremely low power consumption, real estate- saving size, and special keyboard modes. the ic consumes an extremely small amount of power (less than 2 a at 3 v) and provides the host system both power management and i/o flexibility, with minimal battery drainage. special keyboard modes and built- in power management features allow the spicoder? sa01 to operate in harmony with the power management modes of windows? ce, resulting in greater user flexibility, and longer battery life. the ic scans, debounces and encodes an 8 x 14 keyboard matrix. it communicates with the host over the spi channel, implementing a high-reliability two- way protocol. the spicoder? sa01 also offers programmable features for wake-up keys and general purpose i/o pins. fully compatible with the windows? ce keyboard specification works in harmony with the power management modes of windows? ce provides special modes of operation for h/pcs, including programmable ?wake-up? keys scans an 8 x 14 matrix; controls discrete switches and led indicators compatible with ?system-on silicon? cpus for h/pcs spi-compatible keyboard encoder and power management ic ideal for use with the intel strongarm? processor patented technology for extremely low power consumption ? typically less than 2 a between 3-5 v offers overall system power management capabilities available in low-profile qfp package implements high-reliability two- way protocol 111 12 22 33 23 44 34 pwr_ok nc0 osco osci vcc nc nc _reset _wku vx c7 _atn _ss sck mosi miso xsw sw0 c8 c9 c10/wuko c11 nc c12 c13 gio0 _iotest vss nc r7 r6 r5 r4 c6 c5 c4 c3 c2 c1 c0 r0 r1 r2 r3 qfp UR5HCSPI-SA01-fb 44-pin qfp (0.80 mm pitch (10x10 mm) applications pin assignments preliminary
block diagram ordering code copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 2 package options 44-pin plastic qfp pitch 0.8 mm t a = -40c to +85c UR5HCSPI-SA01-fb keyboard scanner & keyboard state control r0-r8 spi communication channel c0-c13 keyboard matrix wake-up keys only signal switch external to case switch system monitor input signals power management unit programmable i/o gio0 wuko xsw swo pwr_ok wkup iotest wku miso mosi sck ss atn UR5HCSPI-SA01
functional description pin definitions copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 3 the spicoder? sa01 consists functionally of five major sections (see the block diagram). these are the keyboard scanner and state control, the programmable i/o, the spi communication channel, the system monitor and the power management unit. all sections communicate with each other and operate concurrently. mnemonic qfp type name and function vcc 38 i power supply: 3-5v vss 17 i ground vx 43 i tie vx to vcc osci 37 i oscillator input osco 36 o oscillator output _reset 41 i reset: apply 0v to provide orderly start-up miso 29 o spi interface signals mosi 30 i sck 31 i _ss 32 i slave select: if not used tie to vss _iotest 18 o wake-up control signals _wku 42 i r0-r4 8-12 i row data inputs r5-r7 13-15 i port provides internal pull-up resistors c0-c5 7-2 o column select outputs c6-c7 1,44 o c8-c9 26-25 o c11 23 o c12 21 o c13 20 o multi-function pin c10/wuko 24 i/o c10 & ?wake-up keys only? input miscellaneous functions gi00 19 i/o general programmable i/o xsw 28 i external discrete switch swo 27 i discrete switch power management pins _atn 33 o cpu attention output pwr_ok 34 i power ok input nc 16, 22 no connects : these pins are unused 39, 40 nc0 35 nc0 should be tied to vss or gnd note: an underscore before a pin mnemonic denotes an active low signal.
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 4 pin descriptions vcc and vss vcc and vss are the power supply and ground pins. the spicoder? sa01 operates from a 3-5 volt power supply. to prevent noise problems, provide bypass capacitors placed as close as possible to the ic with the power supply. vx, where available, should be tied to vcc. osci and osco osci and osco provide the input and output connections for the on- chip oscillator. the oscillator can be driven by any of the following circuits: - crystal - ceramic resonator - external clock signal the frequency of the on-chip oscillator is 2.00 mhz. _reset a logic zero on the _reset pin forces the spicoder? sa01 into a known start-up state. the reset signal can be supplied by any of the following circuits: - resistor/capacitor - voltage monitor - master system reset mosi, miso, sck, _ss, _atn these five signals implement the spi interface. the device acts as a slave on the spi bus. the _ss (slave select) pin must go high between successive characters in an spi message or a write collision error results. the _atn pin is asserted low each time the spicoder? sa01 has a packet ready for delivery. for a more detailed description, refer to the spi communication channel section of this document. _iotest and _wku the_iotest and _wku pins (?input output test? and ?wake up?) pins control the stop mode exit of the device. the designer can connect any number of active low signals to these two pins through a 15 k ? resistor, in order to force the device to exit the stop mode. a sample circuit is included in this document. all the signals are ?wire-anded.? when any one of these signals is not active, it should be floating (i.e., these signals should be driven from ?open-collector? or ?open-drain? outputs). r0 - r7 the r0-r7 pins are connected to the rows of the scanned matrix. each pin provides an internal pull- up resistor, eliminating the need for external components. c0 to c9 and c11 pins c0 to c9 are bi-directional pins and are connected to the columns of the scanned matrix. when a column is selected, the pin outputs an active low signal. when the column is de-selected, the pin turns into high-impedance. c10 / wuko the c10 / wuko pin acts alternatively as column scan output and as an input. as an input, the pin detects the ?wake-up keys only? signal, typically provided by the host cpu to indicate that the user has turned the unit off. when the device detects an active high state on this pin, it feeds this information into the ?keyboard state control? unit, in order to disable the keyboard and enable the programmed wake-up keys. to achieve maximum power savings, the resistor connected to wuko can be as large as 1.5 m ? .
pin descriptions (cont?d) the windows? ce keyboard copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 5 c12 and c13 c12 and c13 are used as additional column pins in order to accommodate larger-size keyboards, such as the fujitsu fkb1406 palmtop keyboard. gio0 gio0 is a programmable input/output switch or led pin; it can also be used as a wake-up signal. its programming is explained in the general purpose i/o pin section of this document. xsw the xsw pin is dedicated to an external switch. this pin is handled differently than the rest of the switch matrix and is intended to be connected to a switch physically located on the outside of the unit. sw0 the sw0 pin is a dedicated input pin for a switch. pwr_ok the pwr_ok is an active low pin that monitors the battery status of the unit. when the spicoder? sa01 detects a transition from high to low on this pin, it immediately enters the stop mode, turns the led off, and remains in this state until the batteries of the unit are replaced and the signal is deasserted. the following illustration shows a typical implementation of a windows? ce keyboard. windows? ce does not support the following keyboard keys typically found on desktop and laptop keyboards: insert scroll lock pause num lock function keys (f1-f12) print screen if the keyboard implements the windows key, the following key combinations are supported in the windows? ce environment: key combination result windows open start menu windows+k open keyboard tool windows+i open stylus tool windows+c open control panel windows+e explore the h/pc windows+r display the run dialog box windows+h open windows? ce help ctrl+windows+a select all on desktop 1 ! esc 3 # 2 @ 5 % 4 $ 7 & 6 ^ 9 ( 8 * - _ 0 ) e w t r u y o i p q f d h g k j l s a v c n b m x z tab shift ctrl shift enter = + \ | ' " ; : . > , < / ? ` ~ ] } [ { power alt
?ghost? keys keyboard scanner copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 6 in any scanned contact switch matrix, whenever three keys defining a rectangle on the switch matrix are pressed at the same time, a fourth key positioned on the fourth corner of the rectangle is sensed as being pressed. this is known as the ?ghost? or ?phantom? key problem. figure 1 : ?ghost? or ?phantom? key problem although the problem cannot be totally eliminated without using external hardware, there are methods to neutralize its negative effects for most practical applications. keys that are intended to be used in combinations should be placed in the same row or column of the matrix, whenever possible. shift keys (shift, alt, ctrl, windows) should not reside in the same row (or column) as any other keys. the spicoder? sa01 has built-in mechanisms to detect the presence of ?ghost? keys. the encoder scans a keyboard organized as an 8 row by 14 column matrix for a maximum of 112 keys. smaller size matrixes can be accommodated by simply leaving unused pins open. the spicoder? sa01 provides internal pull-ups for the row input pins. when active, the encoder selects one of the column lines (c0-c13) every 512 s and then reads the row data lines (r0-r7). a key closure is detected as a zero in the corresponding position of the matrix. a complete scan cycle for the entire keyboard takes approximately 9.2 ms. each key found pressed is debounced for a period of 20 ms. once the key is verified, the corresponding key code(s) are loaded into the transmit buffer of the spi communication channel. actual key presses ?ghost? key keyboard scanning n-key rollover in this mode, the code(s) corresponding to each key press are transmitted to the host system as soon as that key is debounced, independent of the release of other keys. when a key is released, the corresponding break code is transmitted to the host system. several keys can be held pressed at the same time. however, two or more key closures, occurring within a time interval of less than 5 ms, raise an error flag and are not processed. this feature iprotects against the effects of accidental key presses.
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 7 keyboard states these states of operation refer only to the keyboard functionality and, although they are related to power states, they are also independent of them. "send all keys" entry conditions: power on reset, soft reset, pwr_ok =1, {(wuko=0)} exit conditions: pwr_ok = 0 -> "send no keys"(wuko=1) and (key press) -> "send wake-up keys only"(lid = 0) and (wuko=0) and (key press) -> "send xsw key only" description: this is the spicoder? sa01?s normal state of operation, accepting and transmitting every key press to the system. this state is entered after the user powers on the unit and it is sustained while the unit is being used. description: this state is entered when a pwr_ok signal is asserted (transition high to low), indicating a critically low level of battery voltage. the pwr_ok signal causes an interrupt to the spicoder? sa01, which guarantees that the transition is performed in real time. in this state, the spicoder? sa01 performs as follows: 1. the led is turned off. nevertheless, its state is saved and restored after exiting the disabled state (change of batteries). 2. the spicoder? sa01 enters the stop mode for maximum energy conservation. 3 stop mode time-out entry is shortened to conserve energy further. 4. in this state all interrupts are disabled. the spicoder? sa01 exits this state on the next interrupt event that detects the pwr_ok line has been de-asserted. figure 2: the spicoder? sa01 implements three modes of keyboard and switch operation ?send wake-up keys only? entry conditions : (wuko=1) and (key or switch press) exit conditions: soft reset -> ?send all keys?pwr_ok = 0 -> ?send no keys? description : this state is entered when the user turns the unit off. a signal line driven by the host notifies the spicoder? sa01 about this state transition. while in this state, the spicoder? sa01 transmits only keys programmed to be wake-up keys to the system. it is not necessary for the spicoder? sa01 to detect this transition in real time, since it does not affect any operation besides buffering keystrokes. ?send no keys" entry conditions : pwr_ok transition from high to low exit conditions: (pwr_ok = 1) and (matrix key pressed or switch or _wkup) send all keys send wake-up keys only send no keys (pwr_ok = 1) and (key press) (wuko=1) and (key press) soft reset pwr_ok pwr_ok (pwr_ok = 1) and (wuk0 = 0) and (key press)
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 8 key map for the fujitsu fkb1406 (spicoder? sa01) columns (c0?c13) 012345678910111213 lalt ` lctrl fn esc 1290- + bksp f1 f2 f9 f10 nmlk bk \ lsft del t y u i enter rshift pad 4 pad 5 pgdn tab q w e r o p [ ] pad 6 ins pause scrlk z caplk k l ; ? pad 2 pad 3 prtscr sysreq pgup asdfghj/ pad 1 / home x c v b n m , . spc pad 0 345678prog f3 f4 f5 f6 f7 f8 end rows (r0?r6) esc f2 1 ! f2 2 @ f3 3 # f4 4 $ f5 5 % f6 6 ^ f7 7 & f8 8 * f9 9 ( f10 0 ) num lk - _ bk = + qwertyu iop as df ghj kl zxcvbnm ~ < , . >? / : ; prt scr " ' sys req { pause scr lk ins end pgdn pgup home enter : ; ctrl alt fn shift del cap lock [ ] } 0 1 23 45 6 * 9 8 7 _ . / + prog ` shift 0 1 2 3 4 5 6 keyboard layout for the fujitsu fkb1406
key codes general purpose i/o pin copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 9 key codes range from 0x01 to 0x73 and are arranged as follows: make code = column_number * 8 + row_number + 1 break code = make code or 0x80 discrete switches transmit the following codes: xsw = 0x71 sw0 = 0x72 gio0 = 0x73 the spicoder? sa01 provides a general purpose i/o pin, gio0, that can be programmed as input, output, debounced switch input or led output. the programmable i/o pin can be configured to the desired mode through a command from the system. after the i/o pin is configured, the host system can read or write data to it. if the pin is configured as a debounced switch, it returns scan codes. for pin gio0: i/o number = 0 led number = 0 input mode while in the input mode, the gio0 pin detects input signals and reports the input status to system as required. output mode in the output mode, the spicoder? sa01 controls the output signal level according to the system command. when the pin is set at output mode, the default output is low. switch input mode in switch input mode, the spicoder? sa01 generates an individual make key code when the switch closes (pin goes low), and a break key code when the switch returns to open (pin goes to high). the switches generate key codes outside of those generated by the key matrix, from 0x71 - 0x73. when the switch is closed, the spicoder? sa01 does not fall asleep.
pin configurations led modes copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 10 there are three led modes: off, on, and blinking. the led can be individually set to one of these modes. in the blinking mode, both the on- interval and the off-interval can be individually set. additionally, a meta blink count and meta blink interval may be specified. this describes an interval of a different length which may be inserted after each specified number of blinks. all intervals are multiples of 1/16th of a second. when the led is on or blinking, the spicoder? sa01 does not enter the stop mode unless the pwr_ok signal is asserted low; in this case, the device saves the status of the led and turns it off. the default led mode is off. the above timing chart describes the behavior of an led using these settings,1: led on; 0: led off. when prototyping, caution should be taken to ensure that programming of the gio0 pin does not conflict with the circuit implemented. a series protection resistor is recommended for protection from improper programming of the pin. after a power-on or soft reset, gio0 defaults to the input state. the following drawing illustrates the suggested interface to the general purpose input/output pin. input gix circuit determined by the specific application output gix circuit determined by the specific application led gix switch gix wake-up interrupt generating switch _wku _iotest 15k 150k series protection resistor on on off on interval off interval 12 on off meta blink count 3 1 blinking cycle meta blink off on off on figure 4: timing chart: the behavior of an led using the settings,1: led on; 0: led off figure 3: suggested interface of general purpose input/output pin
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 11 spi communication channel spi data transfers can be performed at a maximum clock rate of 500 khz. when the spicoder? sa01 asserts the _atn signal to the host master, the data is already loaded into the data register waiting for the clocks from the master. one _atn signal is used per each byte transfer. if the host fails to provide clock signals for successive bytes in the data packet within 120 ms, the transmission is aborted and a new session is initiated by asserting a new _atn signal. in such a case, the whole packet is re-transmitted. if the spi transmission fails 20 times consecutively, the synchronization between the master and slave may be lost. in this case, the spicoder? sa01 enters the reset state. when cpha = 0, the shift clock is the or of _ss with sck; therefore, _ss must go high between successive characters in an spi message. the master can assert _ss low only when it is getting ready to transmit or receive. after the last bit is shifted out, _ss must go high within 60 s. the spicoder? sa01 implements the spi communication protocol according to the following diagram: cpol = 0 ---------- sck line idles in low state cpha = 0 ---------- ss line is an output enable control sck (cpol=0) _ss data output (cpha=0) sample input ? msb bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 lsb _atn t ss : hd not to scale t atn : sa t sck figure 6: transmitting data waveforms sck miso _ss _atn not to scale figure 7: receiving data waveforms not to scale _wkup miso mosi _sck t wkup t sck : sa t ib _ss figure 5: spi communication protocol when the host sends commands to the keyboard, the spicoder? sa01 requires that the minimum and maximum intervals between two successive bytes be 200 s and 5 ms respectively.
data / command buffer spi communication table copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 12 the spicoder? sa01 implements a data buffer that contains the key code/command bytes waiting to be transmitted to the host. if the data buffer is full, the whole buffer is cleared and an "initialize" command is sent to the host. at the same time, the keyboard is disabled until the "initialize" or "initialize complete" command from the host is received. the spicoder? sa01 supports two modes of operation. the following table lists the typical and maximum supply current (no dc loads) for each mode at 3.3 volts (+/-10%). current typical max unit description run 1.5 1 3.0 ma entered only while data/commands are in process and if the leds are blinking stop 2.0 20 a entered after 125 ms of inactivity if leds are low power consumption of the keyboard sub-system is determined primarily by the use of the leds. while the spicoder? sa01 is in the stop mode, an active low wake-up output from the master must be connected to the edge-sensitive _wku pin of the spicoder? sa01. this signal wakes up the spicoder? sa01 in order to receive data from the master host. the master host must wait a minimum of 5 ms prior to providing clocks to the spicoder? sa01. the spicoder? sa01 enters the stop mode after a 125 ms period of keypad and/or host communications inactivity, or anytime the pwr_ok line is asserted low by the host. note that while one or more keys are held pressed, the spicoder? sa01 does not enter the stop mode until every key is released. stop run - keyboard - switch - input transaction - system wake-up - after 125 ms of inactivity and leds are off after reset or 125 ms of inactivity while processing current task and/or led(s) are active figure 8: power states of the spicoder? sa01 the following table describes the specific timing referenced in the timing diagrams. signal name description min max units tatn:sa _ atn to first clock pulse - 120 ms tsck clock period 2 - s tss:hd last clock pulse to _ss de-assertion - 60 s twkup _wkup pulse width 125 - ns tsck:sa _wkup to first clock pulse 5 150 ms tib inter-byte period 0.2 5 ms power management unit
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 13 communication protocol there are eight commands that may be sent from the spicoder? sa01 to the host, and ten commands that may be sent from the host to the spicoder? sa01. each command from spicoder? sa01 to the host is composed of a sequence of codes. all commands start with code (0x80) and end with lrc code (see the description of the lrc calculation on page 14). command details are listed below. commands to the host - summary command name code description initialize request 0xao sent to the host when the data buffer is full initialize complete 0xa1 issued upon completion of the ?initialize? command issued by the host heartbeat response 0xa2 response to ?heartbeat request? issued by the host identification response 0xf2 response to ?identification request? issued by the host led status report 0xa3 response to ?led status request? resend request 0xa5 issued upon error during the reception of a packet input/output mode status report 0xa7 reports the status of gio0 pin input/output data report 0xa8 response to ?i/o data request? command from the host initialize request 0x80 0xa0 0x20 the spicoder? sa01 sends the initialize request command to the host when its data buffer is full. initialization complete 0x80 0xa1 0x21 the spicoder? sa01 sends the initialize complete report to the host when it finishes the initialization caused by initialize command from the host. heartbeat response 0x80 0xa2 0x22 the spicoder? sa01 sends the heartbeat response to the host when it receives the heartbeat request command from the host. identification response 0x80 0xf2 0x02 --- semtech 0x08 --- rev 0.8a 0x00 . 0x7e the spicoder? sa01 sends the identification response to the host when it receives the identification request command from the host. the lrc byte is calculated for the whole message packet, including the command code and the command prefix. the lrc is calculated by first taking the bitwise exclusive or of all bytes from the message. if the most significant bit (msb) of the lrc is set, the lrc is modified by clearing the msb and changing the state of the next most significant bit. thus, the packet check byte can never consist of a valid lrc with the most significant bit set. lrc calculation commands to the host analytically
lrc calculation, (cont?d) commands to the host from the spicoder? sa01 copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 14 the following c language function is an example of an lrc calculation program. it accepts two arguments: a pointer to a buffer and a buffer length. its return value is the lrc value for the specified buffer. char calculate lrc (char buffer, size buffer) { char lrc; size_t index; /* * init the lrc using the first two message bytes. */ lrc = buffer [0] ^ buffer [1]; /* * update the lrc using the remainder of the buffer. */ for (index = 2; index < buffer; index ++) lrc ^ = buffer[index]; /* * if the msb is set then clear the msb and change the next most significant bit */ if (lrc & 0x80) lrc ^ = 0xc0; /* * return the lrc value for the buffer.*/} led status report 0x80 0xa3 0xnn led0 status:( 0=off; 1=on; 2=blinking; 3=no led mode ) 0xnn led1 status:( 0=off; 1=on; 2=blinking; 3=no led mode ) 0xnn led2 status:( 0=off; 1=on; 2=blinking; 3=no led mode) 0xnn the spicoder? sa01 sends the led status report to the host when it receives the led status request command from the host. resend request 0x80 0xa5 0x25 the spicoder? sa01 sends this resend request command to the host when its command buffer is full, or if it detects either a parity error or an unknown command during a system command transmission. input/output mode status report 0x80 0xa7 0xnn io number, 0 0xnn io mode: (0=input; 1=output; 2=switch; 3=led ) 0xnn the spicoder? sa01 sends the i/o mode status report to the host when it receives the i/o mode status request command from the host, in order to report the status of the gio0 pin. input/output data report 0x80 0xa8 0xnn io number, 0 0xnn io data: ( 0=low, 1=high ) 0xnn the spicoder? sa01 sends the i/o data report to the host when it receives the i/o data request command from the host.
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com each command to spicoder? sa01 is composed of a sequence of codes. all commands start with code (1bh) and end with the lrc code (bitwise exclusive or of all bytes). commands from the host - summary command name code description initialize 0xao causes the spicoder? sa01 to enter the power-on state initialization complete 0xa1 issued as a response to the ?initialize request? heartbeat request 0xa2 the spicoder? sa01 responds with ?heartbeat response? identification request 0xf2 the spicoder? sa01 responds with ?identification response? led status request 0xa3 the spicoder? sa01 responds with ?led status response? led modify 0xa6 the spicoder? sa01 changes the led accordingly resend request 0xa5 issued upon error during the reception of a packet input/output mode modify 0xa7 the spicoder? sa01 modifies or report the status of the gio0 pin output data to i/o pin 0xa8 the spicoder? sa01 outputs a signal to the gio0 pin set wake-up keys 0xa9 defines which keys are ?wake-up? keys 15 commands from the host to the spicoder? sa01 commands from the host to the spicoder? sa01 analytically initialize 0x1b 0xa0 0x7b when the spicoder? sa01 receives this command, it clears all buffers and returns to the power-on state. initialization complete 0x1b 0xa1 0x7a when the spicoder? sa01 receives this command, it enables transmission of keyboard data. keyboard data transmission is disabled if the tx output buffer is full (32 bytes). note that if the transmit data buffer gets full the encoder issues an "initialize request" to the host. heartbeat request 0x1b 0xa2 0x79 when the spicoder? sa01 receives this command, it replies with the heartbeat response report. identification request 0x1b 0xf2 0x29 the spicoder? sa01 replies to this command with the identification response report. led status request 0x1b 0xa3 0x78 when spicoder? sa01 receives this command, it replies with the led status report.
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 16 commands from the host to the spicoder? sa01 (cont?d) led modify 0x1b 0xa6 0xnn led number (0) 0xnn (0=led off; 1=led on; 2=led blinking) 0xnn time in 1/16ths of a second for led to be on 0xnn time in 1/16ths of a second for led to be off 0xnn number of blinks after which to apply meta blink interval 0xnn time in 1/16ths of a second for led to be off after blinks 0xnn when the spicoder? sa01 receives this command, it changes the led mode accordingly. i/o mode modify 0x1b 0xa7 0xnn io number: 0 0xnn io mode: ( 0=input, 1=output, 2=switch, 3=led, 4=current mode request) 0xnn when the spicoder? sa01 receives this command, it changes the i/o pin's mode accordingly. if the =4, the spicoder? sa01 sends the i/o mode status report to the host. output data to i/o pin 0x1b 0xa8 0xnn io number: 0 0xnn io data: ( 0=low, 1=high, 2=current i/o data request) 0xnn when the spicoder? sa01 receives this command, it changes the value of the output pin accordingly. if the addressed pin is not configured as an output pin, the command is ignored. if =2, the spicoder? sa01 responds by issuing the i/o data status report to the host. set wake-up keys 0x1b 0xa9 0xnn (r7 r6 r5 r4 r3 r2 r1 r0 bitmap: 0-enabled 1-disabled) 0xnn 0xnn 0xnn 0xnn 0xnn 0xnn 0xnn 0xnn 0xnn 0xnn 0xnn * 0xnn * 0xnn 0xnn (where switches bit assignments are = x x x x gio0 sw0 xsw) 0xnn the "set wake-up keys" command is used to disable specific keys from waking up the host. using this command, the host can set only a group of keys to act as "power-on" switches. the host can change the keyboard behavior dynamically according to the system power management requirements. the default after power on is ?all keys enabled.?
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 17 sample configuration UR5HCSPI-SA01 alternatively a 2mhz cmos signal can be tied directly to osci attention signal wake up signal row inputs column outputs to switch matrix power ok signal discrete switches ceramic resonator circuit with built in capacitors power ok signal vcc 1.5m ? 15k ? UR5HCSPI-SA01-fb 7 6 5 4 8 2 1 44 26 25 24 37 36 38 3 41 29 30 31 32 33 17 35 42 18 23 34 19 20 21 27 28 9 10 11 12 13 14 15 43 c0 c1 c2 c3 r0 c5 c6 c7 c8 c9 c10/wuko osci osco vdd c4 reset miso mosi sck ss atn vss nc0 wku iotest c11 pwr_ok gio0 c13 c12 sw0 xsw r1 r2 r3 r4 r5 r6 r7 vx 1mohm 2mhz vout vin gnd 150k ? 15k ? 15k ? sck mosi miso _wkup _atn pwr_ok wuko _ss reset ic for 5v operation: tc54c4302ecb (microchip) for 3v operation: tc54c2702ecb (microchip) (alternatively, a resistor-capacitor circuit or a master reset signal can be used)
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 18 bill of materials for UR5HCSPI-SA01-fb sample schematic quantity manufacture part# description 3 generic n/a 15 k ? resistors 1 generic n/a 150 k ? resistor 1 generic n/a 1 m ? resistor 2 generic n/a 1.5 ? resistors 1 microchip tc54vc4302ecb ic volt detector cmos 4.3 v sot23, for 5 v operation tc54vc2702ecb ic volt detector cmos 2.7 v sot23, for 3.3 v operation 1 avx pbrc-2.00br 2.00 mhz ceramic resonator with built in capacitors, smt
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 19 mechanicals for the UR5HCSPI-SA01-fb detail a m q w k x t r c datum plane detail c l b a l b v d a s c e g m m h seating plane h datum plane a,b,d 0.20 (0.008) c a-b s d s m 0.05 (0.002) a-b 0.20 (0.008) h a-b s d s m 0.20 (0.008) h a-b s d s m 0.20 (0.008) c a-b s d s m 0.05 (0.002) a-b 0.01 (0.004) b c d e f g h j k l m n q r s t u v x 9.90 10.10 0.390 0.398 2.10 2.45 0.083 0.096 0.30 0.45 0.012 0.018 2.00 2.10 0.079 0.083 0.30 0.40 0.012 0.016 0.80 bsc 0.031 bsc 0.25 0.010 0.13 - 0.005 0.65 - 0.026 - 5 10 5 10 0.13 0.17 0.005 0.007 13.45 0.530 0.13 0.005 0 0 0.510 0.40 0.016 min max min max millimeters inches 0 7 0 7 0.13 .30 0.005 0.012 dim 0 0 0 0 0 0 0 jn f base metal d 0.20 (0.008) c a-b s d s m section b-b a 9.90 10.10 0.390 0.398 0.23 0.009 0.037 0.95 8.00 ref 0.315 ref 12.95 0.510 0 0 0 w 12.95 1.6 ref 13.45 0.530 0.063 ref notes 1. dimensioning and tolerancing per ansi y14.5-m, 1982 2. controlling dimension: millimeter 3. datum plane "h" is located at the bottom of the lead and is coincident with the lead where the lead exits the plastic body at the bottom of the parting line. 4. datums -a-, -b-, and -d- to be determined at datum plane -h-. 5. dimensions s and v to be determined at seating plane -c-. 6. dimensions a and b do not include mold protusion. allowable protusion is 0.25 (0.010) per side. dimensions a and b do include mold mismatch and are determined at datum plane -h-. 7. dimension d does not include danbar protrusion. allowable danbar protrusion is 0.08 (0.003) total in excess of the d dimension at maximum material condition. danbar cannot be located on the lower radius or the foot. -- - - - b detail a detail c 1 12 22 11 34 44 33 23 h
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 20 electrical specifications absolute maximum ratings ratings symbol value unit supply voltage v dd -0.3 to +7.0 v input voltage v in vss -0.3 to vdd +0.3 v current drain per pin i 25 ma (not including v ss or v dd ) operating temperature ta t low to t high c UR5HCSPI-SA01 -40 to +85 storage temperature range t stg - 65 to +150 c esd rating (human body model) v esd - tbd kv thermal characteristics characteristic symbol value unit thermal resistance tja c per w plastic 60 dc electrical characteristics (v dd =3.3 v dc +/-10%, v ss =0 v dc , temperature range=t low to t high unless otherwise noted) characteristic symbol min typ max unit output voltage (i load<10a) vol 0.1 v v oh v dd ?0.1 output high voltage (i load=0.8ma) v oh v dd ?0.8 v output low voltage (i load=1.6ma) v ol 0.4 v input high voltage v ih 0.7xv dd v dd v input low voltage v il v ss 0.2xvdd v user mode current i pp 510ma data retention mode (0 to 70c) v rm 2.0 v supply current (run) i dd 1.53 3.0 ma (wait) 0.711 1.0 ma (stop) 2.0 20 a i/o ports hi-z leakage current i il +/-10 a input current i in +/- 1 a i/o port capacitance c io 812pf control timing (v dd =3.3 v dc +/-10%, v ss =0 v dc , temperature range=t low to t high unless otherwise noted) characteristic symbol min max unit frequency of operation f osc mhz crystal option 2.0 external clock option dc 2.0 cycle time tcyc 1000 ns crystal oscillator startup time toxov 100 ms stop recovery startup time tilch 100 ms reset pulse width trl 8 tcyc interrupt pulse width low tlih 250 ns interrupt pulse period tilil * tcyc osc1 pulse width toh, tol 200 ns *the minimum period tlil should not be less than the number of cycle times it takes to execute the interrupt service routine pl us 21 tcyc.
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 21 this page left intentionally blank
copyright ?1998-2002 semtech corporation doc5-spi-sa01-ds-107 2002-07 www.semtech.com 22 for sales information and product literature, contact: semtech corporation human interface device (hid) and system management division 200 flynn road camarillo, ca 93012-8790 sales@semtech.com http://www.semtech.com/ (805)498-2111 telephone (805)498-3804 fax copyright ?1998-2002 semtech corporation. all rights reserved. spicoder, keycoder, and semtech are registered trademarks of semtech corporation. self-power management is a trademark of semtech corporation. all other trademarks belong to their respective companies. intellectual property disclaimer this specification is provided "as is" with no warranties whatsoever including any warranty of merchantability, fitness for any particular purpose, or any warranty otherwise arising out of any proposal, specification or sample. a license is hereby granted to reproduce and distribute this specification for internal use only. no other license, expressed or implied to any other intellectual property rights is granted or intended hereby. authors of this specification disclaim any liability, including liability for infringement of proprietary rights, relating to the implementation of information in this specification. authors of this specification also do not warrant or represent that such implementation(s) will not infringe such rights.

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