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revisions ltr description date (yr-mo-da) approved rev sheet rev sheet 15 16 17 rev status rev of sheets sheet 1 2 3 4 5 6 7 8 9 10 11 12 13 14 pmic n/a prepared by dan wonnell defense supply center columbus standard microcircuit drawing checked by raymond monnin columbus, ohio 43216 http://www.d scc.dla.mil this drawing is available for use by all departments approved by raymond monnin microcircuit, digital-linear, analog-to- digital converter, 8-bit, 1 gsps, and agencies of the department of defense drawing approval date 01-11-15 monolithic silicon amsc n/a revision level size a cage code 67268 5962-00504 sheet 1 of 17 dscc form 2233 apr 97 5962-e262-00 distribution statement a . approved for public releas e; distribution is unlimited.
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 2 dscc form 2234 apr 97 1. scope 1.1 scope . this drawing documents two product assurance class le vels consisting of high reliability (device classes q and m) and space application (device class v). a choice of case outlines and lead finishes are available and are reflected in the part or identifying number (pin). when available, a choice of radiation hardness assurance (rha ) levels are reflected in the pin. 1.2 pin . the pin is as shown in the following example: 5962 - 00504 01 q y c federal stock class designator rha designator (see 1.2.1) device type (see 1.2.2) device class designator case outline (see 1.2.4) lead finish (see 1.2.5) \ / (see 1.2.3) \/ drawing number 1.2.1 rha designator . device classes q and v rha marked devices meet the mil-prf-38535 specified rha levels and are marked with the appropriate rha designator. device class m rha marked devices meet the mil-prf-38535, appendix a specified rha levels and are marked with the appropriate rha designator. a dash (-) indicates a non-rha device. 1.2.2 device type . the device type identify the circuit function as follows: device type generic number circuit function 01 8388b a/d converter, 8-bit, wide bandwidth, 1 giga samples per second sampling rate 1.2.3 device class designator . the device class designator is a single letter identifying the product assurance level as follows: device class device requirements documentation m vendor self-certification to the requirements for mil-std-883 compliant, non-jan class level b microcircuits in accordance with mil-prf-38535, appendix a q or v certification and qualification to mil-prf-38535 1.2.4 case outlines . the case outlines are as designated in mil-std-1835 and as follows: outline letter descriptive designator terminals package style x see figure 1 68 quad flat pack with gull-wing leads, enhanced jc y see figure 1 68 quad flat pack with gull-wing leads 1.2.5 lead finish . the lead finish is as specified in mil-pr f-38535 for device classes q and v or mil-prf-38535, appendix a for device class m.
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 3 dscc form 2234 apr 97 1.3 absolute maximum ratings . 1 /, 2 /, 3 / positive supply voltage (v cc )........................................................................... gnd to 6 v dc digital negative supply voltage (dv ee )............................................................. gnd to -5.7 v dc digital positive supply voltage (v plusd )............................................................ gnd ?0.3 v to 2.8 v dc negative supply voltage (v ee ).......................................................................... gnd to ?6 v dc maximum difference between negative supply voltages (dv ee to v ee ) ........... 0.3 v dc analog input voltages (v in or v inb )................................................................... -1 v to 1 v dc maximum difference between analog inputs (v in - v inb ).................................. -2 v to 2 v dc digital input voltage (v d ): gorb........................................................................................................... -0.3 v to v cc + 0.3 v dc drrb ........................................................................................................... v ee ? 0.3 v to 0.9 v dc digital output voltage (v o ) ............................................................................... v plusd ? 3 v to v plusd ? 0.5 v dc clock input voltage (v clk or v clkb ) .................................................................. -3 v to 1.5 v dc maximum difference between clock inputs (v clk ? v clkb ) ............................... -2 v to 2 v dc junction temperature (t j ) ................................................................................ +135 c storage temperature (t stg ) ............................................................................. -65 c to +150 c lead temperature (t lead ) ................................................................................ +300 c thermal resistance, junction-to-case ( jc ): case outline x.............................................................................................. 1.56 c/w case outline y.............................................................................................. 4.75 c/w 1.4 recommended operating conditions . positive supply voltage range (v cc )................................................................. 4.75 v to 5.25 v dc; 5 v dc typical positive digital supply voltage (v plusd ): ecl output com patibility .............................................................................. gnd lvds output compatibility ............................................................................ +1.4 v to +2.6 v dc; +2.4 v dc typical negative supply voltage range (v ee , v dvee )..................................................... -5.25 v to ?4.75 v dc; -5 v dc typical differential analog input voltage (full scale, 50 ? differential or single-ended): v in , v inb ........................................................................................................ 113 mv to 137 mv dc; 125 mv dc typical v in - v inb ....................................................................................................... 450 mv pp to 550 mv pp ; 500 mv pp typical clock input power level (50 ? single-ended clock input): p clk , p clkb .................................................................................................... 3 dbm to 10 dbm max.; 4 d bm typical operating temper ature range .......................................................................... -55 c < t c , t j +125 c 2. applicable documents 2.1 government specification, standards, and handbooks . the following specification, standards, and handbooks form a part of this drawing to the extent specified herein. unless ot herwise specified, the issues of these documents are those liste d in the issue of the department of defense i ndex of specifications and standards (dodi ss) and supplement thereto, cited in the solicitation. specification department of defense mil-prf-38535 - integrated circuits, manufacturing, general specification for. 1 / stresses above the absolute maximum rating may cause permanent damage to the device. extended operation at the maximum levels may degrade performance and affect reliability. 2 / absolute maximum ratings are limited values, to be appli ed individually, while other parameters are within specified operating conditions. 3 / the use of thermal heatsink is mandatory.
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 4 dscc form 2234 apr 97 standards department of defense mil-std-883 - test method standard microcircuits. mil-std-1835 - interface standard electronic component case outlines. handbooks department of defense mil-hdbk-103 - list of standard microcircuit drawings. mil-hdbk-780 - standard microcircuit drawings. (unless otherwise indicated, copies of the specificat ion, standards, and handbooks are ava ilable from the standardization document order desk, 700 robbins avenue, building 4d, philadelphia, pa 19111-5094.) 2.2 order of precedence . in the event of a conflict between the text of th is drawing and the references cited herein, the text of this drawing takes precedence. nothing in this docum ent, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. requirements 3.1 item requirements . the individual item requirements for device classes q and v shall be in accordance with mil-prf-38535 and as specified herein or as modified in the device manufacturer' s quality management (qm) plan. the modification in the qm plan shall not affect the form, fit, or function as described herein. the individual item requirements for device class m shall be in accordance with mil-prf-38535, appendix a for non-jan class level b devices and as specified herein. 3.2 design, construction, and physical dimensions . the design, construction, and physica l dimensions shall be as specified in mil-prf-38535 and herein for device classes q and v or mil-prf-38535, appendix a and herein for device class m. 3.2.1 case outlines . the case outlines shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 terminal connections . the terminal connections sha ll be as specified on figure 2. 3.2.3 block diagram . the block diagram shall be as specified on figure 3. 3.2.4 timing waveforms . the timing waveforms shall be as specified on figure 4. 3.3 electrical perform ance characteristics and posti rradiation parameter limits . unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as s pecified in table i and shall apply over th e full case operating temperature range. 3.4 electrical test requirements . the electrical test requirements shall be the subgroups specified in t able ii. the electrical tests for each subgroup are defined in table i. 3.5 marking . the part shall be marked with the pin listed in 1.2 her ein. in addition, the manufacturer's pin may also be marked as listed in mil-hdbk-103. for pa ckages where marking of the entire smd pi n number is not feasible due to space limitations, the manufacturer has the option of not marking the "5962-" on the device. for rha product using this option, the rha designator shall still be marked. marking for device cl asses q and v shall be in accordance with mil-prf-38535. marking for device class m shall be in accordance with mil-prf-38535, appendix a. 3.5.1 certification/compliance mark . the certification mark for device classes q and v shall be a "qml" or "q" as required in mil-prf-38535. the compliance mark for device class m shall be a "c" as required in mil-prf-38535, appendix a.
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 5 dscc form 2234 apr 97 table i. electrical per formance characteristics . test symbol conditions -55 (-0/+5) c < t c ; t j < +125 (-5/+0) c v ee = dv ee = -5 v, v cc = +5 v, v in ? v inb = 500 mvpp full scale differential input, digital outputs 75 or 50 ? differentially terminated. group a subgroups device type limits unit unless otherwise specified min max full scale input voltage v in differential mode 1, 2, 3 01 -125 125 mv range single-ended input option -250 250 v inb 0 v common mode voltage -125 125 analog input capacitance c in 4 1 / 01 3.5 pf input bias current i in 1 1 / 01 20 a input resistance r in 1 1 / 01 0.5 m ? full power input bandwidth fpbw 4 1 / 01 1.3 ghz small single input bandwidth ssbw 4 1 / 01 1.5 ghz logic ?0? input voltage v il 1, 2, 3 01 -1.5 v logic ?1? input voltage v ih 1, 2, 3 01 -1.1 v logic ?0? input current i il 1, 2, 3 01 50 a logic ?1? input current i ih 1, 2, 3 01 50 a clock input power level p clk 4 1 / 01 -2 10 dbm clock input capacitance c clk 4 1 / 3.5 pf differential output voltage swings v diff 75 ? open transmission lines, v plusd = 0 v 1, 2, 3 01 1.50 v 2 /, 3 / 75 ? differentially terminated v plusd = 0 v 0.70 50 ? differentially terminated v plusd = 0 v 0.54 logic ?0? output voltage v ol 75 ? open transmission lines, v plusd = 0 v 1 01 -1.54 v 2 /, 3 / 75 ? differentially terminated v plusd = 0 v -1.34 50 ? differentially terminated v plusd = 0 v -1.32 logic ?1? output voltage v oh 75 ? open transmission lines, v plusd = 0 v 1 01 -0.88 v 2 /, 3 / 75 ? differentially terminated v plusd = 0 v -1.07 50 ? differentially terminated v plusd = 0 v -1.16 output level drift 2 /, 3 / v od 1, 2, 3 01 1.6 mv/ c see footnotes at end of table.
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 6 dscc form 2234 apr 97 table i. electrical per formance characteristics - continued. test symbol conditions -55 (-0/+5) c < t c ; t j < +125 (-5/+0) c v ee = dv ee = -5 v, v cc = +5 v, v in ? v inb = 500 mvpp full scale differential input, digital outputs 75 or 50 ? differentially terminated. group a subgroups device type limits unit unless otherwise specified min max differential non linearity dnl 2 /, 4 / 1 01 -0.5 0.6 lsb 2, 3 -0.6 0.7 integral non linearity inl 2 /, 4 / 1 01 -1.0 1.0 lsb 2, 3 -1.2 1.2 gain error a e 2 / 1 01 -10 10 %fs 2, 3 -11 11 input offset voltage v inoff 2 / 1 01 -26 26 mv 2, 3 -30 30 gain error drift tc a 2 / 1 1 / 01 100 150 ppm/ c offset error drift tc off 2 / 1 1 / 01 40 60 ppm/ c positive supply voltage, analog v cc 1, 2, 3 01 4.75 5.25 v positive supply voltage, digital v plusd 1, 2, 3 01 1.4 2.6 v positive supply current, analog i cc 1, 2, 3 01 445 ma positive supply current, digital i plusd 1, 2, 3 01 145 ma negative supply voltage v ee 1, 2, 3 01 -5.25 -4.75 v negative supply current, analog ai ee 1, 2, 3 01 200 ma negative supply current, digital di ee 1, 2, 3 01 180 ma power dissipation p d 1, 2, 3 01 4.3 w power supply rejection ratio psrr 1 1 / 01 40 mv/v bit error rate ber 5 / 9 1 / 01 1e-12 error/ sample adc settling time t s v in ? v inb = 400 mv pp 9 1 / 01 0.5 1 ns overvoltage recovery time t or 9 1 / 01 0.5 1 ns see footnotes at end of table.
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 7 dscc form 2234 apr 97 table i. electrical per formance characteristics - continued. test symbol conditions -55 (-0/+5) c < t c ; t j < +125 (-5/+0) c v ee = dv ee = -5 v, v cc = +5 v, v in ? v inb = 500 mvpp full scale differential input, digital outputs 75 or 50 ? differentially terminated. group a subgroups device type limits unit unless otherwise specified min max signal to noise and distortion ratio sinad f s = 1 gsps, f in = 20 mhz 4, 5, 6 1 / 01 42 db 2 / f s = 1 gsps, f in = 500 mhz 41 f s = 1 gsps, f in = 1000 mhz (-1 dbf s ) 38 effective number of bits enob f s = 1 gsps, f in = 20 mhz 4, 5, 6 1 / 01 7 db 2 / f s = 1 gsps, f in = 500 mhz 6.6 f s = 1 gsps, f in = 1000 mhz (-1 dbf s ) 6.2 signal to noise ratio snr f s = 1 gsps, f in = 20 mhz 4, 5, 6 1 / 01 42 db 2 / f s = 1 gsps, f in = 500 mhz 41 f s = 1 gsps, f in = 1000 mhz (-1 dbf s ) 41 total harmonic distortion thd f s = 1 gsps, f in = 20 mhz 4, 5, 6 1 / 01 50 db 2 / f s = 1 gsps, f in = 500 mhz 46 f s = 1 gsps, f in = 1000 mhz (-1 dbf s ) 42 spurious free dynamic range sfdr f s = 1 gsps, f in = 20 mhz 4, 5, 6 1 / 01 -52 dbc 2 / f s = 1 gsps, f in = 500 mhz -47 f s = 1 gsps, f in = 1000 mhz (-1 dbf s ) -42 f s = 1 gsps, f in = 1000 mhz (-3 dbf s ) -45 two-tone intermodulation distortion 2 / imd f in1 = 489 mhz@f s = 1 gsps f in2 = 490 mhz@f s = 1 gsps 4, 5, 6 1 / 01 -47 dbc maximum clock frequency f s see figure 4, 6 / 4, 5, 6 1 / 01 1 1.4 gsps minimum clock frequency f s see figure 4, 7 / 4, 5, 6 1 / 01 10 50 msps maximum clock pulse width (high) t c1 see figure 4 4, 5, 6 1 / 01 0.28 50 ns maximum clock pulse width (low) t c2 see figure 4 4, 5, 6 1 / 01 0.35 50 ns see footnotes at end of table.
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 8 dscc form 2234 apr 97 table i. electrical per formance characteristics - continued. test symbol conditions -55 (-0/+5) c < t c ; t j < +125 (-5/+0) c v ee = dv ee = -5 v, v cc = +5 v, v in ? v inb = 500 mvpp full scale differential input, digital outputs 75 or 50 ? differentially terminated. group a subgroups device type limits unit unless otherwise specified min max aperture delay t a see figure 4 9, 10, 11 1 / 01 100 400 ps aperture uncertainty (rms) jitter see figure 4 8 / 9, 10, 11 1 / 01 0.6 ps data output delay t od see figure 4 9 /, 10 /, 11 / 9, 10, 11 1 / 01 1150 1660 ps output rise/fall time for datas (20% - 80%) t r /t f see figure 4 10 / 9, 10, 11 1 / 01 250 550 ps output rise/fall time for data ready (20% - 80%) t r /t f see figure 4 10 / 9, 10, 11 1 / 01 250 550 ps data ready output delay t dr see figure 4 9 /, 10 /, 11 / 9, 10, 11 1 / 01 1110 1620 ps data ready reset delay t rdr see figure 4 9, 10, 11 1 / 01 1000 ps data to data ready. clock low pulse width t od -t dr see figure 4 12 /, 13 / 9, 10, 11 1 / 01 0 80 ps data to data ready. output delay (50% clock duty cycle) t d1 @ 1 gsps 9, 10, 11 1 / 01 420 500 ps data pipeline delay t pd see figure 4 9, 10, 11 1 / 01 4 4 clock cycles 1 / these subgroups shall be measured only for the initial test and after process or design changes which may affect the parameter. a minimum sample of 5 devices with zero failures shall be required. 2 / single ended or differential input mode, 50% clo ck duty cycle (clk, clkb), binary output data format. 3 / differential output buffers are internally loaded by 75 ? resistors. buffer bias current = 11 ma. 4 / histogram testing based on sampling of a 10 mhz sinewave at 50 msps. 5 / output error amplitude < +/- lsb around worst code. 6 / min value guaranties performances. max value guaranties functionality. 7 / min value guaranties functionality. max value guaranties performances. 8 / maximum jitter value obtained for single-ended clock input on the die (chip on board): 200 fs. 9 / specified loading conditions for digital outputs: ? 50 ohms or 75 ohms controlled impedance traces properly 50/ 75 ohms terminated, or unterminated 75 ohms controlled impedance traces. ? controlled impedance traces far end loaded by 1 standard ecli nps register. (e.g. 10e452)(t ypical input parasitic capacitance of 1.5 pf includi ng package and esd protections.) 10 / termination load parasitic capacitance derating values: ? 50 ohms or 75 ohms controlled impedance traces properly 50/ 75 ohms terminated: 60 ps/pf or 75 ps per additional eclinps load. ? unterminated (source terminated) 75 ohms controlled im pedance lines: 100 ps/pf or 150 ps per additional eclinps termination load. 11 / apply proper 50/75 impedance traces propagat ion time derating values: 6 ps/mm ( 155 ps/inch) for the evaluation board. 12 / at 1gsps, 50/50 clock duty cycle, t c2 = 500 ps (t c1 ). t dr ? t od = -100 ps (typ.) does not depend on the sampling rate. 13 / values for t od and t dr track each other over temperatur e, (1 percent variation for t od ? t dr per 100 degrees celsius temperature variation). therefore t od ? t dr variation over temperature is negligible . moreover, the internal (onchip) and package skews between each data t od s and t dr effect can be considered as negligible. consequently, minimum values for t od and t dr are never more than 100 ps apart. the same is true for the t od and t dr maximum values.
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 9 dscc form 2234 apr 97 case outline x inches millimeters symbol min max min max a .0385 .978 a1 .0310 .787 a2 .017 .023 .43 .59 a3 .004 .010 .10 .26 b .021 .025 .53 .63 c .005 .010 .13 .25 d/e .944 .956 23.978 24.282 hd/he 1.133 1.147 28.78 29.13 e .050 bsc 1.27 bsc e1 .800 bsc 20.32 bsc l .027 .037 .70 .95 figure 1. case outlines .
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 10 dscc form 2234 apr 97 case outline y inches millimeters symbol min max min max a .135 3.43 a1 .067 .083 1.7 2.1 a2 .018 .035 .46 .88 b .021 .025 .53 .63 c .005 .010 .13 .25 d/e .944 .956 23.978 24.282 hd/he 1.133 1.147 28.78 29.13 e .050 bsc 1.27 bsc e1 .800 bsc 20.32 bsc l .027 .037 .70 .95 note: the u.s. government preferred sy stem of measurement is the metric s.i. system. however, since this item was originally designed using inch-pound units of measurements, in the event of conflict between the metric and inch-pound units, the inch-pound units shall take precedence. figure 1. case outlines - continued.
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 11 dscc form 2234 apr 97 device type 01 device type 01 case outline x and y case outline x and y terminal number terminal symbol terminal number terminal symbol 1 v plusd 35 gnd 2 v plusd 36 gnd 3 d 5 37 clk 4 d 5b 38 clk 5 gnd 39 clkb 6 d 4 40 clkb 7 d 4b 41 gnd 8 dv ee 42 gnd 9 dv ee 43 gnd 10 dv ee 44 v ee 11 dr 45 v ee 12 drb 46 v cc 13 gnd 47 v cc 14 d 3 48 v ee 15 d 3b 49 diod/drrb 16 v plusd 50 gnd 17 v plusd 51 gnd 18 v plusd 52 gnd 19 d 2 53 gnd 20 d 2b 54 v in 21 d 1 55 v in 22 d 1b 56 v inb 23 d 0 57 v inb 24 d 0b 58 gnd 25 gorb 59 gnd 26 v cc 60 gain 27 gnd 61 v cc 28 gnd 62 or 29 v cc 63 orb 30 v ee 64 d 7 31 v ee 65 d 7b 32 v cc 66 d 6 33 v cc 67 d 6b 34 gnd 68 v plusd figure 2. terminal connections .
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 12 dscc form 2234 apr 97 figure 3. block diagram .
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 13 dscc form 2234 apr 97 1 gsps clock rate, data ready reset, clock held at low level. 1 gsps clock rate, data ready reset, clock held at high level. figure 4. timing waveforms .
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 14 dscc form 2234 apr 97 3.6 certificate of compliance . for device classes q and v, a certificate of compliance shall be required from a qml-38535 listed manufacturer in order to supply to t he requirements of this drawing (see 6.6.1 herein). for device class m, a certifica te of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in mil-hdbk-103 (see 6.6.2 herein). the certificate of compliance submitted to ds cc-va prior to listing as an approv ed source of supply for this drawing shall affirm that the manufactu rer's product meets, for device classes q and v, the requirements of mil-prf-38535 and herein or for device class m, the requi rements of mil-prf-38535, appendix a and herein. 3.7 certificate of conformance . a certificate of conformance as required for device classes q and v in mil-prf-38535 or for device class m in mil-prf-38535, appendix a s hall be provided with each lot of microcircuits delivered to this drawing. 3.8 notification of change for device class m . for device class m, notification to dscc-va of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in mil-prf-38535, appendix a. 3.9 verification and review for device class m . for device class m, dscc, dscc's agent, and the acquiring activity retain the option to review the manufacturer's facility and applicable required documentation. offs hore documentation shall be made available onshore at the option of the reviewer. 3.10 microcircuit group assignment for device class m . device class m devices covered by this drawing shall be in microcircuit group number 57 (see mil-prf-38535, appendix a). 4. quality assurance provisions 4.1 sampling and inspection . for device classes q and v, sampling and inspection procedures shall be in accordance with mil-prf-38535 or as modified in the device manufacturer's qua lity management (qm) plan. the modification in the qm plan shall not affect the form, fit, or function as described herein. for device class m, sampling and inspection procedures shall be in accordance with mil-prf-38535, appendix a. 4.2 screening . for device classes q and v, screening shall be in accordance with mil-prf-38535, and shall be conducted on all devices prior to qualification and technology conform ance inspection. for device class m, screening shall be in accordance with method 5004 of mil-std-883, and shall be conduct ed on all devices prior to qua lity conformance inspection. 4.2.1 additional criteria for device class m . a. burn-in test, method 1015 of mil-std-883. (1) test condition a, b, c or d. the test circuit s hall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. the test circuit shall specify the inputs, outputs, biases, and pow er dissipation, as applicable, in acco rdance with the intent specified in test method 1015. (2) t a = +125 c, minimum. b. interim and final electrical test parameter s shall be as specified in table ii herein. 4.2.2 additional criteria for device classes q and v . a. the burn-in test duration, test condi tion and test temperature, or approved alte rnatives shall be as specified in the device manufacturer's qm plan in accordance with mil-prf- 38535. the burn-in test circuit shall be maintained under document revision level control of the device manufacturer' s technology review board (trb) in accordance with mil-prf-38535 and shall be made available to the acquiring or preparing activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of mil-std-883. b. interim and final electrical test parameter s shall be as specified in table ii herein. c. additional screening for device class v beyond the require ments of device class q shall be as specified in mil-prf-38535, appendix b.
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 15 dscc form 2234 apr 97 4.3 qualification inspection for device classes q and v . qualification inspection for device classes q and v shall be in accordance with mil-prf-38535. inspections to be perform ed shall be those specified in mil-prf-38535 and herein for groups a, b, c, d, and e inspec tions (see 4.4.1 through 4.4.4). 4.4 conformance inspection . technology conformance inspection for cl asses q and v shall be in accordance with mil-prf-38535 including groups a, b, c, d, and e inspections and as specified herein. qualit y conformance inspection for device class m shall be in accordance with mil-prf-38535, appendi x a and as specified herein. inspections to be performed for device class m shall be those specified in method 5005 of mi l-std-883 and herein for groups a, b, c, d, and e inspections (see 4.4.1 through 4.4.4). 4.4.1 group a inspection . a. tests shall be as specified in table ii herein. b. subgroups 7, and 8 in table i, met hod 5005 of mil-std-883 shall be omitted table ii. electrical test requirements . test requirements subgroups (in accordance with mil-std-883, method 5005, table i) subgroups (in accordance with mil-prf-38535, table iii) device class m device class q device class v interim electrical parameters (see 4.2) 1, 9 1, 9 1, 9 final electrical parameters (see 4.2) 1 /, 2 / 1, 2, 3, 4, 5, 6, 9, 10, 11 1 /, 2 / 1, 2, 3, 4, 5, 6, 9, 10, 11 1 /, 2 / 1, 2, 3, 4, 5, 6,9, 10, 11 group a test requirements (see 4.4) 2 / 1, 2, 3, 4, 5, 6, 9, 10, 11 2 / 1, 2, 3, 4, 5, 6, 9, 10, 11 2 / 1, 2, 3, 4, 5, 6, 9, 10, 11 group c end-point electrical parameters (see 4.4) 1, 2, 3 1, 2, 3 1, 2, 3 group d end-point electrical parameters (see 4.4) 1, 2, 3 1, 2, 3 1, 2, 3 group e end-point electrical parameters (see 4.4) - - - - - - - - - 1 / pda applies to subgroup 1. 2 / subgroups 4, 5, 6, 9, 10, 11 shall be measured only for the initial test and after process or design changes which may affect the parameter. a minimum sample of 5 devices with zero failures shall be required. 4.4.2 group c inspection . the group c inspection end-point electrical param eters shall be as specified in table ii herein. 4.4.2.1 additional criteria for device class m . steady-state life test conditions, method 1005 of mil-std-883: a. test condition a, b, c or d. the test circuit sha ll be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acqui ring activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of mil-std-883. b. t a = +125 c, minimum. c. test duration: 1,000 hours, except as permitted by method 1005 of mil-std-883.
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 16 dscc form 2234 apr 97 4.4.2.2 additional criteria for device classes q and v . the steady-state life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturer's qm plan in accordance with mil-prf-38535. the test circuit shall be maintained under document revision level c ontrol by the device manufacturer's trb in accordance with mil-prf-38535 and shall be made available to the acquiring or prepar ing activity upon request. the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of mil-std-883. 4.4.3 group d inspection . the group d inspection end-point electrical param eters shall be as specified in table ii herein. 4.4.4 group e inspection . group e inspection is required only for par ts intended to be marked as radiation hardness assured (see 3.5 herein). a. end-point electrical parameters shall be as specified in table ii herein. b. for device classes q and v, the devices or test vehicl e shall be subjected to radiation hardness assured tests as specified in mil-prf-38535 for the rha level being tested. for device class m, the devices shall be subjected to radiation hardness assured tests as specified in mil- prf-38535, appendix a for the rha level being tested. all device classes must meet the postirradiation end-point el ectrical parameter limits as defined in table i at t a = +25 c 5 c, after exposure, to the subgroups specified in table ii herein. c. when specified in the purchase or der or contract, a copy of the rha delta limits shall be supplied. 5. packaging 5.1 packaging requirements . the requirements for packaging shall be in accordance with mil-prf-38535 for device classes q and v or mil-prf-38535, appendix a for device class m. 6. notes 6.1 intended use . microcircuits conforming to this drawing are intended for use for gove rnment microcircuit applications (original equipment), design applic ations, and logistics purposes. 6.1.1 replaceability . microcircuits covered by this drawing will repl ace the same generic device covered by a contractor prepared specification or drawing. 6.1.2 substitutability . device class q devices will replace device class m devices. 6.2 configuration control of smd's . all proposed changes to existing smd's will be coordinated with the users of record for the individual documents. this coordination will be accomplished using dd form 1692, engineering change proposal. 6.3 record of users . military and industrial users should inform de fense supply center columbus when a system application requires configuration control and which smd's are applic able to that system. dscc will maintain a record of users and this list will be used for coordination and distribution of changes to the drawings. users of drawings covering microelectronic devices (fsc 5962) shoul d contact dscc-va, telephone (614) 692-0544. 6.4 comments . comments on this drawing should be directed to dscc-va , columbus, ohio 43216-5000, or telephone (614) 692-0547. 6.5 abbreviations, symbols, and definitions . the abbreviations, symbols, and definitions used herein are defined in mil-prf-38535 and mil-hdbk-1331, and table iii herein.
standard microcircuit drawing size a 5962-00504 defense supply center columbus columbus, ohio 43216-5000 revision level sheet 17 dscc form 2234 apr 97 table iii. symbol definitions . symbol signal name function gnd ground ground pins. to be connected to external ground plane. v plusd digital positive power supply digital positive supply. (0 v for ecl compatibility, +2.4 v for lvds compatibility). (see note) v cc positive power supply +5 v positive supply. v ee analog negative power supply -5 v analog negative supply. dv ee digital negative power supply -5 v digital negative supply. v in differential analog input in phase (+) analog input signal of the sample and hold differential preamplifier. v inb differential analog input inverted phase (-) of analog input signal (v in ). clk differential clock input in phase (+) ecl clock input signal. the analog input is sampled and held on the rising edge of the clk signal. clkb differential clock input inverted phase (-) of ecl clock input signal (v in ). d 0 , d 1 , d 2 , d 3 , d 4 , d 5 , d 6 , d 7 differential output data port in phase (+) digital outputs. b 0 is the lsb. b 7 is the msb. d 0b , d 1b , d 2b , d 3b , d 4b , d 5b , d 6b , d 7b differential output data port inverted phase (-) digital outputs. b 0b is the inverted lsb. b 7b is the inverted msb. or out of range output in phase (+) out of range bit. out of range is high on the leading edge of code 0 and 256. orb out of range output inverted phase (-) of out of range bit (or). dr differential data ready output in phase (+) output of data ready signal. drb differential data ready output inverted phase (-) output of data ready signal (dr). gorb gray or binary digital output select gray or binary select output format contro l pin. binary output format if gorb is floating or v cc . gray output format if gorb is connected at ground (0 v). gain adc gain adjust adc gain adjust pin. diod/drrb die junction temp. measurement /asynchronous data ready reset this pin has a double function (can be left open or grounded if not used): diod: die junction temperature monitoring pin. drrb: asynchronous data ready reset function. note: the common mode level of the output buffers is 1.2 v bel ow the positive digital supply. for ecl compatibility the positive digital supply must be set at 0 v (ground). for lvds compatibility (output common mode at +1.2 v) the positive digita l supply must be set at 2.4 v. if the subsequent lvds circuitr y can withstand a lower level for input common mode, it is recommended to lower the positive digital supply level in t he same proportion in order to spare power dissipation. 6.6 sources of supply . 6.6.1 sources of supply for device classes q and v . sources of supply for device classes q and v are listed in qml-38535. the vendors listed in qml-38535 have submitted a certificate of compliance (see 3.6 herein) to dscc-va and have agreed to this drawing. 6.6.2 approved sources of supply for device class m . approved sources of supply for cl ass m are listed in mil-hdbk-103. the vendors listed in mil-hdbk-103 have agreed to this drawi ng and a certificate of compliance (see 3.6 herein) has been submitted to and accepted by dscc-va.
standard microcircuit drawing bulletin date: 01-11-15 approved sources of supply for smd 5962-00504 are listed below for immediate acquisition information only and shall be added to mil-hdbk-103 and qml-38535 during the next revision. mil-hdbk-103 and qml-38535 will be revised to include the addition or deletion of sources. the vendors listed below have agreed to this drawing and a certificate of compliance has been submitted to and accept ed by dscc-va. this bulletin is superseded by the next dated revision of mil-hdbk-103 and qml-38535. standard microcircuit drawing pin 1 / vendor cage number vendor similar pin 2 / 5962-0050401QXC 1fn41 ts8388bmfsb/q 5962-0050401qyc 1fn41 ts8388bmfb/q 1 / the lead finish shown for each pin representing a hermetic package is the most readily available from the manufacturer listed for that part. if the desired lead finish is not listed contact the vendor to determine its availability. 2 / caution . do not use this number for item acquisition. items acquired to this number may not satisfy the performance requirements of this drawing. vendor cage vendor name number and address 1fn41 atmel corp. 2325 orchard parkway san jose, ca 95131-1034 the information contained herein is disseminated for convenience only and the government assumes no liability whatsoever for any inaccuracies in the information bulletin.

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