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description mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 1 description the m16c/62m group of single-chip microcomputers are built using the high-performance silicon gate cmos process using a m16c/60 series cpu core and are packaged in a 100-pin plastic molded qfp. these single-chip microcomputers operate using sophisticated instructions featuring a high level of instruc- tion efficiency. with 1m bytes of address space, low voltage (2.2v to 3.6v), they are capable of executing instructions at high speed. they also feature a built-in multiplier and dmac, making them ideal for control- ling office, communications, industrial equipment, and other high-speed processing applications. the m16c/62m group includes a wide range of products with different internal memory types and sizes and various package types. features ? memory capacity .................................. rom (see figure 1.1.4. rom expansion) ram 10k to 20k bytes ? shortest instruction execution time ...... 100ns (f(x in )=10mh z , v cc =2.7v to 3.6v) 142.9ns (f(x in )=7mh z , v cc =2.2v to 3.6v with software one-wait) ? supply voltage ..................................... 2.7v to 3.6v (f(x in )=10mh z , without software wait) 2.4v to 2.7v (f(x in )=7mh z , without software wait) 2.2v to 2.4v (f(x in )=7mh z with software one-wait) ? low power consumption ...................... 28.5mw (v cc = 3v, f(x in )=10mh z , without software wait) ? interrupts .............................................. 25 internal and 8 external interrupt sources, 4 software interrupt sources; 7 levels (including key input interrupt) ? multifunction 16-bit timer ...................... 5 output timers + 6 input timers ? serial i/o .............................................. 5 channels (3 for uart or clock synchronous, 2 for clock synchronous) ? dmac .................................................. 2 channels (trigger: 24 sources) ? a-d converter ....................................... 10 bits x 8 channels (expandable up to 10 channels) ? d-a converter ....................................... 8 bits x 2 channels ? crc calculation circuit ......................... 1 circuit ? watchdog timer .................................... 1 line ? programmable i/o ............................... 87 lines ? input port .............................................. _______ 1 line (p8 5 shared with nmi pin) ? memory expansion .............................. available (to a maximum of 1m bytes) ? chip select output ................................ 4 lines ? clock generating circuit ....................... 2 built-in clock generation circuits (built-in feedback resistor, and external ceramic or quartz oscillator) applications audio, cameras, office equipment, communications equipment, portable equipment
description mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 2 pin configuration figures 1.1.1 and 1.1.2 show the pin configurations (top view). pin configuration (top view) package: 100p6s-a figure 1.1.1. pin configuration (top view) 1 2 3 4 5 6 7 8 9 101112131415161718192021222324252627282930 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 1 00 p0 0 /d 0 p0 1 /d 1 p0 2 /d 2 p0 3 /d 3 p0 4 /d 4 p0 5 /d 5 p0 6 /d 6 p0 7 /d 7 p1 0 /d 8 p1 1 /d 9 p1 2 /d 10 p1 3 /d 11 p1 4 /d 12 v ref av ss v cc x in x out v ss reset cnvss p8 7 /x cin p8 6 /x cout byte p2 0 /a 0 (/d 0 /-) p2 1 /a 1 (/d 1 /d 0 ) p2 2 /a 2 (/d 2 /d 1 ) p2 3 /a 3 (/d 3 /d 2 ) p2 4 /a 4 (/d 4 /d 3 ) p2 5 /a 5 (/d 5 /d 4 ) p2 6 /a 6 (/d 6 /d 5 ) p2 7 /a 7 (/d 7 /d 6 ) p3 0 /a 8 (/-/d 7 ) p3 1 /a 9 p3 2 /a 10 p3 3 /a 11 p3 4 /a 12 p3 5 /a 13 p3 6 /a 14 p3 7 /a 15 p4 0 /a 16 p4 1 /a 17 p4 2 /a 18 p4 3 /a 19 p7 4 /ta2 out /w p7 6 /ta3 out p5 6 /ale p7 7 /ta3 in p5 5 /hold p5 4 /hlda p5 3 /bclk p5 2 /rd vcc vss p5 7 /rdy/clk out p4 5 /cs1 p4 6 /cs2 p4 7 /cs3 avcc p6 3 /t x d 0 p6 5 /clk 1 p6 6 /rxd 1 p6 7 /t x d 1 p6 1 /clk 0 p6 2 /rxd 0 p10 0 /an 0 p10 1 /an 1 p10 2 /an 2 p10 3 /an 3 p9 3 /da 0 /tb3 in p9 4 /da 1 /tb4 in p9 5 /anex0/clk4 p9 6 /anex1/s out 4 p9 1 /tb1 in /s in 3 p9 2 /tb2 in /s out 3 p8 0 /ta4 out /u p6 0 /cts 0 /rts 0 p6 4 /cts 1 /rts 1 /clks 1 p7 2 /clk 2 /ta1 out /v p8 2 /int 0 p7 1 /rxd 2 /scl/ta0 in /tb5 in p8 3 /int 1 p8 5 /nmi p9 7 /ad trg /s in 4 p4 4 /cs0 p5 0 /wrl/wr p5 1 /wrh/bhe p9 0 /tb0 in /clk3 p7 0 /t x d 2 /sda/ta0 out p8 4 /int 2 p8 1 /ta4 in /u p7 5 /ta2 in /w p1 5 /d 13 /int3 p1 6 /d 14 /int4 p1 7 /d 15 /int5 p10 7 /an 7 /ki 3 p10 6 /an 6 /ki 2 p10 5 /an 5 /ki 1 p10 4 /an 4/ ki 0 m16c/62 group p7 3 /cts 2 /rts 2 /ta1 in /v
description mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 3 figure 1.1.2. pin configuration (top view) package: 100p6q-a pin configuration (top view) 1 2 3 4 5 6 7 8 9 1011121314151617181920 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 1 00 p0 0 /d 0 p0 1 /d 1 p0 2 /d 2 p0 3 /d 3 p0 4 /d 4 p0 5 /d 5 p0 6 /d 6 p0 7 /d 7 p1 0 /d 8 p1 1 /d 9 p1 2 /d 10 p1 3 /d 11 p1 4 /d 12 v ref av ss v cc x in x out v ss reset cnvss p8 7 /x cin p8 6 /x cout byte p2 0 /a 0 (/d 0 /-) p2 1 /a 1 (/d 1 /d 0 ) p2 2 /a 2 (/d 2 /d 1 ) p2 3 /a 3 (/d 3 /d 2 ) p2 4 /a 4 (/d 4 /d 3 ) p2 5 /a 5 (/d 5 /d 4 ) p2 6 /a 6 (/d 6 /d 5 ) p2 7 /a 7 (/d 7 /d 6 ) p3 0 /a 8 (/-/d 7 ) p3 1 /a 9 p3 2 /a 10 p3 3 /a 11 p3 4 /a 12 p3 5 /a 13 p3 6 /a 14 p3 7 /a 15 p4 0 /a 16 p4 1 /a 17 p4 2 /a 18 p4 3 /a 19 p7 4 /ta2 out /w p7 6 /ta3 out p5 6 /ale p7 7 /ta3 in p5 5 /hold p5 4 /hlda p5 3 /bclk p5 2 /rd vcc vss p5 7 /rdy/clk out p4 5 /cs1 p4 6 /cs2 p4 7 /cs3 avcc p6 3 /t x d 0 p6 5 /clk 1 p6 6 /rxd 1 p6 7 /t x d 1 p6 1 /clk 0 p6 2 /rxd 0 p10 0 /an 0 p10 1 /an 1 p10 2 /an 2 p10 3 /an 3 p9 3 /da 0 /tb3 in p9 4 /da 1 /tb4 in p9 5 /anex0/clk4 p9 6 /anex1/s out 4 p9 1 /tb1 in /s in 3 p9 2 /tb2 in /s out 3 p8 1 /ta4 in /u p8 0 /ta4 out /u p6 0 /cts 0 /rts 0 p6 4 /cts 1 /rts 1 /clks 1 p8 2 /int 0 p8 3 /int 1 p8 5 /nmi p9 7 /ad trg /s in 4 p4 4 /cs0 p5 0 /wrl/wr p5 1 /wrh/bhe p9 0 /tb0 in /clk3 p8 4 /int 2 p7 2 /clk 2 /ta1 out /v p7 1 /rxd 2 /scl/ta0 in /tb5 in p7 0 /t x d 2 /sda/ta0 out p7 5 /ta2 in /w p7 3 /cts 2 /rts 2 /ta1 in /v p1 5 /d 13 /int 3 p1 6 /d 14 /int 4 p1 7 /d 15 /int 5 p10 7 /an 7 /ki 3 p10 6 /an 6 /ki 2 p10 5 /an 5 /ki 1 p10 4 /an 4/ ki 0 m16c/62 group
description mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 4 block diagram figure 1.1.3 is a block diagram of the m16c/62m group. block diagram of the m16c/62m group figure 1.1.3. block diagram of m16c/62m group aaaa aaaa timer timer ta0 (16 bits) timer ta1 (16 bits) timer ta2 (16 bits) timer ta3 (16 bits) timer ta4 (16 bits) timer tb0 (16 bits) timer tb1 (16 bits) timer tb2 (16 bits) timer tb3 (16 bits) timer tb4 (16 bits) timer tb5 (16 bits) internal peripheral functions watchdog timer (15 bits) dmac (2 channels) d-a converter (8 bits x 2 channels) a-d converter (10 bits x 8 channels expandable up to 10 channels) uart/clock synchronous si/o (8 bits x 3 channels) system clock generator x in -x out x cin -x cout m16c/60 series16-bit cpu core i/o ports port p0 8 port p1 8 port p2 8 port p3 8 port p4 8 port p5 8 port p6 8 8 r0l r0h r1h r1l r2 r3 a0 a1 fb r0l r0h r1h r1l r2 r3 a0 a1 fb registers isp usp stack pointer crc arithmetic circuit (ccitt ) (polynomial : x 16 +x 12 +x 5 +1) multiplier 7 8 8 port p10 port p9 port p8 port p7 aaaaaa a aaaa a a aaaa a a aaaa a aaaaaa memory port p8 5 rom (note 1) ram (note 2) note 1: rom size depends on mcu type. note 2: ram size depends on mcu type. sb flg pc program counter clock synchronous si/o (8 bits x 2 channels) vector table intb flag register
description mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 5 item performance number of basic instructions 91 instructions shortest instruction execution time 100ns(f(x in )=10mh z , v cc =2.7v to 3.6v) 142.9ns (f(x in )=7mh z , v cc =2.2v to 3.6v with software one-wait) memory rom (see the figure 1.1.4. rom expansion) capacity ram 10k to 20k bytes i/o port p0 to p10 (except p8 5 ) 8 bits x 10, 7 bits x 1 input port p8 5 1 bit x 1 multifunction ta0, ta1, ta2, ta3, ta4 16 bits x 5 timer tb0, tb1, tb2, tb3, tb4, tb5 16 bits x 6 serial i/o uart0, uart1, uart2 (uart or clock synchronous) x 3 si/o3, si/o4 (clock synchronous) x 2 a-d converter 10 bits x (8 + 2) channels d-a converter 8 bits x 2 dmac 2 channels (trigger: 24 sources) crc calculation circuit crc-ccitt watchdog timer 15 bits x 1 (with prescaler) interrupt 25 internal and 8 external sources, 4 software sources, 7 levels clock generating circuit 2 built-in clock generation circuits (built-in feedback resistor, and external ceramic or quartz oscillator) supply voltage 2.7v to 3.6v (f(x in )=10mh z , without software wait) 2.4v to 2.7v (f(x in )=7mh z , without software wait) 2.2v to 2.4v (f(x in )=7mh z with software one-wait) power consumption 28.5mw (f(x in ) =10mh z , v cc =3v without software wait) i/o i/o withstand voltage 3v characteristics output current 1ma memory expansion available (to a maximum of 1m bytes) device configuration cmos high performance silicon gate package 100-pin plastic mold qfp table 1.1.1. performance outline of m16c/62m group performance outline table 1.1.1 is a performance outline of m16c/62m group.
description mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 6 mitsubishi plans to release the following products in the m16c/62m group: (1) support for mask rom version and flash memory version (2) rom capacity (3) package 100p6s-a : plastic molded qfp (mask rom and flash memory versions) 100p6q-a : plastic molded qfp (mask rom and flash memory versions) the m16c/62m group products currently supported are listed in table 1.1.2. table 1.1.2. m16c/62m group rom size (byte) external rom 128k 96k 64k 32k m30624mgm-xxxfp/gp mask rom version flash memory version m30620fcmfp/gp 256k m30620mcm-xxxfp/gp m30624fgmfp/gp 100p6s-a 100p6q-a 100p6s-a 100p6q-a 100p6s-a 100p6q-a 100p6s-a m30620mcm-xxxgp m30620mcm-xxxfp 100p6q-a m30624mgm-xxxfp m30624mgm-xxxgp m30620fcmfp m30620fcmgp m30624fgmfp m30624fgmgp ram capacity rom capacity package type remarks type no june, 2000 128k byte 20k byte 256k byte 128k byte 256k byte 10k byte 20k byte 10k byte mask rom version flash memory 3v version figure 1.1.4. rom expansion
description mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 7 figure 1.1.5. type no., memory size, and package m16c/62 group m16c family package type: fp : package 100p6s-a gp : 100p6q-a rom no. omitted for blank flash memory version rom capacity: c : 128k bytes g : 256k bytes memory type: m : mask rom version f : flash memory version type no. m 3 0 6 2 0 m c m ?x x x f p shows ram capacity, pin count, etc (the value itself has no specific meaning)
electrical characteristics mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 8 table 1.26.1. absolute maximum ratings v ref , x in x out - 0.3 to vcc + 0.3 - 0.3 to vcc + 0.3 - 0.3 to 4.6 - 65 to 150 300 - 20 to 85 / -40 to 85 (note) p3 0 to p3 7 ,p4 0 to p4 7 , p5 0 to p5 7 , p6 0 to p6 7 , p7 2 to p7 7 , p8 0 to p8 7 , p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 7 , p4 0 to p4 7 , p5 0 to p5 7 , p6 0 to p6 7 , p7 2 to p7 7 , p8 0 to p8 4, p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , reset, p9 0 to p9 7 , p10 0 to p10 7 , p8 6 , p8 7 , p9 0 to p9 7 , p10 0 to p10 7 , p7 0 , p7 1 p7 0 , p7 1 - 0.3 to 4.6 cnv ss , byte, v cc =av cc v cc =av cc - 0.3 to 4.6 - 0.3 to 4.6 v o p d ta=25 v i avcc vcc t stg t opr c symbol parameter condition rated value unit supply voltage analog supply voltage input voltage output voltage power dissipation operating ambient temperature storage temperature v v v v v v mw c c note : specify a product of -40 c to 85 c to use it.
electrical characteristics mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 9 2.2 3.6 vcc 3.0 vcc avcc v v 0 0 v ih i oh (avg) ma ma vss avss 0.8vcc v v v v v v v 0.8vcc 0.5vcc vcc vcc vcc 0.2vcc 0.2vcc 0 0 0 0.16vcc i oh (peak) p7 2 to p7 7 , p8 0 to p8 7 , p9 0 to p9 7 , p10 0 to p10 7 , - 5.0 - 10.0 p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 (during single-chip mode) p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 7 , p4 0 to p4 7 , p5 0 to p5 7 , p6 0 to p6 7 , p7 2 to p7 7 , p8 0 to p8 4 , p8 6 , p8 7 , p9 0 to p9 7 , p10 0 to p10 7 p3 1 to p3 7 , p4 0 to p4 7 , p5 0 to p5 7, p6 0 to p6 7 , 10.0 5.0 ma f (x in ) i ol (peak) ma i ol (avg) v x in , reset, cnv ss , byte p7 0 to p7 7 , p8 0 to p8 7 , p9 0 to p9 7 , p10 0 to p10 7 , p3 1 to p3 7 , p4 0 to p4 7 , p5 0 to p5 7, p6 0 to p6 7 , x in , reset, cnv ss , byte p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 (during single-chip mode) p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 7 , p4 0 to p4 7 , p5 0 to p5 7 , p6 0 to p6 7 , p7 2 to p7 7 , p8 0 to p8 4 , p8 6 , p8 7 , p9 0 to p9 7 , p10 0 to p10 7 p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 7 , p4 0 to p4 7 , p5 0 to p5 7 , p6 0 to p6 7 , p7 0 to p7 7 , p8 0 to p8 4 , p8 6 , p8 7 , p9 0 to p9 7 , p10 0 to p10 7 p0 0 to p0 7 , p1 0 to p1 7 , p2 0 to p2 7 , p3 0 to p3 7 , p4 0 to p4 7 , p5 0 to p5 7 , p6 0 to p6 7 , p7 0 to p7 7 , p8 0 to p8 4 , p8 6 , p8 7 , p9 0 to p9 7 , p10 0 to p10 7 p7 0 , 0.8vcc 4.6 v p7 1 v il 10 x vcc - 17 vcc=2.7v to 3.6v vcc=2.4v to 2.7v 0 0 mhz mhz 10 0 mhz 17.5 x vcc - 35 f (xc in ) khz 50 32.768 6 x vcc - 6.2 vcc=2.7v to 3.6v vcc=2.2v to 2.7v 0 0 mhz mhz 10 vcc=2.2v to 2.4v supply voltage analog supply voltage supply voltage analog supply voltage high input voltage low input voltage high peak output current high average output current low peak output current low average output current main clock input oscillation frequency subclock oscillation frequency with wait no wait symbol parameter unit standard min. typ. max. (data input function during memory expansion and microprocessor modes) (data input function during memory expansion and microprocessor modes) note 1: the mean output current is the mean value within 100ms. note 2: the total i ol (peak) for ports p0, p1, p2, p8 6 , p8 7 , p9, and p10 must be 80ma max. the total i oh (peak) for ports p0, p1, p2, p8 6 , p8 7 , p9, and p10 must be 80ma max. the total i ol (peak) for ports p3, p4, p5, p6, p7, and p8 0 to p8 4 must be 80ma max. the total i oh (peak) for ports p3, p4, p5, p6, p7 2 to p7 7 , and p8 0 to p8 4 must be 80ma max. note 3: specify a product of -40 c to 85 c to use it. note 4: relationship between main clock oscillation frequency and supply voltage. note 5: execute case without wait, program / erase of flash memory by v cc =2.7v to 3.6v and f(bclk) 6.25 mhz. execute case with wait, program / erase of flash memory by v cc =2.7v to 3.6v and f(bclk) 10.0 mhz. table 1.26.2. recommended operating conditions (referenced to v cc = 2.2v to 3.6v at ta = C 20 c to 85 o c / C 40 c to 85 o c(note3) unless otherwise specified) main clock input oscillation frequency (with wait) aaaaaaa aaaaaaa aaaaaaa aaaaaaa aaaaaaa aaaaaaa aaaaaaa aaaaaaa 2.2 2.7 3.6 operating maximum frequency [mh z ] supply voltage [v] (bclk: no division) 6 x v cc e6.2mh z main clock input oscillation frequency (no wait) aaaaaaa aaaaaaa aaaaaaa aaaaaaa aaaaaaa aaaaaaa aaaaaaa aaaaaaa 10.0 3.5 0.0 operating maximum frequency [mh z ] supply voltage [v] (bclk: no division) 10 x v cc e 17mh z 2.4 7.0 2.2 2.7 3.6 2.4 10.0 0.0 7.0 17.5 x v cc e 35mh z flash program voltage flash read operation voltage v cc =2.7v to 3.6v v cc =2.4v to 3.6v v cc =2.7v to 3.4v v cc =2.2v to 2.4v flash memory version program voltage and read operation voltage characteristics
electrical characteristics mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 10 table 1.26.3. electrical characteristics (referenced to v cc = 2.7v to 3.6v, v ss = 0v at ta = C 20 o c to 85 o c / C 40 o c to 85 o c (note1) , f(x in ) = 10mh z without wait unless otherwise specified) v v x o u t 2 . 5 2 . 5 v 0 . 5 v x o u t 0 . 5 0 . 5 2 . 5 i o h = 1 m a i o h = 0 . 1 m a i o h = 5 0 m a i o l = 1 m a i o l = 0 . 1 m a i o l = 5 0 m a p 0 0 t o p 0 7 , p 1 0 t o p 1 7 , p 2 0 t o p 2 7 , p 3 0 t o p 3 7 , p 0 0 t o p 0 7 , p 1 0 t o p 1 7 , p 2 0 t o p 2 7 , p 3 0 t o p 3 7 , p 4 0 t o p 4 7 , p 5 0 t o p 5 7 , p 6 0 t o p 6 7 , p 7 2 t o p 7 7 , p 4 0 t o p 4 7 , p 5 0 t o p 5 7 , p 6 0 t o p 6 7 , p 7 0 t o p 7 7 , p 8 0 t o p 8 4 , p 8 6 , p 8 7 , p 9 0 t o p 9 7 , p 1 0 0 t o p 1 0 7 h i g h p o w e r l o w p o w e r h i g h p o w e r l o w p o w e r p 8 0 t o p 8 4 , p 8 6 , p 8 7 , p 9 0 t o p 9 7 , p 1 0 0 t o p 1 0 7 h i g h p o w e r l o w p o w e r x c o u t 3 . 0 1 . 6 v 0 . 20 . 8v 0 . 21 . 8v p 0 0 t o p 0 7 , p 1 0 t o p 1 7 , p 2 0 t o p 2 7 , p 3 0 t o p 3 7 , p 4 0 t o p 4 7 , p 5 0 t o p 5 7 , p 6 0 t o p 6 7 , p 7 0 t o p 7 7 , p 8 0 t o p 8 7 , p 9 0 t o p 9 7 , p 1 0 0 t o p 1 0 7 , 4 . 0 m a m a w h e n c l o c k i s s t o p p e d2 . 0v r e s e t x i n , r e s e t , c n v s s , b y t e v i = 3 v v i = 0 v 4 . 0 p 0 0 t o p 0 7 , p 1 0 t o p 1 7 , p 2 0 t o p 2 7 , p 3 0 t o p 3 7 , p 4 0 t o p 4 7 , p 5 0 t o p 5 7 , p 6 0 t o p 6 7 , p 7 0 t o p 7 7 , p 8 0 t o p 8 7 , p 9 0 t o p 9 7 , p 1 0 0 t o p 1 0 7 , x i n , r e s e t , c n v s s , b y t e x i n x c i n 1 0 . 0 3 . 0 m w m w s q u a r e w a v e , n o d i v i s i o n f ( x i n ) = 1 0 m h z m a 9 . 52 1 . 2 5 m a s k r o m v e r s i o n 7 5 k w p 0 0 t o p 0 7 , p 1 0 t o p 1 7 , p 2 0 t o p 2 7 , p 3 0 t o p 3 7 , p 4 0 t o p 4 7 , p 5 0 t o p 5 7 , p 6 0 t o p 6 7 , p 7 2 t o p 7 7 , p 8 0 t o p 8 4 , p 8 6 , p 8 7 , p 9 0 t o p 9 7 , p 1 0 0 t o p 1 0 7 v x c o u t 0 0 h i g h p o w e r l o w p o w e r v i = 0 v 2 03 3 0 w h e n c l o c k i s s t o p p e d t a = 2 5 c 1 . 0 m a t a = 8 5 c 2 0 . 0 w h e n c l o c k i s s t o p p e d f ( x c i n ) = 3 2 k h z w h e n a w a i t i n s t r u c t i o n i s e x e c u t e d . o s c i l l a t i o n c a p a c i t y h i g h ( n o t e 2 ) 2 . 8 m a 0 . 9 m a f ( x c i n ) = 3 2 k h z w h e n a w a i t i n s t r u c t i o n i s e x e c u t e d . o s c i l l a t i o n c a p a c i t y l o w ( n o t e 2 ) s q u a r e w a v e , n o d i v i s i o n f ( x i n ) = 1 0 m h z m a 1 2 . 02 1 . 2 5 f l a s h m e m o r y 3 v v e r s i o n s q u a r e w a v e f ( x c i n ) = 3 2 k h z 4 5 . 0 m a m a s k r o m v e r s i o n , f l a s h m e m o r y 3 v v e r s i o n s d a , c l k 0 t o c l k 4 , t a 2 o u t t o t a 4 o u t , h o l d , r d y , t a 0 i n t o t a 4 i n , t b 0 i n t o t b 5 i n , i n t 0 t o i n t 5 , n m i , a d t r g , c t s 0 t o c t s 2 , s c l , k i 0 t o k i 3 , r x d 0 t o r x d 2 , s i n 3 , s i n 4 m a s k r o m v e r s i o n , f l a s h m e m o r y 3 v v e r s i o n f l a s h m e m o r y 3 v v e r s i o n p r o g r a m f l a s h m e m o r y 3 v v e r s i o n e r a s e s q u a r e w a v e , d i v i s i o n b y 2 f ( x i n ) = 1 0 m h z s q u a r e w a v e , d i v i s i o n b y 2 f ( x i n ) = 1 0 m h z 1 4 . 0 1 7 . 0 m a m a s y m b o l v o h h i g h o u t p u t v o l t a g e v o h v o l l o w o u t p u t v o l t a g e l o w o u t p u t v o l t a g e v o l h i g h o u t p u t v o l t a g e s t a n d a r d t y p . u n i t m e a s u r i n g c o n d i t i o n m i nm a x . p a r a m e t e r h i g h o u t p u t v o l t a g e w i t h n o l o a d a p p l i e d w i t h n o l o a d a p p l i e d h y s t e r e s i s h y s t e r e s i s h i g h i n p u t c u r r e n t i i h l o w i n p u t c u r r e n t i i l v r a m r a m r e t e n t i o n v o l t a g e i c c p o w e r s u p p l y c u r r e n t v t + v t v t + v t r f x i n r f x c i n f e e d b a c k r e s i s t a n c e f e e d b a c k r e s i s t a n c e r pu l l u p l o w o u t p u t v o l t a g e w i t h n o l o a d a p p l i e d w i t h n o l o a d a p p l i e d i n s i n g l e - c h i p m o d e , t h e o u t p u t p i n s a r e o p e n a n d o t h e r p i n s a r e v s s p u l l - u p r e s i s t a n c e note 1: specify a product of -40 c to 85 c to use it. note 2: with one timer operated using f c32 .
electrical characteristics mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 11 r l a d d e r r e f e r e n c e v o l t a g e a n a l o g i n p u t v o l t a g e k w v v i a v r e f v 0 2 . 4 1 0 v c c v r e f 4 0 t c o n v v r e f = v c c b i t s l s b v r e f = v c c 2 1 0 v r e f = v c c = 3 v , f a d = f a d / 2 9 . 8 m s l a d d e r r e s i s t a n c e c o n v e r s i o n t i m e ( 8 b i t ) a b s o l u t e a c c u r a c y s a m p l e & h o l d f u n c t i o n n o t a v a i l a b l e ( 8 b i t ) s t a n d a r d m i n .t y p .m a x s y m b o lp a r a m e t e rm e a s u r i n g c o n d i t i o nu n i t % 1 . 0 b i t s 8 r o k w 2 0 1 0 4 m a i v r e f 1 . 0 t s u 3 m s r e s o l u t i o n a b s o l u t e a c c u r a c y s e t u p t i m e o u t p u t r e s i s t a n c e r e f e r e n c e p o w e r s u p p l y i n p u t c u r r e n t( n o t e 1 ) s t a n d a r d m i n .t y p .m a x s y m b o lp a r a m e t e rm e a s u r i n g c o n d i t i o nu n i t p a g e p r o g r a m t i m e b l o c k e r a s e t i m e e r a s e a l l u n l o c k e d b l o c k s t i m e l o c k b i t p r o g r a m t i m e 6 5 0 5 0 x n ( n o t e ) 6 1 2 0 6 0 0 6 0 0 x n ( n o t e ) 1 2 0 m s m s m s m s p a r a m e t e r s t a n d a r d m i n .t y p .m a x u n i t r e s o l u t i o n table 1.26.5. d-a conversion characteristics (referenced to v cc = 2.4v to 3.6v, v ss = av ss = 0v, v ref =3v, at ta = C 20 o c to 85 o c / C 40 o c to 85 o c (note2), f(x in )=10mh z unless otherwise specified) note 1: this applies when using one d-a converter, with the d-a register for the unused d-a converter set to 00 16 . the a-d converter's ladder resistance is not included. also, when da register contents are not 00, the current i vref always flows even though vref may have been set to be unconnected by the a-d control register. note 2: specify a product of C40 c to 85 c to use it. note 1: connect av cc pin to v cc pin and apply the same electric potential. note 2: specify a product of C40 c to 85 c to use it. table 1.26.4. a-d conversion characteristics (referenced to v cc = av cc = v ref = 2.4v to 3.6v, v ss = av ss = 0v, at ta = C 20 o c to 85 o c / C 40 o c to 85 o c (note2), f(x in )=10mh z unless otherwise specified) table 1.26.6. flash memory version electrical characteristics (referenced to v cc = 2.7v to 3.6v, at ta =0 o c to 60 o c unless otherwise specified) note : n denotes the number of block erases. table 1.26.7. flash memory version program voltage and read operation voltage characteristics (ta =0 o c to 60 o c) flash program voltage flash read operation voltage v cc =2.7v to 3.6v v cc =2.4v to 3.6v v cc =2.7v to 3.4v v cc =2.2v to 2.4v
timing mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 12 timing requirements (referenced to v cc = 3v, v ss = 0v, at ta = C 20 o c to 85 o c / C 40 o c to 85 o c (*) unless otherwise specified) * : specify a product of -40 c to 85 c to use it. table 1.26.8. external clock input table 1.26.9. memory expansion and microprocessor modes 18 80 60 0 0 80 18 100 0 100 40 40 9 10 (note) note: calculated according to the bclk frequency as follows: t ac1(rd ?db) = f(bclk) x 2 ?90 [ns] t ac2(rd ?db) = f(bclk) x 2 ?90 3 x 10 9 [ns] t ac3(rd ?db) = f(bclk) x 2 ?90 3 x 10 9 [ns] max. external clock rise time ns t r min. external clock input cycle time ns t c external clock input high pulse width ns t w(h ) external clock input low pulse width ns t w(l) external clock fall time ns t f parameter symbol unit standard min. data input setup time ns t su(db-rd) t su(rdy-bclk ) parameter symbol unit max. standard rdy input setup time ns data input hold time ns t h(rd-db) t h(bclk -rdy) ns rdy input hold time hold input setup time ns t su(hold-bclk ) hold input hold time ns t h(bclk-hold ) data input access time (no wait) ns t ac1(rd-db) ns ns t ac2(rd-db) t ac3(rd-db) data input access time (with wait) data input access time (when accessing multiplex bus area) hlda output delay time ns t d(bclk-hlda) (note) (note)
timing mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 13 table 1.26.11. timer a input (gating input in timer mode) table 1.26.12. timer a input (external trigger input in one-shot timer mode) table 1.26.13. timer a input (external trigger input in pulse width modulation mode) table 1.26.14. timer a input (up/down input in event counter mode) table 1.26.10. timer a input (counter input in event counter mode) timing requirements (referenced to v cc = 3v, v ss = 0v, at ta = C 20 o c to 85 o c / C 40 o c to 85 o c (*) unless otherwise specified) * : specify a product of C40 c to 85 c to use it. standard max. min. unit parameter symbol ns t w(tal) tai in input low pulse width 60 ns t c(ta) tai in input cycle time 150 ns t w(tah) tai in input high pulse width 60 standard max. min. unit parameter symbol ns t c(ta) tai in input cycle time 600 ns t w(tah) tai in input high pulse width 300 ns t w(tal) tai in input low pulse width 300 standard max. min. unit parameter symbol ns t c(ta) tai in input cycle time 300 ns t w(tah) tai in input high pulse width 150 ns t w(tal) tai in input low pulse width 150 standard max. min. unit parameter symbol ns t w(tah) tai in input high pulse width 150 ns t w(tal) tai in input low pulse width 150 standard max. min. unit parameter symbol ns t c(up) tai out input cycle time 3000 ns t w(uph) tai out input high pulse width 1500 ns t w(upl) tai out input low pulse width 1500 ns t su(up-t in ) tai out input setup time 600 ns t h(t in- up) tai out input hold time 600
timing mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 14 table 1.26.15. timer b input (counter input in event counter mode) table 1.26.16. timer b input (pulse period measurement mode) table 1.26.17. timer b input (pulse width measurement mode) table 1.26.18. a-d trigger input table 1.26.19. serial i/o _______ table 1.26.20. external interrupt inti inputs timing requirements (referenced to v cc = 3v, v ss = 0v, at ta = C 20 o c to 85 o c / C 40 o c to 85 o c (*) unless otherwise specified) * : specify a product of C40 c to 85 c to use it. standard max. min. parameter symbol unit ns t c(tb) tbi in input cycle time (counted on one edge) 150 ns t w(tbh) tbi in input high pulse width (counted on one edge) 60 ns t w(tbl) tbi in input low pulse width (counted on one edge) 60 t w(tbh) ns tbi in input high pulse width (counted on both edges) 160 t w(tbl) ns tbi in input low pulse width (counted on both edges) 160 t c(tb) ns tbi in input cycle time (counted on both edges) 300 standard max. min. parameter symbol unit ns t c(tb) tbi in input cycle time 600 ns t w(tbh) tbi in input high pulse width 300 t w(tbl) ns tbi in input low pulse width 300 standard max. min. parameter symbol unit ns t c(tb) tbi in input cycle time 600 ns t w(tbh) tbi in input high pulse width 300 t w(tbl) ns tbi in input low pulse width 300 standard max. min. parameter symbol unit ns t c(ad) ad trg input cycle time (trigger able minimum) 1500 ns t w(adl) ad trg input low pulse width 200 standard max. min. parameter symbol unit ns t w(inh) inti input high pulse width 380 ns t w(inl) inti input low pulse width 380 standard max. min. parameter symbol unit ns t c(ck) clki input cycle time 300 ns t w(ckh) clki input high pulse width 150 ns t w(ckl) clki input low pulse width 150 t h(c-q) ns txdi hold time 0 t su(d-c) ns rxdi input setup time 50 t h(c-d) ns rxdi input hold time 90 t d(c-q) ns txdi output delay time 160
timing mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 15 switching characteristics (referenced to v cc = 3v, v ss = 0v at ta = C 20 o c to 85 o c / C 40 o c to 85 o c (note 3), cm15 = 1 unless otherwise specified) table 1.26.21. memory expansion and microprocessor modes (with no wait) t d(bclk-ad) address output delay time 60 ns t d(bclk-cs) chip select output delay time 60 ns t h(bclk-ad) address output hold time (bclk standard) 4 ns t h(bclk-cs) chip select output hold time (bclk standard) 4 ns t d(bclk-ale) ale signal output delay time 60 ns t h(bclk-ale) ale signal output hold time e 4 ns t d(bclk-rd) rd signal output delay time 60 ns t h(bclk-rd) rd signal output hold time 0 ns t h(rd-ad) address output hold time (rd standard) 0 ns t d(bclk-wr) wr signal output delay time 60 ns t h(bclk-wr) wr signal output hold time 0 ns t h(wr-ad) address output hold time (wr standard) 0 ns t d(bclk-db) data output delay time (bclk standard) 80 ns t h(bclk-db) data output hold time (bclk standard) 4 ns t d(db-wr) data output delay time (wr standard) (note1) ns t h(wr-db) data output hold time (wr standard)(note2) 0 ns note 1: calculated according to the bclk frequency as follows: td(db ?wr) = f(bclk) x 2 10 9 ?80 [ns] symbol standard measuring condition max. min. parameter unit note 2: this is standard value shows the timing when the output is off, and doesn't show hold time of data bus. hold time of data bus is different by capacitor volume and pull-up (pull-down) resistance value. hold time of data bus is expressed in t = ?r x ln (1 ?v ol / v cc ) by a circuit of the right figure. for example, when v ol = 0.2v cc , c = 30pf, r = 1k w , hold time of output ??level is t = ?30pf x 1k w x ln (1 ?0.2v cc / v cc ) = 6.7ns. dbi r c note 3: specify a product of ?0? to 85? to use it. figure 1.26.1 p6 p7 p8 p10 p9 p0 p1 p2 p3 p4 p5 30pf figure 1.26.1. port p0 to p10 measurement circuit
timing mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 16 switching characteristics (referenced to v cc = 3v, v ss = 0v at ta = C 20 o c to 85 o c / C 40 o c to 85 o c (note 3), cm15 = 1 unless otherwise specified) table 1.26.22. memory expansion and microprocessor modes (when accessing external memory area with wait) note 3: specify a product of ?0? to 85? to use it. t d(bclk-ad) address output delay time 60 ns t d(bclk-cs) chip select output delay time 60 ns t h(bclk-ad) address output hold time (bclk standard) 4 ns t h(bclk-cs) chip select output hold time (bclk standard) 4 ns t d(bclk-ale) ale signal output delay time 60 ns t h(bclk-ale) ale signal output hold time ?4 ns t d(bclk-rd) rd signal output delay time 60 ns t h(bclk-rd) rd signal output hold time 0 ns t h(rd-ad) address output hold time (rd standard) 0 ns t d(bclk-wr) wr signal output delay time 60 ns t h(bclk-wr) wr signal output hold time 0 ns t h(wr-ad) address output hold time (wr standard) 0 ns t d(bclk-db) data output delay time (bclk standard) 80 ns t h(bclk-db) data output hold time (bclk standard) 4 ns t d(db-wr) data output delay time (wr standard) (note1) ns t h(wr-db) data output hold time (wr standard)(note2) 0 ns note 1: calculated according to the bclk frequency as follows: td(db ?wr) = f(bclk) 10 9 ?80 [ns] symbol standard measuring condition max. min. parameter unit note 2: this is standard value shows the timing when the output is off, and doesn't show hold time of data bus. hold time of data bus is different by capacitor volume and pull-up (pull-down) resistance value. hold time of data bus is expressed in t = ?r x ln (1 ?v ol / v cc ) by a circuit of the right figure. for example, when v ol = 0.2v cc , c = 30pf, r = 1k w , hold time of output ??level is t = ?30pf x 1k w x ln (1 ?0.2v cc / v cc ) = 6.7ns. dbi r c figure 1.26.1
timing mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 17 switching characteristics (referenced to v cc = 3v, v ss = 0v at ta = C 20 o c to 85 o c / C 40 o c to 85 o c (note 2), cm15 = 1 unless otherwise specified) table 1.26.23. memory expansion and microprocessor modes (when accessing external memory area with wait, and select multiplexed bus) note 2: specify a product of ?0? to 85? to use it. symbol standard measuring condition max. min. parameter unit t d(bclk-ad) address output delay time 60 ns t h(bclk-ad) address output hold time (bclk standard) 4ns t d(bclk-cs) chip select output delay time 60 ns t h(bclk-cs) chip select output hold time (bclk standard) 4ns ns t h(rd-ad) address output hold time (rd standard) (note 1) t d(bclk-rd) rd signal output delay time 60 ns t h(bclk-rd) rd signal output hold time 0 ns ns t h(wr-ad) address output hold time (wr standard) (note 1) t d(bclk-wr) wr signal output delay time 60 ns t d(bclk-db) data output delay time (bclk standard) 80 ns t h(bclk-db) data output hold time (bclk standard) 4 ns t d(db-wr) data output delay time (wr standard) (note 1) ns t h(bclk-ale) ale signal output hold time (bclk standard) ?4 ns t d(ad-ale) ale signal output delay time (address standard) (note 1) ns t h(ale-ad) ale signal output hold time(address standard) 40 ns t h(bclk-wr) wr signal output hold time 0ns ns t h(rd-cs) chip select output hold time (rd standard) (note 1) t h(wr-cs) chip select output hold time (wr standard) (note 1) ns t d(ad-rd) post-address rd signal output delay time ns 0 t d(ad-wr) post-address wr signal output delay time ns 0 t dz(rd-ad) address output floating start time ns 8 t d(bclk-ale) ale signal output delay time (bclk standard) ns 60 note 1: calculated according to the bclk frequency as follows: th(rd ?ad) = f(bclk) x 2 10 9 [ns] th(wr ?ad) = f(bclk) x 2 10 9 [ns] th(rd ?cs) = f(bclk) x 2 10 9 [ns] th(wr ?cs) = f(bclk) x 2 10 9 [ns] td(db ?wr) = f(bclk) x 2 10 9 ?80 [ns] x 3 td(ad ?ale) = f(bclk) x 2 10 9 ?45 [ns] th(wr ?db) = f(bclk) x 2 10 9 [ns] t h(wr-db) data output hold time (wr standard) ns (note 1) figure 1.26.1
mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer timing 18 v cc = 3v t su(d?) tai in input tai out input during event counter mode tbi in input clki txdi rxdi t c(ta) t w(tah) t w(tal) t c(up) t w(uph) t w(upl) t c(tb) t w(tbh) t w(tbl) t c(ad) t w(adl) t c(ck) t w(ckh) t w(ckl) t w(inl) t w(inh) t d(c?) t h(c?) t h(c?) t h(t in ?p) t su(up? in ) tai in input (when count on falling edge is selected) tai in input (when count on rising edge is selected) tai out input (up/down input) inti input ad trg input figure 1.26.2. v cc =3v timing diagram (1)
mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer timing 19 v cc = 3v measuring conditions : ?v cc =3v ?input timing voltage : determined with v il =0.6v, v ih =2.4v ?output timing voltage : determined with v ol =1.5v, v oh =1.5v memory expansion mode and microprocessor mode bclk hold input hlda output p0, p1, p2, p3, p4, p5 0 to p5 2 (valid with or without wait) note: the above pins are set to high-impedance regardless of the input level of the byte pin and bit (pm06) of processor mode register 0 selects the function of ports p4 0 to p4 3 . t h(bclk?old) t su(hold?clk) (valid only with wait) t d(bclk?lda) t d(bclk?lda) hi? tsu(rdy?clk) th(bclk?dy) bclk rdy input rd (multiplexed bus) (multiplexed bus) wr, wrl, wrh wr, wrl, wrh (separate bus) rd (separate bus) figure 1.26.3. v cc =3v timing diagram (2)
mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer timing 20 read timing write timing bclk csi ale rd 60ns.max 4ns.min 4ns.min hi? db 0ns.min adi bhe tcyc 80ns.min bclk csi ale ?ns.min 60ns.max 0ns.min 4ns.min hi? db 4ns.min adi bhe tcyc t h(bclk?le) t h(bclk?b) t d(bclk?le) t d(bclk?r) 0ns.min t h(wr?d) memory expansion mode and microprocessor mode (with no wait) wr,wrl, wrh t d(bclk?s) 60ns.max t h(bclk?s) t h(rd?s) t d(bclk?d) 60ns.max t h(bclk?d) 60ns.max t d(bclk?le) ?ns.min t h(rd?d) 0ns.min t d(bclk?d) t h(bclk?d) t ac1(rd?b) t h(rd?b) 0ns.min t su(db?d) t d(bclk?s) t h(bclk?s) 4ns.min 60ns.max 0ns.min t h(wr?s) t d(bclk?d) 60ns.max t h(bclk?d) 60ns.max t h(bclk?le) t h(bclk?r) t d(bclk?b) t h(wr?b) t d(db?r) ( tc y c/2?0 ) ns.min 0ns.min 80ns.max 0ns.min v cc = 3v figure 1.26.4. v cc =3v timing diagram (3)
mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer timing 21 read timing write timing bclk csi ale rd 4ns.min 4ns.min hi? db 80ns.min 0ns.min adi bhe t d(bclk?r) 60ns.max t h(bclk?r) 0ns.min bclk csi t d(bclk?s) 60ns.max t d(bclk?d) ale t h(bclk?le) t h(bclk?s) 4ns.min tcyc 0ns.min t h(wr?s) 0ns.min t h(wr?d) adi bhe t d(bclk?b) 4ns.min t h(bclk?b) t d(db?r) (tcyc?0)ns.min 0ns.min t h(wr?b) dbi t h(rd?d) 0ns.min t d(bclk?le) 60ns.max t su(db?d) memory expansion mode and microprocessor mode (when accessing external memory area with wait) measuring conditions : ?v cc =3v ?input timing voltage : determined with v il =0.48v, v ih =1.5v ?output timing voltage : determined with v ol =1.5v, v oh =1.5v wr,wrl, wrh t d(bclk?s) 60ns.max t h(rd?s) tcyc t d(bclk?d) 60ns.max t h(bclk?d) ?ns.min t h(bclk?le) 60ns.max t d(bclk?d) t h(bclk?d) 0ns.min t ac2(rd?b) t h(rd?b) 0ns.min t h(bclk?d) 60ns.max t d(bclk?le) 60ns.max ?ns.min 80ns.max t h(bclk?s) 4ns.min v cc = 3v figure 1.26.5. v cc =3v timing diagram (4)
mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer timing 22 memory expansion mode and microprocessor mode (when accessing external memory area with wait, and select multiplexed bus) measuring conditions : ?v cc =3v ?input timing voltage : determined with v il =0.48v,v ih =1.5v ?output timing voltage : determined with v ol =1.5v,v oh =1.5v read timing write timing 0ns.min 60ns.max ?ns.min t h(bclk?s) 4ns.min tcyc 80ns.max t h(bclk?b) 4ns.min t d(db?r) (tcyc*3/2?0)ns.min address data output (tcyc/2)ns.min address (tcyc/2?0)ns.min t d(bclk?le) t d(bclk?r) 4ns.min t d(bclk?s) 60ns.max 4ns.min t h(bclk?s) 4ns.min tcyc t h(rd?b) 0ns.min address (tcyc/2)ns.min data input address tac3(rd?b) t dz(rd?d) 8ns.max t d(ad?d) 0ns.min t d(ad?r) bclk csi ale adi bhe adi /dbi bclk csi ale rd adi bhe adi /dbi wr,wrl, wrh t h(rd?s) t d(ad?le) (tcyc/2?5)ns.min t su(db?d) 80ns.min t h(ale?d) 40ns.min t d(bclk?d) 60ns.max 60ns.max t d(bclk?le) t h(bclk?le) ?ns.min (tcyc/2)ns.min t h(rd?d) t h(bclk?d) t h(bclk?d) 0ns.min t d(bclk?d) 60ns.max t d(bclk?s) 60ns.max t h(wr?s) (tcyc/2)ns.min t d(bclk?b) t d(ad?le) t d(bclk?d) 60ns.max t h(wr?b) (tcyc/2)ns.min t h(bclk?d) t h(wr?d) t h(bclk?r) t h(bclk?le) 0ns.min 60ns.max v cc = 3v figure 1.26.6. v cc =3v timing diagram (5)
usage precaution mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 23 timer a (timer mode) usage precaution timer a (event counter mode) (1) reading the timer ai register while a count is in progress allows reading, with arbitrary timing, the value of the counter. reading the timer ai register with the reload timing gets ffff 16 by underflow or 0000 16 by overflow. reading the timer ai register after setting a value in the timer ai register with a count halted but before the counter starts counting gets a proper value. (2) when stop counting in free run type, set timer again. (1) reading the timer ai register while a count is in progress allows reading, with arbitrary timing, the value of the counter. reading the timer ai register with the reload timing gets ffff 16 . reading the timer ai register after setting a value in the timer ai register with a count halted but before the counter starts counting gets a proper value. (1) setting the count start flag to 0 while a count is in progress causes as follows: ? the counter stops counting and a content of reload register is reloaded. ? the tai out pin outputs l level. ? the interrupt request generated and the timer ai interrupt request bit goes to 1. (2) the timer ai interrupt request bit goes to 1 if the timer's operation mode is set using any of the following procedures: ? selecting one-shot timer mode after reset. ? changing operation mode from timer mode to one-shot timer mode. ? changing operation mode from event counter mode to one-shot timer mode. therefore, to use timer ai interrupt (interrupt request bit), set timer ai interrupt request bit to 0 after the above listed changes have been made. timer a (one-shot timer mode) (1) the timer ai interrupt request bit becomes 1 if setting operation mode of the timer in compliance with any of the following procedures: ? selecting pwm mode after reset. ? changing operation mode from timer mode to pwm mode. ? changing operation mode from event counter mode to pwm mode. therefore, to use timer ai interrupt (interrupt request bit), set timer ai interrupt request bit to 0 after the above listed changes have been made. (2) setting the count start flag to 0 while pwm pulses are being output causes the counter to stop counting. if the tai out pin is outputting an h level in this instance, the output level goes to l, and the timer ai interrupt request bit goes to 1. if the tai out pin is outputting an l level in this instance, the level does not change, and the timer ai interrupt request bit does not becomes 1. timer a (pulse width modulation mode) timer b (timer mode, event counter mode) (1) reading the timer bi register while a count is in progress allows reading , with arbitrary timing, the value of the counter. reading the timer bi register with the reload timing gets ffff 16 . reading the timer bi register after setting a value in the timer bi register with a count halted but before the counter starts counting gets a proper value.
usage precaution mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 24 stop mode and wait mode a-d converter (1) if changing the measurement mode select bit is set after a count is started, the timer bi interrupt request bit goes to 1. (2) when the first effective edge is input after a count is started, an indeterminate value is transferred to the reload register. at this time, timer bi interrupt request is not generated. timer b (pulse period/pulse width measurement mode) interrupts (1) write to each bit (except bit 6) of a-d control register 0, to each bit of a-d control register 1, and to bit 0 of a-d control register 2 when a-d conversion is stopped (before a trigger occurs). in particular, when the vref connection bit is changed from 0 to 1, start a-d conversion after an elapse of 1 m s or longer. (2) when changing a-d operation mode, select analog input pin again. (3) using one-shot mode or single sweep mode read the correspondence a-d register after confirming a-d conversion is finished. (it is known by a- d conversion interrupt request bit.) (4) using repeat mode, repeat sweep mode 0 or repeat sweep mode 1 use the undivided main clock as the internal cpu clock. (1) reading address 00000 16 ? when maskable interrupt is occurred, cpu read the interrupt information (the interrupt number and interrupt request level) in the interrupt sequence. the interrupt request bit of the certain interrupt written in address 00000 16 will then be set to 0. reading address 00000 16 by software sets enabled highest priority interrupt source request bit to 0. though the interrupt is generated, the interrupt routine may not be executed. do not read address 00000 16 by software. (2) setting the stack pointer ? the value of the stack pointer immediately after reset is initialized to 0000 16 . accepting an interrupt before setting a value in the stack pointer may become a factor of runaway. be sure to set a value in the stack pointer before accepting an interrupt. _______ when using the nmi interrupt, initialize the stack point at the beginning of a program. concerning _______ the first instruction immediately after reset, generating any interrupts including the nmi interrupt is prohibited. _______ (3) the nmi interrupt _______ _______ ? the nmi interrupt can not be disabled. be sure to connect nmi pin to vcc via a pull-up resistor if unused. _______ ? do not get either into stop mode with the nmi pin set to l. ____________ (1) when returning from stop mode by hardware reset, reset pin must be set to l level until main clock oscillation is stabilized. (2) when switching to either wait mode or stop mode, instructions occupying four bytes either from the wait instruction or from the instruction that sets the every-clock stop bit to 1 within the instruction queue are prefetched and then the program stops. so put at least four nops in succession either to the wait instruction or to the instruction that sets the every-clock stop bit to 1.
usage precaution mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 25 (4) external interrupt _______ _______ ? when the polarity of the int0 to int5 pins is changed, the interrupt request bit is sometimes set to "1". after changing the polarity, set the interrupt request bit to "0". example 1: int_switch1: fclr i ; disable interrupts. and.b #00h, 0055h ; clear ta0ic int. priority level and int. request bit. nop ; four nop instructions are required when using hold function. nop fset i ; enable interrupts. example 2: int_switch2: fclr i ; disable interrupts. and.b #00h, 0055h ; clear ta0ic int. priority level and int. request bit. mov.w mem, r0 ; dummy read. fset i ; enable interrupts. example 3: int_switch3: pushc flg ; push flag register onto stack fclr i ; disable interrupts. and.b #00h, 0055h ; clear ta0ic int. priority level and int. request bit. popc flg ; enable interrupts. the reason why two nop instructions (four when using the hold function) or dummy read are inserted before fset i in examples 1 and 2 is to prevent the interrupt enable flag i from being set before the interrupt control register is rewritten due to effects of the instruction queue. (5) rewrite the interrupt control register ? to rewrite the interrupt control register, do so at a point that does not generate the interrupt request for that register. if there is possibility of the interrupt request occur, rewrite the interrupt control register after the interrupt is disabled. the program examples are described as follow: ? when a instruction to rewrite the interrupt control register is executed but the interrupt is disabled, the interrupt request bit is not set sometimes even if the interrupt request for that register has been generated. this will depend on the instruction. if this creates problems, use the below in- structions to change the register. instructions : and, or, bclr, bset noise (1) insert bypass capacitor between v cc and v ss pin for noise and latch up countermeasure. ? insert bypass capacitor (about 0.1 m f) and connect short and wide line between v cc and v ss lines.
usage precaution mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 26 notes on the microprocessor mode and transition after shifting from the micropro- cessor mode to the memory expansion mode ? microprocessor mode in microprocessor mode, the sfr, internal ram, and external memory space can be accessed. for that reason, the internal rom area cannot be accessed. ? memory expansion mode in memory expansion mode, external memory can be accessed in addition to the internal memory space (sfr, internal ram, and internal rom). however, after the reset has been released and the operation of shifting from the microprocessor mode has started (h applied to the cnv ss pin), the internal rom area cannot be accessed even if the cpu shifts to the memory expansion mode.
mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer mask rom number mitsubishi electric-chip 16-bit microcomputer m30620mcm-xxxfp/gp mask rom confirmation form gzz-sh13-95b<02a0> 27 date : tel ( ) receipt section head signature supervisor signature customer company name date issued date : note : please complete all items marked h . h issuance signature submitted by supervisor h 1. check sheet mitsubishi processes the mask files generated by the mask file generation utilities out of those held on the floppy disks you give in to us, and forms them into masks. hence, we assume liability provided that there is any discrepancy between the contents of these mask files and the rom data to be burned into products we produce. check thoroughly the contents of the mask files you give in. prepare 3.5 inches 2hd (ibm format) floppy disks. and store only one mask file in a floppy disk. h 2. mark specification the mark specification differs according to the type of package. after entering the mark specification on the separate mark specification sheet (for each package), attach that sheet to this masking check sheet for submission to mitsubishi. for the m30620mcm-xxxfp, submit the 100p6s mark specification sheet. for the m30620mcm-xxxgp, submit the 100p6q mark specification sheet. h 3. usage conditions for our reference when of testing our products, please reply to the following questions about the usage of the products you ordered. (1) which kind of x in -x out oscillation circuit is used? ceramic resonator quartz-crystal oscillator external clock input other ( ) what frequency do not use? f(x in ) = mh z microcomputer type no. : m30620mcm-xxxfp m30620mcm-xxxgp file code : (hex) mask file name : .msk (alpha-numeric 8-digit)
mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer gzz-sh13-95b<02a0> mitsubishi electric-chip 16-bit microcomputer m30620mcm-xxxfp/gp mask rom confirmation form mask rom number 28 (2) which kind of x cin -x cout oscillation circuit is used? ceramic resonator quartz-crystal oscillator external clock input other ( ) what frequency do not use? f(x cin ) = kh z (3) which operation mode do you use? single-chip mode memory expansion mode microprocessor mode (4) which operating supply voltage do you use? (circle the operating voltage range of use) (5) which operating ambient temperature do you use? (circle the operating temperature range of use) -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 ( c) (6) do you use i 2 c (inter ic) bus function? not use use (7) do you use ie (inter equipment) bus function? not use use thank you cooperation. h 4. special item (indicate none if there is not specified item) (v) 2.2 2.4 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8
mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer mask rom number mitsubishi electric-chip 16-bit microcomputer m30624mgm-xxxfp/gp mask rom confirmation form gzz-sh13-48b<98a1> 29 date : tel ( ) receipt section head signature supervisor signature customer company name date issued date : note : please complete all items marked h . h issuance signature submitted by supervisor h 1. check sheet mitsubishi processes the mask files generated by the mask file generation utilities out of those held on the floppy disks you give in to us, and forms them into masks. hence, we assume liability provided that there is any discrepancy between the contents of these mask files and the rom data to be burned into products we produce. check thoroughly the contents of the mask files you give in. prepare 3.5 inches 2hd (ibm format) floppy disks. and store only one mask file in a floppy disk. h 2. mark specification the mark specification differs according to the type of package. after entering the mark specification on the separate mark specification sheet (for each package), attach that sheet to this masking check sheet for submission to mitsubishi. for the m30624mgm-xxxfp, submit the 100p6s mark specification sheet. for the m30624mgm- xxxgp, submit the 100p6q mark specification sheet. h 3. usage conditions for our reference when of testing our products, please reply to the following questions about the usage of the products you ordered. (1) which kind of x in -x out oscillation circuit is used? ceramic resonator quartz-crystal oscillator external clock input other ( ) what frequency do not use? f(x in ) = mh z microcomputer type no. : m30624mgm-xxxfp m30624mgm-xxxgp file code : (hex) mask file name : .msk (alpha-numeric 8-digit)
mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer gzz-sh13-48b<98a1> mitsubishi electric-chip 16-bit microcomputer m30624mgm-xxxfp/gp mask rom confirmation form mask rom number 30 (2) which kind of x cin -x cout oscillation circuit is used? ceramic resonator quartz-crystal oscillator external clock input other ( ) what frequency do not use? f(x cin ) = kh z (3) which operation mode do you use? single-chip mode memory expansion mode microprocessor mode (4) which operating supply voltage do you use? (circle the operating voltage range of use) (5) which operating ambient temperature do you use? (circle the operating temperature range of use) -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 ( c) (6) do you use i 2 c (inter ic) bus function? not use use (7) do you use ie (inter equipment) bus function? not use use thank you cooperation. h 4. special item (indicate none if there is not specified item) (v) 2.2 2.4 2.6 2.7 2.8 2.9 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8
mitsubishi microcomputers m16c / 62m group (low voltage version) single-chip 16-bit cmos microcomputer 31 differences between m16c/62m (low voltage version) and m30624fglfp/gp item m16c/62m (low voltage version) m30624fglfp/gp serial i/o memory version flash memory version only iic bus mode memory area memory expansion 1.2 mbytes mode 4 mbytes mode 1 mbyte fixed no cts/rts separate function cts/rts separate function analog or digital delay is selected as sda delay only analog delay is selected as sda delay mask rom version flash memory version standard serial i/o mode (flash memory version) clock synchronized only clock synchronized clock asynchronized
keep safety first in your circuit designs! notes regarding these materials l mitsubishi electric corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. trouble with semiconductors may lead to personal injury, fire or property damage. remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap. l these materials are intended as a reference to assist our customers in the selection of the mitsubishi semiconductor product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to mitsubishi electric corporation or a third party. l mitsubishi electric corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. l all information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by mitsubishi electric corporation without notice due to product improvements or other reasons. it is therefore recommended that customers contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor for the latest product information before purchasing a product listed herein. the information described here may contain technical inaccuracies or typographical errors. mitsubishi electric corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. please also pay attention to information published by mitsubishi electric corporation by various means, including the mitsubishi semiconductor home page (http:// www.mitsubishichips.com). l when using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. mitsubishi electric corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. l mitsubishi electric corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. please contact mitsubishi electric corporation or an authorized mitsubishi semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. l the prior written approval of mitsubishi electric corporation is necessary to reprint or reproduce in whole or in part these materials. l if these products or technologies are subject to the japanese export control restrictions, they must be exported under a license from the japanese government and cannot be imported into a country other than the approved destination. any diversion or reexport contrary to the export control laws and regulations of japan and/or the country of destination is prohibited. l please contact mitsubishi electric corporation or an authorized mitsubishi semicon ductor product distributor for further details on these materials or the products con tained therein.
mitsubishi semiconductors m16c/62m group (low voltage version) specifications rev.b jun. first edition 2000 edition by committee of editing of mitsubishi semiconductor published by mitsubishi electric corp., kitaitami works this book, or parts thereof, may not be reproduced in any form without permission of mitsubishi electric corporation. ?2000 mitsubishi electric corporation

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