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july 2010 doc id 15734 rev 2 1/14 14 STB80N20M5 stp80n20m5 n-channel 200 v, 0.019 ? , 61 a, to-220, d 2 pa k mdmesh? v power mosfet features amongst the best r ds(on) * area high dv/dt capability excellent switching performance easy to drive 100% avalanche tested application switching applications description the devices are n-channel mdmesh? v power mosfet based on an innovative proprietary vertical process technology, which is combined with stmicroelectronics? well-known powermesh? horizontal layout structure. the resulting product has extremely low on- resistance, which is unmatched among silicon- based power mosfets, making it especially suitable for applications which require superior power density and outstanding efficiency. figure 1. internal schematic diagram type v dss @ t jmax r ds(on) max i d STB80N20M5 200 v < 0.023 ? 61 a stp80n20m5 61 a 1 2 3 to-220 d 2 pak 1 3 ! - v $ ' 3 table 1. device summary order codes marking package packaging STB80N20M5 80n20m5 d 2 pak tape and reel stp80n20m5 80n20m5 to-220 tube www.st.com
contents STB80N20M5, stp80n20m5 2/14 doc id 15734 rev 2 contents 1 electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 5 packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 STB80N20M5, stp80n20m5 electrical ratings doc id 15734 rev 2 3/14 1 electrical ratings table 2. absolute maximum ratings symbol parameter value unit v gs gate-source voltage 25 v i d drain current (continuous) at t c = 25 c 61 a i d drain current (continuous) at t c = 100 c 38 a i dm (1) 1. pulse width limited by safe operating area drain current (pulsed) 244 a p tot total dissipation at t c = 25 c 190 w i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 20 a e as single pulse avalanche energy (starting t j = 25 c, i d = i ar , v dd = 50 v) 500 mj dv/dt (2) 2. i sd 61 a, di/dt 400 a/s; v peak < v (br)dss peak diode recovery voltage slope 15 v/ns t stg storage temperature - 55 to 150 c t j max. operating junction temperature 150 c table 3. thermal data symbol parameter value unit to-220 d 2 pak r thj-case thermal resistance junction-case max 0.66 c/w r thj-amb thermal resistance junction-ambient max 62.50 c/w r thj-pcb thermal resistance junction-pcb max 30 c/w t l maximum lead temperature for soldering purpose 300 c electrical characteristics STB80N20M5, stp80n20m5 4/14 doc id 15734 rev 2 2 electrical characteristics (t c = 25 c unless otherwise specified) table 4. on /off states symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 1 ma, v gs = 0 200 v i dss zero gate voltage drain current (v gs = 0) v ds = max rating v ds = max rating, t c =125 c 1 100 a a i gss gate-body leakage current (v ds = 0) v gs = 25 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 3 4 5 v r ds(on) static drain-source on resistance v gs = 10 v, i d = 30.5 a 0.019 0.023 ? table 5. dynamic symbol parameter test conditions min. typ. max. unit c iss c oss c rss input capacitance output capacitance reverse transfer capacitance v ds = 50 v, f = 1 mhz, v gs = 0 - 4329 275 39 - pf pf pf c o(tr) (1) 1. c o(tr) is a constant capacitance value that gives the same charging time as c oss while v ds is rising from 0 to 80% v dss . equivalent capacitance time related v ds = 0 to 160 v, v gs = 0 -709-pf c o(er) (2) 2. c o(er) is a constant capacitance value that gives the same stored energy as c oss while v ds is rising from 0 to 80% v dss . equivalent capacitance energy related -280-pf r g intrinsic gate resistance f = 1 mhz open drain - 1.9 - ? q g q gs q gd total gate charge gate-source charge gate-drain charge v dd = 160 v, i d = 30.5 a, v gs = 10 v (see figure 15 ) - 104 23 53 - nc nc nc STB80N20M5, stp80n20m5 electrical characteristics doc id 15734 rev 2 5/14 table 6. switching times symbol parameter test conditions min. typ. max unit t d (v) t r (v) t f (i) t c (off) voltage delay time voltage rise time current fall time crossing time v dd = 160 v, i d = 61 a, r g = 4.7 ?, v gs = 10 v (see figure 16 ) (see figure 19 ) - 66 31 131 176 - ns ns ns ns table 7. source drain diode symbol parameter test conditions min. typ. max. unit i sd i sdm (1) 1. pulse width limited by safe operating area source-drain current source-drain current (pulsed) - 61 244 a a v sd (2) 2. pulsed: pulse duration = 300 s, duty cycle 1.5% forward on voltage i sd = 61 a, v gs = 0 - 1.6 v t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 61 a, di/dt = 100 a/s v dd = 60 v (see figure 19 ) - 176 1.4 16 ns c a t rr q rr i rrm reverse recovery time reverse recovery charge reverse recovery current i sd = 61 a, di/dt = 100 a/s v dd = 60 v, t j = 150 c (see figure 19 ) - 218 2 19 ns c a electrical characteristics STB80N20M5, stp80n20m5 6/14 doc id 15734 rev 2 2.1 electrical characteristi cs (curves) figure 2. safe operating area figure 3. thermal impedance figure 4. output characteristics figure 5. transfer characteristics figure 6. gate charge vs gate-source voltage figure 7. static drain-source on resistance ) $ 6 $ 3 6 ! / p e r a t i o n i n t h i s a r e a i s , i m i t e d b y m a x 2 $ 3 o n ? s ? s m s m s 4 j ? # 4 c ? # 3 i n g l e p u l s e ! - v ) $ 6 $ 3 6 ! 6 6 6 6 ' 3 6 ! - v ) $ 6 ' 3 6 ! ! - v 6 ' 3 1 g n # 6 6 $ $ 6 ) $ ! 6 $ 3 6 ' 3 ! - v 2 $ 3 o n ) $ ! / h m 6 ' 3 6 ! - v STB80N20M5, stp80n20m5 electrical characteristics doc id 15734 rev 2 7/14 figure 8. capacitance variations figure 9. output capacitance stored energy figure 10. normalized gate threshold voltage vs temperature figure 11. normalized on resistance vs temperature figure 12. source-drain diode forward characteristics figure 13. normalized b vdss vs temperature # 6 $ 3 6 p & |