1 of 20 rev: 011904 general description the ds21354 design kit is an easy-to-use evaluation board for the ds21354 e1 single-chip transceiver (sct). the DS21354DK is intended to be used as a daughter card with either the dk2000 or the dk101 motherboards. the DS21354DK comes complete with a ds21354 sct, transformers, termination resistors, configuration switches, line-protection circuitry, network connectors, and motherboard connectors. the dk101/dk2000 motherboard and dallas? chipview software give point-and-click access to configuration and status registers from a windows -based pc. on-board leds indicate receive loss-of-signal and interrupt status, as well as multiple clock and signal routing configurations. each DS21354DK is shipped with a free dk101 motherboard. for complex applications, the dk2000 high-performance demo kit motherboard can be purchased separately. windows is a registered trademark of microsoft corp. design kit contents DS21354DK design kit daughter card dk101 low-cost motherboard cd rom chipview software DS21354DK data sheet dk101 data sheet ds21354 data sheet ds21354 errata sheet features demonstrates key functions of the ds21354 e1 sct transceiver includes ds21354 sct, transformers, bantum, bnc and rj48 network connectors, and termination passives bnc connections for 75 e1 bantam and rj48 connectors for 120 e1 multitap transformer to facilitate true impedance matching for 75 and 120 /100 paths compatible with dk101 and dk2000 demo kit motherboards dk101/dk2000 and chipview software provide point-and-click access to the ds21354 register set software-controlled (register mapped) configuration switches to facilitate clock and signal routing all equipment-side framer pins are easily accessible for external data source/sink leds for loss-of-signal and interrupt status as well as indications for multiple clock and signal routing configurations easy-to-read silk screen labels identify the signals associated with all connectors, jumper, and leds network interface protection for overvoltage and overcurrent events area available for further customization ordering information part description DS21354DK ds21354 design kit daughter card (with include dk101 motherboard) ds21354d k t1 single-chip transceive r desi g n kit dau g hter card www.maxim-ic.com
DS21354DK t1 single-chip transceiver design kit daughter card 2 of 20 table of contents componen t list................................................................................................................. ....3 basic operation................................................................................................................ ....4 h ardware c onfiguration .................................................................................................................. 4 q uick s etup (d emo m ode ) .................................................................................................................. 4 q uick s etup (r egister v iew ) ............................................................................................................. 4 register map................................................................................................................... .......5 cpld r egister m ap ........................................................................................................................... 5 ds21354 information............................................................................................................ 7 DS21354DK info rmation.......................................................................................................7 technical support .............................................................................................................. 7 schematics ..................................................................................................................... ........7 list of tables table 1. daughter card address map .........................................................................................5 table 2. cpld register map ..................................................................................................... ..5
DS21354DK t1 single-chip transceiver design kit daughter card 3 of 20 component list designation qty descri ption supplier part c1?c5, c8?c12, c15?c19, c21, c22, c29?c34 23 0.1 f 10%, 16v ceramic capacitors (0603) digi-key 311-1088-1-nd c7, c36 2 1 f 10%, 16v ceramic capacitors (1206) digi-key pcc1882ct-nd c13, c14 2 0.1 f 10%, 16v ceramic capacitors (0805) digi-key 311-1142-1-nd c23 1 0.1 f 10%, 25v ceramic capacitor (1206) digi-key pcc1883ct-nd c24?c27 4 0.22 f, 50v ceramic capacitors digi-key unk c35 1 10 f 20%, 16v tantalum capacitor (b case) digi-key pcs3106ct-nd ds1, ds4?ds18 16 led, green, smd digi-key p501ct-nd ds2, ds3 2 led, red, smd digi-key p500ct-nd f1?f6 6 250v, 1.25a fuse, smt teccor electronics f1250t j1, j2 2 male 0.1, smd, 50-pin, dual-row vertical samtec tsm-125-01-t-dv j3, j4 2 bantam connectors swk rtt34b02 j5, j6 2 connector bnc ra 5-pin kruvand ucbjr220 j7?j9 3 socket, smd, 50-pin, dual-row vertical samtec tfm-125-02-s-d- lc jt10 1 connector, 10-pin, dual-row vertical digi-key s2012-05-nd l1 1 choke, dual 4-line 24 h, 8-pin so pulse engineering pe-65857 r1, r14, r21 3 51.1 1%, 1/8w resistors (1206) digi-key p51.1fct-nd r2, r3, r58, r59 4 0 5%, 1/8w resistors (1206) digi-key p0.0etr-nd r4, r5, r60 3 51.1 1%, 1/10w resistors (0805) digi-key p51.1cct-nd r6, r9, r10, r13, r15?r19, r22, r23, r25?r29, r32, r37, r38, r44, r47?r49, r61 24 10k 1%, 1/10w resistors (0805) digi-key p10.0kcct-nd r7, r8, r11, r12, r30, r31, r35, r36, r39?r43, r45, r50?r53 18 330 0.1%, 1/10w mf resistors (0805) digi-key p330zct-nd r24 1 1.0k 1%, 1/10w resistor (0805) digi-key p1.00kcct-nd r33, r34 2 not populate ? not populated r46 1 4.7k 1%, 1/8w resistor (0805) digi-key 9c08052a4701fk hft r54, r55 2 61.9 1%, 1/8w resistors (1206) digi-key p61.9fct-nd r56, r57 2 49.9 1%, 1/8w resistors (1206) digi-key p49.9fct-nd rj1 1 rj48 connector molex 43223 sw1 1 switch dpdt slide 6-pin th avnet ssa22 t1 1 xfmr 16-pin smt pulse engineering tx1099 u1?u4, u6 5 bbus switch 10-bit cmos, 150-mil, 24-pin so idt idtqs3r861q u5 1 144-pin macrocell cpld avnet xc95144xl- 10tq100c u7?u10 4 quad bus switch, 150-mil, 16-pin so idt idtqs3125q u11 1 t1/e1/j1 xcvr 100-pin qfp, 0c to +70c dallas semiconductor ds2156l z1, z6?z8 4 160v, 500a sidactor teccor electronics p1800scmc z2, z3 2 58v, 500a sidactor teccor electronics p0640scmc z4, z5 2 6v, 50a sidactor teccor electronics p0080samc z9, z10 2 25v, 500a sidactor teccor electronics p0300scmc
DS21354DK t1 single-chip transceiver design kit daughter card 4 of 20 basic operation this design kit relies upon several supporting files, which can be downloaded from our website at www.maxim- ic.com/DS21354DK . see the DS21354DK quickview data sheet for these files. hardware configuration using the dk101 processor board: connect the daughter card to the dk101 processor board. supply 3.3v to the banana-plug receptacles marked gnd and vcc_3.3v. (the external 5v connector and the tim 5v supply headers are unused.) all processor board dip switch settings should be in the on position with exception for the flash programming switch, which should be off. from the programs menu, launch the host application named chipview.exe. run the chipview application. if the default installation options were used, click the start button on the windows toolbar and select programs chipview chipview. using the dk2000 processor board: connect the daughter card to the dk2000 processor board. connect j1 to the power supply that is delivered with the kit. alternately, a pc power supply can be connected to connector j2. from the programs menu, launch the host application named chipview.exe. run the chipview application. if the default installation options were used, click the start button on the windows toolbar and select programs chipview chipview. general: upon power-up the rlos led is lit, as well as the mclk-2.048mhz and tclk-2.048mhz leds. due to the dual winding transformer, only the 120 line build-out configuration setting is needed to cover 75 e1 and 120 e1. quick setup (demo mode) the pc loads the program, offering a choice among demo mode, register view, and terminal mode. select demo mode. the program requests a configuration file, then select ds21354_e1_dsncom_drvr.cfg. the demo mode screen appears. upon external loopback, the los and oof indicators extinguish. quick setup (register view) the pc loads the program, offering a choice among demo mode, register view, and terminal mode. select register view. the program requests a definition file, then select ds21354.def. the register view screen appears, showing the register names, acronyms, and values. note: during the definition file load process, all registers are initialized according to the init value filed in the definition file (because the setup field in the .def file is turned on). predefined register settings for several functions are available as initialization files. ini files are loaded by selecting the menu f ile r eg ini file l oad ini file. load the ini file ds21354e1_fas_crc4_cas.ini. after loading the ini file the following may be observed: the rlos led extinguishes upon external loopback. the device is now configured for e1 fas with crc4 and cas. miscellaneous: clock frequencies and certain pin bias levels are provided by a register-mapped cpld, which is on the ds21354 daughter card. the definition file for this cpld is named ds215x_35x_cpld_v2.def. see the cpld register map section for definitions. all files referenced above are available for download in the section marked ?file locations.?
DS21354DK t1 single-chip transceiver design kit daughter card 5 of 20 register map the dk101 daughter card address space begins at 0x81000000. the dk2000 daughter card address space begins at: 0x30000000 for slot 0 0x40000000 for slot 1 0x50000000 for slot 2 0x60000000 for slot 3 all offsets given in table 1 are relative to the beginning of the daughter card address space. table 1. daughter card address map offset device description 0x0000 to 0x0015 cpld board identification and clock/signal routing 0x1000 to 0x10ff single-chip transceiver board is populated with one of the following: ds2155, ds2156, ds21352, or ds21354. please see the data sheet(s) for details. registers in the cpld can be easily modified using chipview.exe, a host-based user-interface software, along with the definition file named ds215x_35x_cpld_v2.def . definition files for the sct are named ds2155.def , ds21352.def , or ds21354.def , depending on the board population option. cpld register map table 2. cpld register map offset name type description 0x0000 bid read-only board id 0x0002 xbidh read-only high-nibble extended board id 0x0003 xbidm read-only middle-nibble extended board id 0x0004 xbidl read-only low-nibble extended board id 0x0005 brev read-only board fab revision 0x0006 arev read-only board assembly revision 0x0007 prev read-only pld revision 0x0011 switch1 read-write pin to 1.544mhz 0x0012 switch2 read-write pin to 2.048mhz 0x0013 switch3 read-write pin-to-pin connect 0x0014 switch4 read-write pin-to-pin connect 0x0015 levels read-write set level on pin 1 = 3.3v id registers offset name type value description 0x0000 bid read-only 0xd board id 0x0002 xbidh read-only 0x0 high-nibble extended board id 0x0003 xbidm read-only 0x0 middle-nibble extended board id 0x0004 xbidl read-only 0x5 low-nibble extended board id 0x0005 brev read-only displays current fab revision board fab revision 0x0006 arev read-only displays current assembly revision board assembly revision 0x0007 prev read-only displays current pld firmware revision pld revision
DS21354DK t1 single-chip transceiver design kit daughter card 6 of 20 control registers the control registers are used primarily to control several banks of fet switches that route clocks and backplane signals. please note that certain register settings cause line contention, e.g., setting switch1.4 and switch2.4 both to 0 would drive mclk with both 1.544mhz and 2.048mhz. switch1: pin to 1.544mhz (offset = 0x0011) initial value = 0xf (msb) (lsb) ? ? ? ? mclk tclk rsysclk tsysclk name position function mclk switch1.3 0 = connect mclk to the 1.544mhz clock 1 = open switch 1.4 tclk switch1.2 0 = connect tclk to the 1.544mhz clock 1 = open switch 1.3 rsysclk switch1.1 0 = connect rsysclk to the 1.544mhz clock 1 = open switch 1.2 tsysclk switch1.0 0 = connect tsysclk to the 1.544mhz clock 1 = open switch 1.1 switch2: pin to 2.048mhz (offset = 0x0012) initial value = 0x3 (msb) (lsb) ? ? ? ? mclk tclk rsysclk tsysclk name position function mclk switch2.3 0 = connect mclk to the 2.048mhz clock 1 = open switch 2.4 tclk switch2.2 0 = connect tclk to the 2.048mhz clock 1 = open switch 2.3 rsysclk switch2.1 0 = connect rsysclk to the 2.048mhz clock 1 = open switch 2.2 tsysclk switch2.0 0 = connect tsysclk to the 2.048mhz clock 1 = open switch 2.1 switch3: pin-to-pin connect (offset = 0x0013) initial value = 0xf (msb) (lsb) ? ? ? ? tss_rs tcl_rc rsy_rc tsy_rc name position function tss_rs switch3.3 0 = connect tssync to rsync 1 = open switch 3.4 tcl_rc switch3.2 0 = connect tclk to rclk 1 = open switch 3.3 rsy_rc switch3.1 0 = connect rsysclk to rclk 1 = open switch 3.2 tsy_rc switch3.0 0 = connect tsysclk to rclk 1 = open switch 3.1
DS21354DK t1 single-chip transceiver design kit daughter card maxim/dallas semiconductor cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a ma xim/dallas semiconductor product. no circuit patent licenses are implied. maxim/dallas semiconductor reserves the right to change the circuitry and specification s without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2004 maxim integrated products printed usa 7 of 20 switch4: pin-to-pin connect (offset = 0x0014) initial value = 0x3 (msb) (lsb) ? ? ? ? urclk_2048 utclk_2048 rser_tser rsync_tsync name position function urclk_2048 switch4.3 0 = connect ur_clk (tssync) to 2.048mhz 1 = open switch 4.4 utclk_2048 switch4.2 0 = connect ut_clk (tchclk) to 2.048mhz 1 = open switch 4.3 rser_tser switch4.1 0 = connect rer to tser 1 = open switch 4.2 rsync_tsync switch4.0 0 = connect rsync to tsync 1 = open switch 4.1 levels: set level on pin (offset = 0x0015) initial value = 0x6 (msb) (lsb) ? ? ? ? ? bp_en ppctdm_en tusel name position function ? levels1.3 ? bp_en levels1.2 0 = enable idt switches that connect the utopia bus to daughter card header ppctdm_en levels1.1 0 = enable idt switches that connect the tdm bus to the daughter card header tusel levels1.0 0 = set ds2156.tusel to enable tdm backplane 1 = set ds2156.tusel to enable utopia backplane note (ds2156 only): when the utopia backplane is enabled (levels.tusel = 1) there is a possibility for contention between the utopia bus master and tsysclk, tser, and rser. to avoid this, the following switches should be opened when the utopia backplane is enabled: switch1.0, switch2.0, switch3.0, and switch4.1 ds21354 information for more information about the ds21354, please consult the ds21354 data sheet available on our website at www.maxim-ic.com/ds21354 . software downloads are also available for this design kit. DS21354DK information for more information about the DS21354DK, including software downloads, please consult the DS21354DK data sheet available on our website at www.maxim-ic.com/DS21354DK . technical support for additional technical support, please e-mail your questions to telecom.support@dalsemi.com . schematics the DS21354DK schematics are featured in the following 13 pages.
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