njg 1655me7 ver.2011-02-25 - 1 - x-sp3t switch gaas mmic general description package outline the NJG1655ME7 is a gaas x (cross) - sp3t* switch mmic, which is designed for switching of balanced signals. the NJG1655ME7 features very low phase error between on-state paths, low insertion loss, low control voltage and wide frequency coverage. the esd protection circuit are integrated in the ic to achieve high esd tolerance. the NJG1655ME7 is available in a very small, lead-free, halogen-free, 2.0mm x 2.0mm x 0.397 mm, 18-pin eqfn18-e7 package. features low voltage operation v dd =+1.5~+4.5v low voltage logic control v ctl(h) =+1.3v min. low insertion loss 0.40db typ. @ f=1.0ghz 0.45db typ. @ f=2.0ghz operating current consumption 20 a typ. @ v dd =2.7v low phase error 3 deg @ f=2.0ghz small package eqfn18-e7 (package size: 2.0mm x 2.0mm x 0.397mm typ.) integrated esd protection circuit lead-free, rohs compliant and halogen-free pin configuration truth table h=v ctl(h), l=v ctl(l) on path vctl1 vctl2 pca-p1a pcb-p1b h l pca-p2a pcb-p2b l l pca-p3a pcb-p3b l h *) x-sp3t is a paired sp3t switch controlled synchr onously. the x-sp3t includes two sp3t switches whos e rf lines have a crossing inside the chip. pin connection 1. gnd 11. pcb 2. nc(gnd) 12. pca 3. p2a 13. vdd 4. p2b 14. gnd 5. gnd 15. vctl2 6. p1b 16. vctl1 7. p1a 17. p3b 8. gnd 18. p3a 9. nc(gnd) 10. gnd note: the information on this datasheet is subject to change without notice. ( top view) njg16 55me7 1 3 decoder 2 5 6 7 8 10 12 13 14 18 17 16 9 15 4 11
NJG1655ME7 - 2 - absolute maximum ratings (t a =+25c, z s =z l =50 ) parameter symbol conditions ratings units rf input power p in v dd =2.7v, v ctl =0v/1.8v 28 dbm supply voltage v dd vdd terminal 5.0 v control voltage v ctl vctl1, vctl2 terminal 5.0 v power dissipation p d four-layer fr4 pcb with through-hole (74.2mmx74.2mm), t j =150c 1400 mw operating temp. t opr -40~+85 c storage temp. t stg -55~+150 c electrical characteristics (general conditions: t a =+25c, z s =z l =50 , v dd =2.7v, v ctl(l) =0v, v ctl(h) =1.8v, with application circuit) parameters symbol conditions min typ max units supply voltage v dd 1.5 2.7 4.5 v operating current i dd - 20 40 a control voltage (low) v ctl(l) 0 - 0.4 v control voltage (high) v ctl(h) 1.3 1.8 4.5 v control current i ctl - 5 10 a insertion loss 1 loss1 f=1.0ghz, p in =0dbm - 0.40 0.55 db insertion loss 2 loss2 f=2.0ghz, p in =0dbm - 0.45 0.70 db isolation 1 isl1 f=1.0ghz, p in =0dbm pca-p1a,p2a,p3a, pcb-p1b,p2b,p3b 24 27 - db isolation 2 isl2 f=2.0ghz, p in =0dbm pca-p1a,p2a,p3a, pcb-p1b,p2b,p3b 18 21 - db isolation 3 isl3 f=2.0ghz, p in =0dbm pca-pcb 15 18 - db phase error pe f=2ghz -3 - 3 deg input power at 0.2db compression point p -0.2db f=2ghz 18 23 - dbm vswr vswr f=2ghz, on state - 1.1 1.3 switching time tsw 50% v ctl to 10%/90% rf - 2 5 s
NJG1655ME7 - 3 - terminal information no. symbol description 1, 5, 8 10, 14, gnd ground terminal. connect to the pcb ground plane. 2, 9 nc(gnd) no connected terminal. this terminal is not connected with internal circuit. connect to the pcb ground plane. 3 p2a the 2nd rf port of the 1st switch. this port is connected with pca port. pcb port is connected with p2b port at the same time. an external capacitor is required to block dc voltage. 4 p2b the 2nd rf port of the 2nd switch. this port is connected with pcb port. pca port is connected with p2a port at the same time. an external capacitor is required to block dc voltage. 6 p1b the 1st rf port of the 2nd switch. this port is connected with pcb port. pca port is connected with p1a port at the same time. an external capacitor is required to block dc voltage. 7 p1a the 1st rf port of the 1st switch. this port is connected with pca port. pcb port is connected with p1b port at the same time. an external capacitor is required to block dc voltage. 11 pcb common rf port of the 2nd switch. this port is connected with either of p1b, p2b, and p3b port. an external capacitor is required to block dc voltage. 12 pca common rf port of the 1st switch. this port is connected with either of p1a, p2a, and p3a port. an external capacitor is required to block dc voltage. 13 vdd positive voltage supply terminal. the positive voltage (+1.5~+4.5v) should be supplied. please connect a bypass capacitor with gnd terminal for best rf performance. 15 vctl2 control signal input terminal. this terminal is set to high-level (+1.3v~4.5v) or low-level (0~+0.4v). 16 vctl1 control signal input terminal. this terminal is set to high-level (+1.3v~4.5v) or low-level (0~+0.4v). 17 p3b the 3rd rf port of the 2nd switch. this port is connected with pcb port. pca port is connected with p3a port at the same time. an external capacitor is required to block dc voltage. 18 p3a the 3rd rf port of the 1st switch. this port is connected with pca port. pcb port is connected with p3b port at the same time. an external capacitor is required to block dc voltage.
NJG1655ME7 - 4 - electrical characteristics (losses of external circuit are excluded, with application circuit) 1.0 1.5 2.0 2.5 3.0 0.5 1.0 1.5 2.0 2.5 3.0 pca-p1a pca-p2a pca-p3a vswr frequency (ghz) vswr vs. frequency ( v dd =2.7v, pca port ) 1.0 1.5 2.0 2.5 3.0 0.5 1.0 1.5 2.0 2.5 3.0 pcb-p1b pcb-p2b pcb-p3b vswr frequency (ghz) vswr vs. frequency ( v dd =2.7v, pcb port ) -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 pca-p1a pcb-p1b insertion loss (db) frequency (ghz) insertion loss vs. frequency ( v dd =2.7v, vctl1=1.8v, vctl2=0v ) -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 pca-p2a pcb-p2b insertion loss (db) frequency (ghz) insertion loss vs. frequency ( v dd =2.7v, vctl1=0v, vctl2=0v ) -2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 pca-p3a pcb-p3b insertion loss (db) frequency (ghz) insertion loss vs. frequency ( v dd =2.7v, vctl1=0v, vctl2=1.8v ) -40 -30 -20 -10 0 0.5 1.0 1.5 2.0 2.5 3.0 pca-p2a pca-p3a pca-pcb isolation (db) frequency (ghz) isolation vs. frequency ( v dd =2.7v, vctl1=1.8v, vctl2=0v )
NJG1655ME7 - 5 - electrical characteristics (losses of external circuit are excluded, with application circuit) -10 -5 0 5 10 0.5 1.0 1.5 2.0 2.5 3.0 pca-p1a,pcb-p1b pca-p2a,pcb-p2b pca-p3a,pcb-p3b phase error (degree) frequency (ghz) phase error vs. frequency ( v dd =2.7v ) -1.0 -0.8 -0.6 -0.4 -0.2 0.0 10 12 14 16 18 20 10 12 14 16 18 20 22 24 26 insertion loss (db) input power (dbm) insertion loss, idd vs. input power ( v dd =2.7v, f=2ghz, vctl1=1.8v, vctl2=0v ) operating current i dd ( a) pca-p1a 10 15 20 25 30 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 p-0.2db (dbm) vdd(v) p-0.2db vs. v dd ( f=2ghz, vctl1=1.8v, vctl2=0v ) pca-p1a voltage (arb. unit) time ( 2 sec/div ) switching time ( v dd =2.7v, vctl2=0v ) 1.7 s pca-p1a vctl1 10 15 20 25 30 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 p-0.2db (dbm) vctl1(v) p-0.2db vs. v ctl ( f=2ghz, v dd =2.7v, vctl2=0v ) pca-p1a
NJG1655ME7 - 6 - electrical characteristics (losses of external circuit are excluded, with application circuit) -1.0 -0.8 -0.6 -0.4 -0.2 0.0 -50 0 50 100 pca-p1a pcb-p1b insertion loss (db) ambient temperature ( o c) insertion loss vs. ambient temperature ( v dd =2.7v, f=1ghz, vctl1=1.8v, vctl2=0v ) -1.0 -0.8 -0.6 -0.4 -0.2 0.0 -50 0 50 100 pca-p1a pcb-p1b insertion loss (db) ambient temperature ( o c) insertion loss vs. ambient temperature ( v dd =2.7v, f=2ghz, vctl1=1.8v, vctl2=0v ) -2.0 -1.5 -1.0 -0.5 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -45 o c +25 o c +90 o c insertion loss (db) frequency (ghz) insertion loss vs. frequency ( v dd =2.7v, vctl1=1.8v, vctl2=0v ) pca-p1a -40 -30 -20 -10 0 -50 0 50 100 pca-p2a pca-p3a pca-pcb isolation (db) ambient temperature ( o c) isolation vs. ambient temperature ( v dd =2.7v, f=2ghz, vctl1=1.8v, vctl2=0v ) 1.0 1.5 2.0 2.5 3.0 -50 0 50 100 pca-p1a pca-p2a pca-p3a vswr ambient temperature ( o c) vswr vs. ambient temperature ( v dd =2.7v, f=2ghz, pca port ) 1.0 1.5 2.0 2.5 3.0 -50 0 50 100 pcb-p1b pcb-p2b pcb-p3b vswr ambient temperature ( o c) vswr vs. ambient temperature ( v dd =2.7v, f=2ghz, pcb port )
NJG1655ME7 - 7 - electrical characteristics (losses of external circuit are excluded, with application circuit) -10 -5 0 5 10 -50 0 50 100 pca-p1a,pcb-p1b pca-p2a,pcb-p2b pca-p3a,pcb-p3b phase error (degree) ambient temperature ( o c) phase error vs. ambient temperature ( v dd =2.7v, f=2ghz ) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -50 0 50 100 rise fall switching time ( s) ambient temperature ( o c) switching time vs. ambient temperature ( v dd =2.7v, vctl2=0v ) pca-p1a 10 15 20 25 30 pca-p1a pcb-p1b -50 0 50 100 p-0.2db (dbm) ambient temperature ( o c) p-0.2db vs. ambient temperature ( v dd =2.7v, f=2ghz, vctl1=1.8v, vctl2=0v ) -10 -5 0 5 10 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -45 o c +25 o c +90 o c phase error (degree) frequency (ghz) phase error vs. frequency ( v dd =2.7v, f=2ghz, vctl1=1.8v, vctl2=0v ) pca-p1a, pcb-p1b 10 15 20 25 30 vctl1=1.3v vctl1=1.8v vctl1=4.5v -50 0 50 100 p-0.2db (dbm) ambient temperature ( o c) p-0.2db vs. ambient temperature ( f=2ghz, v dd =2.7v, vctl2=0v ) pca-p1a
- 8 - NJG1655ME7 application circuit (top view) parts list part id value notes c1~c8 56pf c9 1000pf murata (grm15) test pcb layout (top view) precautions [1] the dc blocking capacitors (c1~c8) must be placed at all rf termi nals (pca, pcb, p1a, p1b, p2a, p2b, p3a and p3b). [2] the bypass capacitor (c9) should be placed as close as vdd terminal. [3] please layout ground pattern right under this ic to avoid degradation of isolation or high power characteristics. frequency loss 1ghz 0.36db 2ghz 0.49db losses of pcb, capacitors and connectors vdd vctl2 vctl1 c6 c5 c4 c2 c1 c8 c7 pca pcb p1a p1b p2b p2a p3a p3b c9 c3 c2 c3 c4 c6 c5 1 3 p2a p1b vctl1 v ctl2 decoder 2 5 6 7 8 10 12 13 14 18 17 16 9 vdd 15 4 p2b 11 p1a pcb pca p3a p3b 2.7v 0/1.8v 0/1.8v c9 c8 c7 c1
- 9 - NJG1655ME7 package outline (eqfn18-e7) caution s on using this product this product contains gallium-arsenide (gaas) wh ich is a harmful material. ? do not eat or put into mouth. ? do not dispose in fire or break up this product. ? do not chemically make gas or powder with this pro duct. ? to wast e th is product, please obey the relati ng law of your country. this product may be damaged with electric static di scharge (esd) or spike voltage. please hand le with care to avoid these damages . [caution] the specifications on this databook are only given for information, without any guarantee as regards either mistakes or omissions. the application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. terminal treat :snbi board :copper molding material :epoxy resin weight :5.0mg unit :mm
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