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  GL422/gl423 usb 2.0 +sd/mmc-controller combo solution datasheet revision 1.00 aug. 16, 2006 genesys logic, inc.
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 2 copyright: copyright ? 2006 genesys logic incorporated. all rights reserved. no part of the materials may be reproduced in any form or by any means without prior written consent of genesys logic inc.. disclaimer: all materials are provided as is without express or implied warranty of any kind. no license or right is granted under any patent or trademark of genesys logic inc.. genesys logic hereby disclaims all warranties and conditions in regard to materials, including all warranties, implied or express, of merchantability, fitness for any particular purpose, and non-infringement of intellectual property, including, without limitation, the x-d picture card tm license. in no event shall genesys logic be liable for any damages including, without limitation, damages resulting from loss of information or profits. please be advised that the materials may contain errors or ommisions. genesys logic may make changes to the materials or to the products described therein at any time without notice. trademarks: is a registered trademark of genesys logic, inc. all trademarks are the properties of their respective owners. office: genesys logic, inc. 12f, no. 205, sec. 3, beishin rd., shindian city, taipei, taiwan tel: (886-2) 8913-1888 fax: (886-2) 6629-6168 http :// www.genesyslogic.com
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 3 revision history revision date description 0.95 09/02/2005 first formal release 0.96 10/18/2005 1.modify block diagram,ch1 2.add 56-pin qfn package 3.add usb controller structure ,ch3 4.add qfn-56 package diagram,ch4.2 5.modify pad/pin descruption ,ch4.6 6.add d.c.characteristics , ch5.3 1.00 08/16/2006 1. remove 54-pin lga package 2. add 54-pin vfbga package
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 4 table of contents chapter 1 general description.................................................7 1.1 usb i nterface ......................................................................................8 1.2 card i nterface ..................................................................................8 1.3 f lash a ccess i nterface .....................................................................8 1.4 c ontrol l ogic .....................................................................................8 1.5 e mbedded cpu.....................................................................................8 chapter 2 features...........................................................................9 2.1 usb 2.0 i nterface ................................................................................9 2.2 sd h ost i nterface ..............................................................................9 2.3 mmc h ost i nterface .........................................................................9 2.4 f lash m emory i nterface ................................................................10 2.5 m icro c ontroller and a nalog s ystem ........................................10 2.6 p roduct p ackages ............................................................................10 2.7 t echnology .......................................................................................10 2.8 m anufacture .....................................................................................10 chapter 3 pin assignment............................................................11 3.1 f unction description .......................................................................11 3.1.1 usb specification compliance......................................................11 3.1.2 integrated usb building blocks...................................................11 3.1.3 embedded 8051 micro-controller................................................11 3.1.4 3.3v power source........................................................................11 3.1.5 memory stick tm interface.........................................................11 3.1.6 secure digital (sd) and multi media card (mmc)...................11 3.1.7 high efficient hardware engine....................................................12 3.1.8 inter-media transfer capability...................................................12 3.2 b lock diagram ...................................................................................12 3.2.1 utm..............................................................................................12 3.2.2 sie.................................................................................................12 3.2.3 epfifo.........................................................................................13 3.2.4 mhe..............................................................................................13
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 5 chapter 4 combo structure......................................................14 4.1 d ie d iagram ........................................................................................14 4.2 d ie to qfn -56 p ackage d iagram ...................................................15 4.3 qfn -56 p ackage t op v iew ..............................................................16 4.4 d ie to vfbga -54 p ackage d iagram ..............................................17 4.5 vfbga -54 p ackage t op v iew .........................................................18 4.6 pad/pin d escripton .........................................................................19 4.6.1 usb interface...............................................................................19 4.6.2 regulator interface......................................................................21 4.6.3 card interface..............................................................................22 4.6.4 flash interface..............................................................................24 4.6.5 system interface...........................................................................25 4.6.6 test interface................................................................................26 4.6.7 use flash interface as usb test interface..................................27 4.6.8 use card interface as usb test interface..................................28 chapter 5 electrical characteristics..............................29 5.1 a bsolute m aximum r atings ............................................................29 5.2 b us o perating c onditions ...............................................................29 5.3 d.c. c haracteristics ........................................................................29 chapter 6 package dimension...................................................31
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 6 list of figures f igure 1.1 - GL422/gl423 b lock d iagram ................................................................7 f igure 3.1 - usb c ontroller diagram ....................................................................12 f igure 4.1 - GL422/gl423 d ie d iagram ...................................................................14 f igure 4.2 - GL422/gl423 d ie to qfn-56 p ackage d iagram ................................15 f igure 4.3 - GL422/gl423 qfn 56 p ackage t op v iew ...........................................16 f igure 4.4 - GL422/gl423 vfbga54 p ackage d iagram .......................................17 f igure 4.5 - GL422/gl423 vfbga 54 p ackage t op v iew ......................................18 f igure 6.1 C GL422/gl423 56 p in qfn p ackage ......................................................31 f igure 6.2 C GL422/gl423 54 p in vfbga p ackage ................................................32 list of tables t able 4.1- usb i nterface ..........................................................................................19 t able 4.2 C r egulator i nterface ............................................................................21 t able 4.3 C c ard i nterfac .........................................................................................22 t able 4.4 C f lash i nterface .....................................................................................24 t able 4.5 C s ystem i nterface ...................................................................................25 t able 4.6 C t est i nterface ........................................................................................26 t able 4.7 C u se f lash i nterface as usb t est i nterface ......................................27 t able 4.8 C u se c ard i nterface as usb t est i nterface .......................................28 t able 5.1 C a bsolute m aximum r atings .................................................................29 t able 5.2 C b us o perating c onditions ....................................................................29 t able 5.3 C d.c. c haracteristics .............................................................................29
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 7 chapter 1 general description genesys logic s GL422/gl423 controller is an single-chip controllers support both usb2.0 and mmc4.0/sd1.1 specifications. while usb controller and sd/mmc card controller are integrated as a combo-function single chip, this chip provides an enhanced combo solution of usb2.0 and sd/mmc card. GL422/gl423 is designed based on usb2.0 and mmc4.0/sd1.1 specification. its unique ram based firmware strategy provides flexibility for fast compatibility and performance improvement, therefore, give customers strong support to win in today s fast-changing market. GL422/gl423 manages interface protocol, data storage and retrieval, error detection and correction, defect handling and diagnostic, as well as power management. with a built-in flash management algorithm, GL422/gl423 is applicable for most types of flash in the market: samsung, micron, st, toshiba, hynix and renesas. GL422/gl423 is packaged qfn-56 and vfbga-54. both die and qfn/vfbga package are available and completely meet sd and mmc memory card mechanical thickness requirement. the pin assignment that fits to card sockets provides easy pcb layout. GL422/gl423 die has a dual channel flash access interface, which remarkably speed up read/write performance. qfn-56 packaged GL422/gl423 supports sd1.1 only. vfbga-54 packaged GL422/gl423 supports both sd1.1 and mmc4.0. figure 1.1 is the block diagram of vfbga422/gl423. usb phy flash access if card controller usb controller GL422/gl423 control logic usb interface card interface flash1 interface flash2 interface figure 1.1 - GL422/gl423 block diagram
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 8 1.1 usb interface the usb controller, complied with usb2.0 and usb1.1 specification, explains commands from usb host and transfers data as a usb application. 1.2 card interface the card controller, complied with sd1.1/mmc4.0 specification, explains commands from sd/mmc host and transfers data between sd/mmc host and flash. 1.3 flash access interface the flash access interface communicates with cpu. it also manages two channels of flash, based on flash commands. moreover, it implements defect processing, ecc, and address mapping, etc. 1.4 control logic the control logic module switches the command and data between the usb host and sd/mmc host. by this module, the chip operates in different mode. 1.5 embedded cpu embedded cpu performs arithmetic and logical operations. in addition, it extracts instruction from rom and sram, decodes and executes them. it also manages control and status signals between flash access interface and itself.
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 9 chapter 2 features 2.1 usb 2.0 interface ? complies with universal serial bus specification version 2.0 ? complies with usb mass storage class specification version 1.0 ? integrated usb 2.0 transceiver macro-cell (utm), serial interface engine (sie), build-in power-on reset (por) and low-voltage detector (lvd) ? supports one usb device address and up to 5 endpoints, including one control, one interrupt and 2 bulk in/out endpoint pairs ? embedded 8051 micro-controller operates at 60mhz clock ? 64 / 512 bytes data payload for full / high speed bulk endpoint ? supports usb 2.0 test mode features 2.2 sd host interface ? complies with sd specification version 1.1 ? backward compatible with sd specification, version 1.0 ? supports spi mode and cprm functions ? supports clock rate up to 25 mhz for sd1.0 ? supports clock rate up to 52mhz for sd1.1 ? buffers for multi-block flash memory programming ? dma operation between buffers and flash memory ? supports automatic crc16 generation and verification on data 3-0 2.3 mmc host interface ? complies with multimediacard system specification, version 4.0 ? backward compatible with multimediacard system specification, version 3.3 ? supports spi mode and cprm functions ? supports clock rate up to 25 mhz for mmc 3.3 ? supports clock rate up to 52mhz for mmc 4.0 ? buffers for multi-block flash memory programming ? dma operation between buffers and flash memory ? supports automatic crc16 generation and verification on data 7-0
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 10 2.4 flash memory interface ? direct interface to nand/and flash chips ( samsung / toshiba / hitachi / renesas / micron / st / hynix) ? direct interface to nor/or flash chips (die only) ? supports dual-channel, 16 bits flash (die only) ? drives up to 4 flash memory chips, respectively (die only) ? supports 64 mb / 128 mb / 256 mb / 512 mb /1gb / 2gb / 4gb / 8gb flash chips ? embedded firmware support for flash file system (ftl) ? built-in flash management algorithm ? powerful ecc for error detection and correction up to 6 bytes per 512 bytes 2.5 micro controller and analog system ? risc core with fast speed and less code size ? flexibility to update system code ? ability to add customers own feature 2.6 product packages ? 56-pin qfn package ? 54-pin vfbga package 2.7 technology ? 0.18um process 2.8 manufacture ? easy firmware development environment ? supports firmware upgrade tool via pc
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 11 chapter 3 pin assignment 3.1 function description 3.1.1 usb specification compliance ? confirms to usb 480mbps specification, version 2.0. ? backward compatible with usb 12mbps specification, version 1.1. ? support one usb device address and up to 5 endpoints, including one control, one interrupt and 2 bulk in / out endpoint pairs 3.1.2 integrated usb building blocks ? usb2.0 transceiver macro (utm), serial interface engine (sie), build-in power-on reset (por) and low-voltage detector (lvd) 3.1.3 embedded 8051 micro-controller ? operates at 60 mhz clock, 12 clocks per instruction cycle ? embedded 48k byte mask rom and internal 256 byte sram ? embedded 4k byte external sram 3.1.4 3.3v power source 3.1.5 memory stick tm interface ? compliant with memory stick interface specification ? hardware support bs/sdio/sclk signals ? support ins signal ? support automatic crc16 generation and verification 3.1.6 secure digital (sd) and multi media card (mmc) ? compliant with secure digital / mmc interface specification ? support both sd / mmc mode access clk/cmd/dat0/dat1/dat2/dat3 ? command transmit and response receive can be enabled separately ? automatic crc7 generation for command and crc7 verification for response on cmd ? support automatic crc16 generation and verification on dat3-0 ? in addition to full packet transaction, optional single byte / bit operation on both cmd and dat line / lines ? process data in block or byte
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 12 3.1.7 high efficient hardware engine ? automatic data read / write with card by hardware engine ? easier firmware development ? media interface signals output low automatically when suspend 3.1.8 inter-media transfer capability ? support copy data between flash cards or within same flash card 3.2 block diagram mhe register sie/ fifo/ mhe control utm sie 8051 core sram 256b lut mask rom (48kb) ms mif msp mif sd mif mcfifo (32b) mhe control epfifo ep3 fifo (64b) bulk fifo (512b*2) ep0 fifo (64b) lut 4kb figure 3.1 - usb controller diagram 3.2.1 utm usb2.0 transceiver macro 3.2.2 sie serial interface engine
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 13 3.2.3 epfifo endpoint fifo: it includes control fifo (fifo0), interrupt fifo (fifo3), bulk in/out fifo (bulkfifo) 3.2.3.1 control fifo fifo of control endpoint 0. it is 64-byte fifo, and it is used for endpoint 0 data transfer. 3.2.3.2 interrupt fifo 64-byte-depth fifo of endpoint 3 for status interrupt. 3.2.3.3 bulk in/out fifo it can be in the tx mode or rx mode: ? it contains ping-pong fifo (512 bytes each bank) for transmit/receive data continuously. ? it can be directly accessed by micro controller ? support sie won t transmit data filled before micro controller check data integrity complete. ? it can be used to copy data block from source to destination in the same card or from one card to other card. 3.2.4 mhe it contains 3 mif (media interface), control and mcfifo 3.2.4.1 mifs ? sd / mmc mif ? memory stick mif ? memory stick-pro mif 3.2.4.2 mcfifo 32-byte fifo shared by memory stick, memory stick-pro, sd/mmc mif. ? memory stick and memory stick-pro mif can use mcfifo as command fifo. ? sd/mmc mif use mcfifo for command and response.
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 14 chapter 4 combo structure 4.1 die diagram sd/mmc controller avdd3 dm dp avdd1 avdd2 vbus agnd2 rref agnd1 agnd3 dgnd2 dgnd1 dvdd1 avss2 xi avdd2 cutcell pad_t3 p a d _ r e _ b p a d _ c e 0 _ b p a d _ d a 7 p a d _ b u s y _ b p a d _ d a 6 pad_da2 vcc33 pad_da1 pad_da0 cgnd pad_t0 pgnd pad_t1 p a d _ h d a t a 2 p a d _ h d a t a 3 p a d _ h c m d y p a d _ h c l k p g n d c g n d p a d _ h d a t a 0 pad_hdata7 v c c 3 3 pad_t2 pad_da3 pad_da4 pad_da5 p a d _ m c l k v c c 3 3 p a d _ w p _ b p a d _ w e _ b p a d _ r s t _ b p a d _ a l e p a d _ c l e c g n d p g n d p a d _ c e 1 _ b pad_sdata pad_sclk digital power ring(1.8v/3.3v/gnd) digital power ring(1.8v/3.3v/gnd) d i g i t a l p o w e r r i n g ( 1 . 8 v / 3 . 3 v / g n d ) d i g i t a l p o w e r r i n g ( 1 . 8 v / 3 . 3 v / g n d ) p a d _ o s c o p a d _ u d a t a 2 p a d _ u d a t a 3 p a d _ u c m d p a d _ u c l k p a d _ u d a t a 0 pad_udata7 u s b _ a c t v c c 3 3 o s c o h d a t a 2 h c l k pad_hdata1 pad_udata1 p a d _ h d a t a 4 p a d _ u d a t a 4 p a d _ h d a t a 5 p a d _ u d a t a 5 pad_hdata6 pad_udata6 p a d _ h c m d x g n d cvdd18 da0 p a d _ u s b _ a c t v xo c v d d 1 8 v c c 3 3 p a d _ a 0 p a d _ a 1 p a d _ a 2 p a d _ a 3 p a d _ a 4 p a d _ a 5 p a d _ a 6 p a d _ a 7 p a d _ a 8 p a d _ a 9 p a d _ a 1 0 p a d _ a 1 1 p a d _ a 1 2 p a d _ a 1 3 pad_a14 pad_a15 p a d _ t 6 p a d _ t 7 pad_t4 pad_t5 p a d _ a 2 3 pad_a22 pad_a18 pad_a17 pad_a16 pad_a19 pad_a20 pad_a21 cvdd18 regulator avss2 avdd2 avss1 avdd1 vin out1 out2 out2 rext1 rext2 vin vin gnd p a d _ o s c _ e p a d _ r s t _ o usb p a d _ p r t _ b cvdd18 gnd d a 6 g n d 1 1 0 1 1 1 2 1 3 1 4 1 6 2 0 2 1 1 5 2 3 2 5 2 6 3 0 2 7 2 8 2 3 4 5 6 7 8 9 1 7 1 8 1 9 2 2 2 4 2 9 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 6 1 6 2 6 3 6 4 6 5 6 6 6 7 6 8 6 9 7 0 7 1 7 2 7 4 7 7 7 6 8 6 6 0 7 8 7 9 8 0 8 1 8 2 8 3 8 4 8 5 7 3 7 5 87 88 89 90 91 92 93 94 96 97 98 99 100 101 102 103 95 104 105 106 107 108 109 110 111 112 113 114 115 116 117 119 118 121 120 rext2 t 7 t 6 h d a t a 3 h c m d v c c 3 3 h d a t a 0 t4 t5 hdata1 t2 t3 t0 t1 da1 da2 da3 da4 da5 vcc33 d a 7 b u s y _ r e _ c e 0 _ c e 1 _ c l e a l e w e _ c v d d 1 8 w p _ o s c _ e r s t _ v c c 3 3 rext1 v18out avdd gnd avdd agnd rref dm dp avdd agnd gnd agnd xi xo avdd vdd agnd cvdd18 u c m d m c l k h d a t a 4 h d a t a 5 hdata7 hdata6 figure 4.1 - GL422/gl423 die diagram
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 15 4.2 die to qfn -56 package diagram sd/mmc controller avdd3 dm dp avdd1 avdd2 vbus agnd2 rref agnd1 agnd3 dgnd2 dgnd1 dvdd1 avss2 xi avdd2 cutcell pad_t3 p a d _ r e _ b p a d _ c e 0 _ b p a d _ d a 7 p a d _ b u s y _ b p a d _ d a 6 pad_da2 vcc33 pad_da1 pad_da0 cgnd pad_t0 pgnd pad_t1 p a d _ h d a t a 2 p a d _ h d a t a 3 p a d _ h c m d y p a d _ h c l k p g n d c g n d p a d _ h d a t a 0 pad_hdata7 v c c 3 3 pad_t2 pad_da3 pad_da4 pad_da5 p a d _ m c l k v c c 3 3 p a d _ w p _ b p a d _ w e _ b p a d _ r s t _ b p a d _ a l e p a d _ c l e c g n d p g n d p a d _ c e 1 _ b pad_sdata pad_sclk digital power ring(1.8v/3.3v/gnd) digital power ring(1.8v/3.3v/gnd) d i g i t a l p o w e r r i n g ( 1 . 8 v / 3 . 3 v / g n d ) d i g i t a l p o w e r r i n g ( 1 . 8 v / 3 . 3 v / g n d ) p a d _ o s c o p a d _ u d a t a 2 p a d _ u d a t a 3 p a d _ u c m d p a d _ u c l k p a d _ u d a t a 0 pad_udata7 pad_hdata1 pad_udata1 p a d _ h d a t a 4 p a d _ u d a t a 4 p a d _ h d a t a 5 p a d _ u d a t a 5 pad_hdata6 pad_udata6 p a d _ h c m d x p a d _ u s b _ a c t v xo c v d d 1 8 v c c 3 3 p a d _ a 0 p a d _ a 1 p a d _ a 2 p a d _ a 3 p a d _ a 4 p a d _ a 5 p a d _ a 6 p a d _ a 7 p a d _ a 8 p a d _ a 9 p a d _ a 1 0 p a d _ a 1 1 p a d _ a 1 2 p a d _ a 1 3 pad_a14 pad_a15 p a d _ t 6 p a d _ t 7 pad_t4 pad_t5 p a d _ a 2 3 pad_a22 pad_a18 pad_a17 pad_a16 pad_a19 pad_a20 pad_a21 cvdd18 regulator avss2 avdd2 avss1 avdd1 vin out1 out2 out2 rext1 rext2 vin vin gnd p a d _ o s c _ e p a d _ r s t _ o usb p a d _ p r t _ b cvdd18 46 48 2 4 4 6 7 8 9 1 0 1 1 20 19 25 18 17 16 15 3 6 3 5 3 4 3 3 3 2 3 1 28 26 24 23 22 21 47 1 2 1 3 1 4 3 7 3 8 3 9 4 0 4 1 4 2 43 44 45 49 50 51 52 53 54 55 56 6 1 6 2 6 3 6 4 6 5 6 6 6 7 6 8 6 9 7 0 7 1 7 2 7 4 7 7 7 6 8 6 6 0 7 8 7 9 8 0 8 1 8 2 8 3 8 4 8 5 7 3 7 5 87 88 89 90 91 92 93 94 96 97 98 99 100 101 102 103 95 104 105 106 107 108 109 110 111 112 113 114 115 116 117 119 118 121 120 1 1 0 1 1 1 2 1 3 1 4 1 6 2 0 2 1 1 5 2 3 2 5 2 6 3 0 2 7 2 8 2 3 4 5 6 7 8 9 1 7 1 8 1 9 2 2 2 4 2 9 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 1 27 3 0 2 9 5 3 figure 4.2 - GL422/gl423 die to qfn-56 package diagram
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 16 4.3 qfn -56 package top view figure 4.3 - GL422/gl423 qfn 56 package top view GL422/gl423 56-pin package (top view) a v d d x o x i a g n d a g n d a v d d d p d m a g n d r r e f a v d d g n d a v d d v 1 8 o u t 1 2 3 4 5 6 7 8 9 10 11 12 13 14 42 41 40 39 38 37 36 35 34 33 32 31 30 29 agnd cvdd18 usb_act vcc33 mclk hdata2 hdata3 ucmd hcmd gnd uclk hclk vcc33 hdata0 c v d d 1 8 h d a t a 1 t 2 t 3 d a 0 d a 1 d a 2 d a 3 d a 4 v c c 3 3 d a 5 g n d d a 6 d a 7 rext1 rext2 vcc33 rst_ osc_e gnd cvdd18 we_ ale cle ce1_ ce0_ re_ busy_ 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7 2 8 5 6 5 5 5 4 5 3 5 2 5 1 5 0 4 9 4 8 4 7 4 6 4 5 4 4 4 3
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 17 4.4 die to vfbga -54 package diagram sd/mmc controller avdd3 dm dp avdd1 avdd2 vbus agnd2 rref agnd1 agnd3 dgnd2 dgnd1 dvdd1 avss2 xi avdd2 cutcell pad_t3 p a d _ r e _ b p a d _ c e 0 _ b p a d _ d a 7 p a d _ b u s y _ b p a d _ d a 6 pad_da2 vcc33 pad_da1 pad_da0 cgnd pad_t0 pgnd pad_t1 p a d _ h d a t a 2 p a d _ h d a t a 3 p a d _ h c m d y p a d _ h c l k p g n d c g n d p a d _ h d a t a 0 pad_hdata7 v c c 3 3 pad_t2 pad_da3 pad_da4 pad_da5 p a d _ m c l k v c c 3 3 p a d _ w p _ b p a d _ w e _ b p a d _ r s t _ b p a d _ a l e p a d _ c l e c g n d p g n d p a d _ c e 1 _ b pad_sdata pad_sclk digital power ring(1.8v/3.3v/gnd) digital power ring(1.8v/3.3v/gnd) d i g i t a l p o w e r r i n g ( 1 . 8 v / 3 . 3 v / g n d ) d i g i t a l p o w e r r i n g ( 1 . 8 v / 3 . 3 v / g n d ) p a d _ o s c o p a d _ u d a t a 2 p a d _ u d a t a 3 p a d _ u c m d p a d _ u c l k p a d _ u d a t a 0 pad_udata7 pad_hdata1 pad_udata1 p a d _ h d a t a 4 p a d _ u d a t a 4 p a d _ h d a t a 5 p a d _ u d a t a 5 pad_hdata6 pad_udata6 p a d _ h c m d x p a d _ u s b _ a c t v xo c v d d 1 8 v c c 3 3 p a d _ a 0 p a d _ a 1 p a d _ a 2 p a d _ a 3 p a d _ a 4 p a d _ a 5 p a d _ a 6 p a d _ a 7 p a d _ a 8 p a d _ a 9 p a d _ a 1 0 p a d _ a 1 1 p a d _ a 1 2 p a d _ a 1 3 pad_a14 pad_a15 p a d _ t 6 p a d _ t 7 pad_t4 pad_t5 p a d _ a 2 3 pad_a22 pad_a18 pad_a17 pad_a16 pad_a19 pad_a20 pad_a21 cvdd18 regulator avss2 avdd2 avss1 avdd1 vin out1 out2 out2 rext1 rext2 vin vin gnd p a d _ o s c _ e p a d _ r s t _ o usb p a d _ p r t _ b cvdd18 b2 e4 j 1 g 1 j 2 f5 e6 f6 g5 g6 h6 a 5 b 4 c 4 b 5 3 2 5 1 g3 d5 e5 d6 f4 g4 h 2 g 2 j 3 f 3 a 4 d 4 e 4 a 3 a 2 6 6 c2 c3 e3 d1 d2 d3 e3 e3 e1 e2 f1 j 4 h 3 h 4 g 3 j 6 c6 c 5 a 6 3 2 b 6 f 2 a1 b1 c1 e3 h1 87 88 89 90 91 92 93 94 96 97 98 99 100 101 102 103 95 104 105 106 107 108 109 110 111 112 113 114 115 116 117 119 118 121 120 1 1 0 1 1 1 2 1 3 1 4 1 6 2 0 2 1 1 5 2 3 2 5 2 6 3 0 2 7 2 8 2 3 4 5 6 7 8 9 1 7 1 8 1 9 2 2 2 4 2 9 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 6 1 6 2 6 3 6 4 6 5 6 6 6 7 6 8 6 9 7 0 7 1 7 2 7 4 7 7 7 6 8 6 6 0 7 8 7 9 8 0 8 1 8 2 8 3 8 4 8 5 7 3 7 5 e 4 h 5 j 5 e4 6 6 b 3 figure 4.4 - GL422/gl423 vfbga54 package diagram
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 18 4.5 vfbga -54 package top view rext1 out2 wp_b ce1_b re_b da6 rext2 rst_b osc_e we_b cle da7 vin avdd1 rref ce0_b busy_b da5 dm dp avdd cvdd18 da4 da2 x1 x2 agnd dgnd avss vss vssd gnd da3 t2 vddx vdd33 vdd33 ale da1 t3 hdata1 vdd33 hdata3 vcc33 da0 hdata7 hdata6 cvdd18 hdata2 hcmdy hdata5 uclk cvdd18 usb_ac tv mclk data4 hcmdx hclk hdata0 a b c d e f g h j 1 6 figure 4.5 - GL422/gl423 vfbga 54 package top view
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 19 4.6 pad/pin descripton 4.6.1 usb interface table 4.1- usb interface qfn56 pin# vfbg a54 pin# pin name pad# pad name type description 96 avdd2 p analog 3.3v power (double bonding) 46 c2 avdd 97 avdd1 p analog 3.3v power (double bonding) 47 c3 rref 98 rref a reference resistor, normal 680ohm (1%) between rref and gnd 99 agnd2 p analog ground (double bonding) 48 e3 agnd 100 agnd1 p analog ground (double bonding) 49 d1 dm 101 dm b usb d- 50 d2 dp 102 dp b usb d+ 51 d3 avdd 103 avdd3 p analog 3.3v power 52 e3 agnd 104 agnd3 p analog ground nc nc ? 105 vbus p (no bonding) 53 e3 agnd 106 dgnd2 p digital ground. (tri-bonding) 53 e3 agnd 107 dgnd1 p digital ground. (tri-bonding) nc nc ? 108 dvdd1 p digital power (no bonding) 53 e3 agnd 109 avss2 p analog ground (tri-bonding) 54 e1 xi 110 xi i crystal driver input 55 e2 xo 111 xo o crystal driver output 56 f1 avdd 112 avdd2 p analog 3.3v power (double bonding) - - - - cutcell - (no bonding)
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 20 56 f1 vdd 113 avdd2 p analog 3.3v power (double bonding) 114 avss2 p analog ground (double bonding) 1 e3 agnd 115 avss1 p analog ground (double bonding) 116 avdd1 p 1.8v power supply (double bonding) 2 h1 cvdd18 117 cvdd18 p 1.8v power supply (double bonding)
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 21 4.6.2 regulator interface table 4.2 C regulator interface qfn56 pin# vfbg a54 pin# pin name pad# pad name type description nc nc ? 91 out1 o 1.8v output (max.40ma) (no bonding) 89 out2 o 1.8v output (max.100ma) (double bonding) 43 b2 v18out 90 out2 o regulator 1.8v output (double bonding) 92 vin p analog 3.3v power (tri-bonding ) 93 vin p analog 3.3v power (tri-bonding ) 44 c1 avdd 94 vin p analog 3.3v power (tri-bonding ) 45 e4 gnd 95 gnd p analog ground 42 b1 rext1 88 rext1 a external resistor pad 41 a1 rext2 87 rext2 a external resistor pad
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 22 4.6.3 card interface table 4.3 C card interface qfn56 pin# vfbga 54 pin# pin name pad# pad name type description 11 h5 uclk 26 pad_uclk b controller clock signal from usb reader to card (rising edge) 12 j5 hclk 27 pad_hclk b controller clock signal from host only to card (rising edge) 19 pad_ucmd b sd/mmc mode: hcmd from/to usb reader spi mode: data-in signal from usb reader(double bonding) 8 j4 ucmd 20 pad_hcmdx b sd/mmc mode: hcmd from/to host spi mode: data-in signal from host (double bonding) 9 h3 hcmd 21 pad_hcmdy b sd/mmc mode: hcmd from/to host spi mode: data-in signal from host 29 pad_udata0 b sd/mmc mode: hdata0 from/to usb reader spi mode: data-out signal to usb reader (double bonding) 14 j6 hdata0 30 pad_hdata0 b sd/mmc mode: hdata0 from/to host. spi mode: data-out signal to host (double bonding) 16 f6 hdata1 38 pad_udata1 b sd/mmc mode: hdata1 from/to usb reader. spi mode: not connected (double bonding)
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 23 39 pad_hdata1 b sd/mmc mode: hdata1 from/to host. spi mode: not connected (double bonding) 13 pad_udata2 b sd/mmc mode: hdata2 from/to usb reader. spi mode: not connected (double bonding) 6 h2 hdata2 14 pad_hdata2 b sd/mmc mode: hdata2 from/to host. spi mode: not connected (double bonding) 15 pad_udata3 b sd/mmc mode: hdata3 from/to usb reader. spi mode: cs signal (double bonding) 7 g2 hdata3 16 pad_hdata3 b sd/mmc mode: hdata3 from/to host. spi mode: cs signal (double bonding) 17 pad_udata4 b mmc mode: hdata4 from/to usb reader. (double bonding) nc j3 18 pad_hdata4 b mmc mode: hdata4 from/to host. (double bonding) 22 pad_udata5 b mmc mode: hdata5 from/to usb reader. (double bonding) nc h4 23 pad_hdata5 b mmc mode: hdata5 from/to host. (double bonding) nc g6 34 pad_udata6 b mmc mode: hdata6 from/to usb reader. (double bonding)
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 24 35 pad_hdata6 b mmc mode: hdata6 from/to host. (double bonding) 36 pad_udata7 b mmc mode: hdata7 from/to usb reader. (double bonding) nc g5 37 pad_hdata7 b mmc mode: hdata7 from/to host. (double bonding) 4.6.4 flash interface the flash interface is used to access and/nand flash, defined as table 4.4. it is also shared with usb test interface, refers to table 4.7. table 4.4 C flash interface qfn56 pin# vfbga 54 pin# pin name pad# pad name type description 31 c4 ce0_ 65 pad_ce0_b b 0 for flash chip 0 to select active (low-active). 32 b4 ce1_ 66 pad_ce1_b b 0 for flash chip 1 to select active (low-active). 33 a5 cle 67 pad_cle b flash command latch enable 34 f3 ale 68 pad_ale b flash address latch enable 30 b5 re_ 64 pad_re_b b flash read enable (low active) 35 a4 we_ 69 pad_we_b b flash write enable (low active) 29 c5 busy_ 63 pad_busy_b b flash ready when high, busy when low. nc b3 wp_ 71 pad_wp_b b flash write protect (low active) 19 g4 da0 44 pad_da0 b flash bus bit0 20 f4 da1 45 pad_da1 b flash bus bit1 21 d6 da2 46 pad_da2 b flash bus bit2 22 e5 da3 47 pad_da3 b flash bus bit3
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 25 23 d5 da4 48 pad_da4 b flash bus bit4 25 c6 da5 50 pad_da5 b flash bus bit5 27 b6 da6 61 pad_da6 b flash bus bit6 28 a6 da7 62 pad_da7 b flash bus bit7 4.6.5 system interface table 4.5 C system interface qfn56 pin# vfbga 54 pin# pin name pad# pad name type description 76 pad_rst_b i power-on reset input, low active (double bonding) 39 a2 rst_ 75 pad_rst_o o power-on reset output (double bonding) 3 j1 usb_act 9 pad_usb_a ctv b usb active nc nc ? 8 pad_prt_b b protect (no bonding) nc nc ? 118 pad_sclk b test port clk. (no bonding) nc nc ? 119 pad_sdata b test port data. (no bonding) nc nc ? 12 pad_osco o clock output for test 5 j2 mclk 11 pad_mclk i main clock input. (no bonding) 38 a3 osc_e 74 pad_osc_e i oscillator enable 40 f2 vcc33 77 vcc33 p digital 3.3v power supply 24 g3 vcc33 49 vcc33 p digital 3.3v power supply 13 g3 vcc33 28 vcc33 p digital 3.3v power supply 4 g1 vcc33 10 vcc33 p digital 3.3v power supply 36 d4 cvdd18 70 cvdd18 p digital 1.8v power supply 15 h6 cvdd18 31 cvdd18 p digital 1.8v power supply
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 26 73 cgnd p digital ground (double bonding) 37 e4 gnd 72 pgnd p digital ground (double bonding) 52 cgnd p digital ground (double bonding) 26 e4 gnd 51 pgnd p digital ground (double bonding) 25 cgnd p digital ground (double bonding) 10 e4 gnd 24 pgnd p digital ground (double bonding) 4.6.6 test interface table 4.6 C test interface qfn56 pin# vfbga 54 pin# pin name pad# pad name type description nc nc ? 40 pad_t0 b nc nc ? 41 pad_t1 b 17 e6 t2 42 pad_t2 b 18 f5 t3 43 pad_t3 b nc nc ? 32 pad_t4 b nc nc ? 33 pad_t5 b nc nc ? 7 pad_t6 b nc nc ? 6 pad_t7 b dual channel flash2 bus bit0 to bit7. (on-chip pulled-up). when power-on or hardware reset, t[3:0] is: 4 b0000: usb cpu test (cputst = 1) 4 b0001: usb utm scan mode (utmscanm = 1 ) 4 b0010: usb scan mode (scanmod = 1) 4 b0011: usb utm test (utmtest = 1) others: sd controller test mode (t[7:4],t[1:0] no bonding)
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 27 4.6.7 use flash interface as usb test interface this interface is shared with flash interface. this is only for testing. in test mode, the flash interface will be used for usb test patterns: table 4.7 C use flash interface as usb test interface pin name pad# pad name type scan mod utm test utm scanm cpu test ce0_ 65 pad_ce0_b b do4 term do4 ce1_ 66 pad_ce1_b b do7 susp do7 cle 67 pad_cle b op1 ale 68 pad_ale b op0 re_ 64 pad_re_b b do6 rxerr do6 we_ 69 pad_we_b b do1 rxv do1 busy_ 63 pad_busy_b b scante st txvh scantest wp_ 71 pad_wp_b b da0 44 pad_da0 b vmi da1 45 pad_da1 b vpi da2 46 pad_da2 b rxact da3 47 pad_da3 b txv da4 48 pad_da4 b do2 plldis do2 da5 50 pad_da5 b datao_sel da6 61 pad_da6 b do0 txrdy do0 da7 62 pad_da7 b
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 28 4.6.8 use card interface as usb test interface this interface is shared with card interface. this is only for testing. in test mode, the card interface will be also used for usb test patterns: table 4.8 C use card interface as usb test interface pin name pad# pad name type scan mod utm test utm scanm cpu test uclk 26 pad_uclk b scan_en ucmd 19 pad_ucmd b do5 speed do5 hdata0 29 pad_udata0 b di0 d0 di0 p1.0 hdata1 38 pad_udata1 b di1 d1 di1 p1.1 hdata2 13 pad_udata2 b di2 d2 di2 p1.2 hdata3 15 pad_udata3 b di3 d3 di3 p1.3 hdata4 17 pad_udata4 b di4 d4 di4 p1.4 hdata5 22 pad_udata5 b di5 d5 di5 p1.5 hdata6 34 pad_udata6 b di6 d6 di6 p1.6 hdata7 36 pad_udata7 b di7 d7 di7 p1.7
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 29 chapter 5 electrical characteristics 5.1 absolute maximum ratings table 5.1 C absolute maximum ratings parameter symbol min max. unit remark supply voltage v dd 2.0 3.6 v cmd0, 15,55, acmd41 supply voltage differentials (v ss1 , v ss2 ) -0.3 0.3 v storage temperature -40 85 o c junction temperature 95 o c 5.2 bus operating conditions table 5.2 C bus operating conditions parameter symbol min max. unit remark peak voltage on all lines v dd 2.6 3.6 v ground voltage 0 v operation temperature -25 85 o c operation moisture and corrosion 95% rel. humidity 5.3 d.c. characteristics table 5.3 C d.c. characteristics parameter symbol condition min type max unit supply voltage v cc 2.0 3.3 3.6 v input leakage current (hclk, hcmd and hdata2-0 to ground) i i 0< v in < v cc 0.2 - 0.3 m a input leakage current (hclk, hcmd and hdata2-0 to v dd ) i i 0< v in < v cc 0.2 - 0.3 m a
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 30 input leakage current at hdata3 to ground i i 0< v in < v cc - - 0.43 m a output high voltage at hcmd v oh clock = 20mhz - - 3588 mv output high voltage at hdata v oh clock = 20mhz - - 3586 mv output low voltage at hcmd v ol clock = 20mhz 39 - - mv output low voltage at hdata v ol clock = 20mhz 39 - - mv read/write current i cc - - ma
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 31 chapter 6 package dimension figure 6.1 C GL422/gl423 56 pin qfn package
GL422/gl423 usb 2.0 +sd/mmc-controller combo solution ? 2000-2006 genesys logic inc. - all rights reserved. page 32 figure 6.2 C GL422/gl423 54 pin vfbga package


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