tl/h/7190 a simplified test set for op amp characterization AN-24 national semiconductor application note 24 m. yamatake april 1986 a simplified test set for op amp characterization introduction the test set described in this paper allows complete quanti- tative characterization of all dc operational amplifier param- eters quickly and with a minimum of additional equipment. the method used is accurate and is equally suitable for lab- oratory or production testefor quantitative readout or for limit testing. as embodied here, the test set is conditioned for testing the lm709 and lm101 amplifiers; however, sim- ple changes discussed in the text will allow testing of any of the generally available operational amplifiers. amplifier parameters are tested over the full range of com- mon mode and power supply voltages with either of two output loads. test set sensitivity and stability are adequate for testing all presently available integrated amplifiers. the paper will be divided into two sections, i.e., a functional description, and a discussion of circuit operation. complete construction information will be given including a layout for the tester circuit boards. functional description the test set operates in one of three basic modes. these are: (1) bias current test; (2) offset voltage, offset current test; and (3) transfer function test. in the first two of these tests, the amplifier under test is exercised throughout its full common mode range. in all three tests, power supply volt- ages for the circuit under test may be set at g 5v, g 10v, g 15v, or g 20v. power supply basic waveforms and dc operating voltages for the test set are derived from a power supply section comprising a posi- tive and a negative rectifier and filter, a test set voltage regulator, a test circuit voltage regulator, and a function gen- erator. the dc supplies will be discussed in the section deal- ing with detailed circuit description. the waveform generator provides three output functions, a g 19v square wave, a b 19v to a 19v pulse with a 1% duty cycle, and a g 5v triangular wave. the square wave is the basic waveform from which both the pulse and triangular wave outputs are derived. the square wave generator is an operational amplifier con- nected as an astable multivibrator. this amplifier provides an output of approximately g 19v at 16 hz. this square wave is used to drive junction fet switches in the test set and to generate the pulse and triangular waveforms. the pulse generator is a monostable multivibrator driven by the output of the square wave generator. this multivibrator is allowed to swing from negative saturation to positive satu- ration on the positive going edge of the square wave input and has a time constant which will provide a duty cycle of approximately 1%. the output is approximately b 19v to a 19v. tl/h/7190 1 figure 1. functional diagram of bias current test circuit c 1995 national semiconductor corporation rrd-b30m115/printed in u. s. a.
the triangular wave generator is a dc stabilized integrator driven by the output of the square wave generator and pro- vides a g 5v output at the square wave frequency, inverted with respect to the square wave. the purpose of these various outputs from the power supply section will be discussed in the functional description. bias current test a functional diagram of the bias current test circuit is shown in figure 1 . the output of the triangular wave generator and the output of the test circuit, respectively, drive the horizon- tal and vertical deflection of an oscilloscope. the device under test, (cascaded with the integrator, a 7 ), is connected in a differential amplifier configuration by r 1 ,r 2 , r 3 , and r 4 . the inputs of this differential amplifier are driven in common from the output of the triangular wave generator through attenuator r 8 and amplifier a 8 . the inputs of the device under test are connected to the feedback network through resistors r 5 and r 6 , shunted by the switch s 5a and s 5b . the feedback network provides a closed loop gain of 1,000 and the integrator time constant serves to reduce noise at the output of the test circuit as well as allowing the output of the device under test to remain near zero volts. the bias current test is accomplished by allowing the device under test to draw input current to one of its inputs through the corresponding input resistor on positive going or nega- tive going halves of the triangular wave generator output. this is accomplished by closing s 5a or s 5b on alternate halves of the triangular wave input. the voltage appearing across the input resistor is equal to input current times the input resistor. this voltage is multiplied by 1,000 by the feedback loop and appears at the integrator output and the vertical input of the oscilloscope. the vertical separaton of the traces representing the two input currents of the amplifi- er under test is equivalent to the total bias current of the amplifier under test. the bias current over the entire common mode range may be examined by setting the output of a 8 equal to the amplifi- er common mode range. a photograph of the bias current oscilloscope display is given as figure 2 . in this figure, the total input current of an amplifier is displayed over a g 10v common mode range with a sensitivity of 100 na per vertical division. tl/h/7190 2 figure 2. bias current and common mode rejection display the bias current display of figure 2 has the added advan- tage that incipient breakdown of the input stage of the de- vice under test at the extremes of the common mode range is easily detected. if either or both the upper or lower trace in the bias current display exhibits curvature near the horizontal ends of the oscilloscope face, then the bias current of that input of the amplifier is shown to be dependent on common mode volt- age. the usual causes of this dependency are low break- down voltage of the differential input stage or current sink. offset voltage, offset current test the offset voltage and offset current tests are performed in the same general way as the bias current test. the only difference is that the switches s 5a and s 5b are closed on the same half-cycle of the triangular wave input. the synchronous operation of s 5a and s 5b forces the ampli- fier under test to draw its input currents through matched high and low input resistors on alternate halves of the input triangular wave. the difference between the voltage drop across the two values of input resistors is proportional to the difference in input current to the two inputs of the amplifier under test and may be measured as the vertical spacing between the two traces appearing on the face of the oscillo- scope. offset voltage is measured as the vertical spacing between the trace corresponding to one of the two values of source resistance and the zero volt baseline. switch s 6 and resis- tor r 9 are a base line chopper whose purpose is to provide a baseline reference which is independent of test set and oscilloscope drift. s 6 is driven from the pulse output of the function generator and has a duty cycle of approximately 1% of the triangular wave. figure 3 is a photograph of the various waveforms present- ed during this test. offset voltage and offset current are displayed at a sensitivity of 1 mv and 100 na per division, respectively, and both parameters are displayed over a common mode range of g 10v. tl/h/7190 3 figure 3. offset voltage, offset current and common mode rejection display 2
tl/h/7190 4 figure 4. functional diagram of transfer function circuit transfer function test a functional diagram of the transfer function test is shown in figure 4 . the output of the triangular wave generator and the output of the circuit under test, respectively, drive the horizontal and vertical inputs of an oscilloscope. the device under test is driven by a g 2.5 mv triangular wave derived from the g 5v output of the triangular wave generator through the attenuators r 11 ,r 12 , and r 1 ,r 3 and through the voltage follower, a 7 . the output of the device under test is fed to the vertical input of an oscilloscope. amplifier a 7 performs a dual function in this test. when s 7 is closed during the bias current test, a voltage is developed across c 1 equal to the amplifier offset voltage multiplied by the gain of the feedback loop. when s 7 is opened in the transfer function test, the charge stored in c 1 continues to provide this offset correction voltage. in addition, a 7 sums the triangular wave test signal with the offset correction volt- age and applies this sum to the input of the amplifier under test through the attenuator r 1 ,r 3 . this input sweeps the input of the amplifier under test g 2.5 mv around its offset voltage. figure 5 is a photograph of the output of the test set during the transfer function test. this figure illustrates the function of amplifier a 7 in adjusting the dc input of the test device so that its transfer function is displayed on the center of the oscilloscope face. the transfer function display is a plot of v in vs v out for an amplifier. this display provides information about three am- plifier parameters: gain, gain linearity, and output swing. tl/h/7190 5 figure 5. transfer function display gain is displayed as the slope, d v out / d v in of the transfer function. gain linearity is indicated change in slope of the v out /v in display as a function of output voltage. this dis- play is particularly useful in detecting crossover distortion in a class b output stage. output swing is measured as the vertical deflection of the transfer function at the horizontal extremes of the display. 3
note: all resistor valves in ohms. all resistors (/4 w, 5% unless specified otherwise. tl/h/7190 6 figure 6. power supply and function generator detailed circuit description power supplies as shown in figure 6 , which is a complete schematic of the power supply and function generator, two power supplies are provided in the test set. one supply provides a fixed g 20v to power the circuitry in the test set; the other pro- vides g 5v to g 20v to power the circuit under test. the test set power supply regulator accepts a 28v from the positive rectifier and filter and provides a 20v through the lm100 positive regulator. amplifier a 1 is powered from the negative rectifier and filter and operates as a unity gain in- verter whose input is a 20v from the positive regulator, and whose output is b 20v. the test circuit power supply is referenced to the a 20v output of the positive regulator through the variable divider comprising r 7 ,r 8 ,r 9 ,r 10 , and r 26 . the output of this divider is a 10v to a 2.5v according to the position of s 2a and is fed to the non-inverting, gain-of-two amplifier, a 2 .a 2 is powered from a 28v and provides a 20v to a 5v at its output. a 3 is a unity gain inverter whose input is the output of a 2 and which is powered from b 28v. the complementa- ry outputs of amplifiers a 2 and a 3 provide dc power to the circuit under test. lm101 amplifiers are used as a 2 and a 3 to allow operation from one ground referenced voltage each and to provide protective current limiting for the device under test. function generator the function generator provides three outputs, a g 19v square wave, a b 19v to a 19v pulse having a 1% duty cycle, and a g 5v triangular wave. the square wave is the 4
basic function from which the pulse and triangular wave are derived, the pulse is referenced to the leading edge of the square wave, and the triangular wave is the inverted and integrated square wave. amplifier a 4 is an astable multivibrator generating a square wave from positive to negative saturation. the amplitude of this square wave is approximately g 19v. the square wave frequency is determined by the ratio of r 18 to r 16 and by the time constant, r 17 c 9 . the operating frequency is stabi- lized against temperature and power regulation effects by regulating the feedback signal with the divider r 19 ,d 5 and d 6 . amplifier a 5 is a monostable multivibrator triggered by the positive going output of a 4 . the pulse width of a 5 is deter- mined by the ratio of r 20 to r 22 and by the time constant r 21 c 10 . the output pulse of a 5 is an approximately 1% duty cycle pulse from approximately b 19v to a 19v. amplifier a 6 is a dc stabilized integrator driven from the am- plitude-regulated output of a 4 . its output is a g 5v triangular wave. the amplitude of the output of a 6 is determined by the square wave voltage developed across d 5 and d 6 and the time constant r adj c 14 . dc stabilization is accomplished by the feedback network r 24 ,r 25 , and c 15 . the ac attenua- tion of this feedback network is high enough so that the integrator action at the square wave frequency is not de- graded. operating frequency of the function generator may be var- ied by adjusting the time constants associated with a 4 ,a 5 , and a 6 in the same ratio. test circuit a complete schematic diagram of the test circuit is shown in figure 7 . the test circuit accepts the outputs of the power supplies and function generator and provides horizontal and vertical outputs for an x-y oscilloscope, which is used as the measurement system. the primary elements of the test circuit are the feedback buffer and integrator, comprising amplifier a 7 and its feed- back network c 16 ,r 31 ,r 32 , and c 17 , and the differential amplifier network, comprising the device under test and the feedback network r 40 ,r 43 ,r 44 , and r 52 . the remainder of the test circuit provides the proper conditioning for the de- vice under test and scaling for the oscilloscope, on which the test results are displayed. the amplifier a 8 provides a variable amplitude source of common mode signal to exercise the amplifier under test over its common mode range. this amplifier is connected as a non-inverting gain-of-3.6 amplifier and receives its input from the triangular wave generator. potentiometer r 37 al- lows the output of this amplifier to be varied from g 0 volts to g 18 volts. the output of this amplifier drives the differen- tial input resistors, r 43 and r 44 , for the device under test. the resistors r 46 and r 47 are current sensing resistors which sense the input current of the device under test. these resistors are switched into the circuit in the proper sequence by the field effect transistors q 6 and q 7 .q 6 and q 7 are driven from the square wave output of the function generator by the pnp pair, q 10 and q 11 , and the npn pair, q 8 and q 9 . switch sections s 1b and s 1c select the switch- ing sequence for q 8 and q 9 and hence for q 6 and q 7 .in the bias current test, the fet drivers, q 8 and q 9 , are switched by out of phase signals from q 10 and q 11 . this opens the fet switches q 6 and q 7 on alternate half cycles of the square wave output of the function generator. during the offset voltage, offset current test, the fet drivers are operated synchronously from the output of q 11 . during the transfer function test, q 6 and q 7 are switched on continu- ously by turning off q 11 .r 42 and r 45 maintain the gates of the fet switches at zero gate to source voltage for maxi- mum conductance during their on cycle. since the sources of these switches are at the common mode input voltage of the device under test, these resistors are connected to the output of the common mode driver amplifier, a 8 . the input for the integrator-feedback buffer, a 7 , is selected by the fet switches q 4 and q 5 . during the bias current and offset voltage offset current tests, a 7 is connected as an integrator and receives its input from the output of the de- vice under test. the output of a 7 drives the feedback resis- tor, r 40 . in this connection, the integrator holds the output of the device under test near ground and serves to amplify the voltages corresponding to bias current, offset current, and offset voltage by a factor of 1,000 before presenting them to the measurement system. fet switches q 4 and q 5 are turned on by switch section s 1b during these tests. fet switches q 4 and q 5 are turned off during the transfer function test. this disconnects a 7 from the output of the device under test and changes it from an integrator to a non-inverting unity gain amplifier driven from the triangular wave output of the function generator through the attenua- tor r 33 and r 34 and switch section s 1a . in this connection, amplifier a 7 serves two functions; first, to provide an offset voltage correction to the input of the device under test and, second, to drive the input of the device under test with a g 2.5 mv triangular wave centered about the offset voltage. during this test, the common mode driver amplifier is dis- abled by switch section s 1a and the vertical input of the measurement oscilloscope is transferred from the output of the integrator-buffer, a 7 , to the output of the device under test by switch section s 1d .s 2a allows supply voltages for the device under test to be set at g 5, g 10, g 15, or g 20v. s 2b changes the vertical scale factor for the measurement oscilloscope to maintain optimum vertical deflection for the particular power supply voltage used. s 4 is a momentary contact pushbutton switch which is used to change the load on the device under test from 10 k x to2k x . a delay must be provided when switching from the input tests to the transfer function tests. the purpose of this delay is to disable the integrator function of a 7 before driving it with the triangular wave. if this is not done, the offset cor- rection voltage, stored on c 16 , will be lost. this delay be- tween opening fet switch q 4 , and switch q 5 , is provided by the rc filter, r 35 and c 19 . resistor r 41 and diodes d 7 and d 8 are provided to control the integrator when no test device is present, or when a faulty test device is inserted. r 41 provides a dc feedback path in the absence of a test device and resets the integra- tor to zero. diodes d 7 and d 8 clamp the input to the integra- tor to approximately g .7 volts when a faulty device is inserted. fet switch q 1 and resistor r 28 provide a ground reference at the beginning of the 50-ohm-source, offset-voltage trace. this trace provides a ground reference which is indepen- dent of instrument or oscilloscope calibration. the gate of q 1 is driven by the output of monostable multivibrator a 5 , and shorts the vertical oscilloscope drive signal to ground during the time that a 5 output is positive. switch s 3 ,r 27 , and r 28 provide a 5x scale increase during input parameter tests to allow measurement of amplifiers with large offset voltage, offset current, or bias current. switch s 5 allows amplifier compensation to be changed for 101 or 709 type amplifiers. 5
matched for on resistance within 200 x select for bv gs l 45v note: all resistors 1/4w, 5% unless specified otherwise * 2n3819 tl/h/7190 7 figure 7. test circuit calibration calibration of the test system is relatively simple and re- quires only two adjustments. first, the output of the main regulator is set up for 20v. then, the triangular wave gener- ator is adjusted to provide g 5v output by selecting r adj . this sets the horizontal sweep for the x-y oscilloscope used as the measurement system. the oscilloscope is then set up for 1v/division vertical and for a full 10 division hori- zontal sweep. scale factors for the three test positions are: 1. bias current display ( figure 2 ) i bias total 100 na/div. vertical common mode voltage variable horizontal 2. offset voltage-offset current ( figure 3 ) i offset 100 na/div. vertical v offset 1 mv/div. vertical common mode voltage variable horizontal 3. transfer function ( figure 5 ) v in 0.5 mv/div. v out 5v/div. @ v s g 20v 5v/div. @ v s g 15v 2v/div. @ v s g 10v 1v/div. @ v s g 5v gain e d v out d v in construction test set construction is simplified through the use of inte- grated circuits and etched circuit layout. figure 8 gives photographs of the completed tester. figure 9 shows the parts location for the components on the circuit board layout of figure 10 . an attempt should be made to 6
adhere to this layout to insure that parasitic coupling be- tween elements will not cause oscillations or give calibration problems. table i is a listing of special components which are needed to fit the physical layout given for the tester. table i. partial parts list t 1 triad f-90x s 1 centralab pa2003 non-shorting s 2 centralab pa2015 non-shorting s 3 ,s 4 grayhill 30-1 series 30 subminiature pushbutton switch s 5 ,s 6 alcoswitch mst-105d spdt conclusions a semi-automatic test system has been described which will completely test the important operational amplifier parame- ters over the full power supply and common mode ranges. the system is simple, inexpensive, easily calibrated, and is equally suitable for engineering or quality assurance usage. tl/h/7190 8 figure 8a. bottom of test set 7
tl/h/7190 9 figure 8b. front panel tl/h/7190 10 figure 8c. jacks 8
tl/h/7190 11 figure 9. component location, top view 9
AN-24 a simplified test set for op amp characterization tl/h/7190 12 figure 10. circuit board layout life support policy national's products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of national semiconductor corporation. as used herein: 1. life support devices or systems are devices or 2. a critical component is any component of a life systems which, (a) are intended for surgical implant support device or system whose failure to perform can into the body, or (b) support or sustain life, and whose be reasonably expected to cause the failure of the life failure to perform, when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can effectiveness. be reasonably expected to result in a significant injury to the user. national semiconductor national semiconductor national semiconductor national semiconductor corporation europe hong kong ltd. japan ltd. 1111 west bardin road fax: ( a 49) 0-180-530 85 86 13th floor, straight block, tel: 81-043-299-2309 arlington, tx 76017 email: cnjwge @ tevm2.nsc.com ocean centre, 5 canton rd. fax: 81-043-299-2408 tel: 1(800) 272-9959 deutsch tel: ( a 49) 0-180-530 85 85 tsimshatsui, kowloon fax: 1(800) 737-7018 english tel: ( a 49) 0-180-532 78 32 hong kong fran 3 ais tel: ( a 49) 0-180-532 93 58 tel: (852) 2737-1600 italiano tel: ( a 49) 0-180-534 16 80 fax: (852) 2736-9960 national does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and national reserves the right at any time without notice to change said circuitry and specifications.
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