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  white microelectronics ? phoenix, az ? (602) 437-1520 7 flash modules 1 features n access times of 70, 90, 120, 150ns n packaging ? 116 lead, 40mm square, hermetic cqfp (package 504) n 100,000 erase/program cycles minimum (0 c to 70 c) n sector architecture ? 8 equal size sectors of 64kbytes each ? any combination of sectors can be concurrently erased. also supports full chip erase n organized as 512kx64, user configurable as 1mx32, 2mx16, or 4mx8. n commercial, industrial and military temperature ranges n 5 volt programming. 5v 10% supply. n low power cmos, 6.5ma standby n embedded erase and program algorithms n ttl compatible inputs and cmos outputs n built-in decoupling caps for low noise operation n page program operation and internal program control time n weight WF512K64-XG4WX5 - 20 grams typical * this data sheet describes a product under development, not fully characterized, and is subject to change without notice. note: programming information available upon request. WF512K64-XG4WX5 fig. 1 pin configuration for WF512K64-XG4WX5 1 512k x 8 8 i/o 0-7 cs 1 2 512k x 8 8 i/o 8-15 cs 2 8 i/o... cs x 8 512k x 8 8 i/o 56-63 cs 8 a 0-18 oe we 1 we 2 we x we 8 ...... block diagram 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 116 115 114 113 112 111 110 109 108 107 106 105 104 103 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 gnd i/o 8 i/o 9 i/o 10 i/o 11 i/o 12 i/o 13 i/o 14 i/o 15 gnd i/o 16 i/o 17 i/o 18 i/o 19 i/o 20 i/o 21 i/o 22 i/o 23 gnd i/o 24 i/o 25 i/o 26 i/o 27 i/o 28 i/o 29 i/o 30 i/o 31 v cc we 3 cs 3 nc nc a 18 a 17 a 16 a 15 we 4 cs 4 oe cs 5 we 5 a 14 a 13 a 12 a 11 a 10 nc cs 6 we 6 v cc i/o 32 i/o 33 i/o 34 i/o 60 i/o 59 i/o 58 i/o 57 i/o 56 gnd i/o 55 i/o 54 i/o 53 i/o 52 i/o 51 i/o 50 i/o 49 i/o 48 gnd i/o 47 i/o 46 i/o 45 i/o 44 i/o 43 i/o 42 i/o 41 i/o 40 gnd i/o 39 i/o 38 i/o 37 i/o 36 i/o 35 i/o 2 i/o 1 i/o 0 v cc we 2 cs 2 nc a 0 a 1 a 2 a 3 a 4 we 1 cs 1 nc cs 8 we 8 a 5 a 6 a 7 a 8 a 9 nc cs 7 we 7 v cc i/o 63 i/o 62 i/o 61 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 top view i/o 0-63 data inputs/outputs a 0-18 address inputs we 1-8 write enables cs 1-8 chip selects oe output enable v cc power supply gnd ground nc not connected pin description 512kx64 5v flash module preliminary* september 1998
2 white microelectronics ? phoenix, az ? (602) 437-1520 7 flash modules parameter symbol conditions min max unit input leakage current i li v cc = 5.5, v in = gnd to v cc 10 m a output leakage current i lox32 v cc = 5.5, v in = gnd to v cc 10 m a v cc active current for read (1) i cc1 cs = v il , oe = v ih , f = 5mhz 380 ma v cc active current for program or erase (2) i cc2 cs = v il , oe = v ih 480 ma v cc standby current i cc4 v cc = 5.5, cs = v ih , f = 5mhz 13 ma v cc static current i cc3 v cc = 5.5, cs = v ih 1.2 ma output low voltage v o l i ol = 8.0 ma, v cc = 4.5 0.45 v output high voltage v oh1 i oh = -2.5 ma, v cc = 4.5 0.85 x v cc v low v cc lock-out voltage v lko 3.2 4.2 v WF512K64-XG4WX5 absolute maximum ratings notes: 1. stresses above the absolute maximum rating may cause permanent damage to the device. extended operation at the maximum levels may degrade performance and affect reliability. 2. minimum dc voltage on input or i/o pins is -0.5v. during voltage transitions, inputs may overshoot v ss to -2.0 v for periods of up to 20ns. maximum dc voltage on output and i/o pins is v cc + 0.5v. during voltage transitions, outputs may overshoot to vcc + 2.0 v for periods of up to 20ns. 3. minimum dc input voltage on a 9 pin is -0.5v. during voltage transitions, a 9 may overshoot vss to -2v for periods of up to 20ns. maximum dc input voltage on a 9 is +13.5v which may overshoot to 14.0 v for periods up to 20ns. dc characteristics - cmos compatible (v cc = 5.0v, v ss = 0v, t a = -55 c to +125 c) parameter unit operating temperature -55 to +125 c supply voltage range (v cc ) -2.0 to +7.0 v signal voltage range (any pin except a9) (2) -2.0 to +7.0 v storage temperature range -65 to +150 c lead temperature (soldering, 10 seconds) +300 c data retention (mil temp) 10 years endurance (write/erase cycles) (mil temp) 10,000 cycles min. a 9 voltage for sector protect (v id ) (3) -2.0 to +14.0 v notes: 1. the i cc current listed includes both the dc operating current and the frequency dependent component (at 5 mhz). the frequency componen t typically is less than 2 ma/mhz, with oe at v ih . 2. i cc active while embedded algorithm (program or erase) is in progress. 3. dc test conditions: v il = 0.3v, v ih = v cc - 0.3v recommended operating conditions parameter symbol min max unit supply voltage v cc 4.5 5.5 v input high voltage v ih 2.0 v cc + 0.5 v input low voltage v il -0.5 +0.8 v operating temp. (mil.) t a -55 +125 c operating temp. (ind.) t a -40 +85 c a 9 voltage for sector protect v id 11.5 12.5 v capacitance (t a = +25 c) parameter symbol conditions max unit oe capacitance c oe v in = 0 v, f = 1.0 mhz 100 pf we capacitance c we v in = 0 v, f = 1.0 mhz 20 pf cs capacitance c cs v in = 0 v, f = 1.0 mhz 20 pf data i/o capacitance c i/o v i/o = 0 v, f = 1.0 mhz 20 pf address input capacitance c ad v in = 0 v, f = 1.0 mhz 100 pf this parameter is guaranteed by design but not tested.
white microelectronics ? phoenix, az ? (602) 437-1520 7 flash modules 3 WF512K64-XG4WX5 ac characteristics C write/erase/program operations,cs controlled (v cc = 5.0v, v ss = 0v, t a = -55 c to +125 c) fig. 2 ac test circuit ac test conditions notes: v z is programmable from -2v to +7v. i ol & i oh programmable from 0 to 16ma. tester impedance z 0 = 75 w . v z is typically the midpoint of v oh and v ol . i ol & i oh are adjusted to simulate a typical resistive load circuit. ate tester includes jig capacitance. parameter typ unit input pulse levels v il = 0, v ih = 3.0 v input rise and fall 5 ns input and output reference level 1.5 v output timing reference level 1.5 v i current source d.u.t. c = 50 pf eff i ol v 1.5v (bipolar supply) z current source oh parameter symbol -70 -90 -120 -150 unit min max min max min max write cycle time t avav t wc 70 90 120 150 ns write enable setup time t wlel t ws 0000ns chip select pulse width t eleh t cp 45 45 50 50 ns address setup time t avel t as 0000ns data setup time t dveh t ds 45 45 50 50 ns data hold time t ehdx t dh 0000ns address hold time t elax t ah 45 45 50 50 ns chip select pulse width high t ehel t cph 20 20 20 20 ns duration of byte programming operation t whwh1 16 16 16 16 m s chip and sector erase time t whwh2 30 30 30 30 sec read recovery time t ghel 0000ns chip programming time 50 50 50 50 sec chip erase time 120 120 120 120 sec
4 white microelectronics ? phoenix, az ? (602) 437-1520 7 flash modules ac characteristics C write/erase/program operations, we controlled (v cc = 5.0v, t a = -55 c to +125 c) WF512K64-XG4WX5 ac characteristics C read only operations (v cc = 5.0v, t a = -55 c to +125 c) parameter symbol -70 -90 -120 -150 unit min max min max min max min max read cycle time t avav t rc 70 90 120 150 ns address access time t avqv t acc 70 90 120 150 ns chip select access time t elqv t ce 70 90 120 150 ns output enable to output valid t glqv t oe 35 35 50 55 ns chip select to output high z (1) t ehqz t df 20 20 30 35 ns output enable high to output high z (1) t ghqz t df 20 20 30 35 ns output hold from address, cs or oe change, t axqx t oh 0000ns whichever is first 1. guaranteed by design, but not tested parameter symbol -70 -90 -120 -150 unit min max min max min max min max write cycle time t avav t wc 70 90 120 150 ns chip select setup time t elwl t cs 0000ns write enable pulse width t wlwh t wp 45 45 50 50 ns address setup time t avwh t as 0000ns data setup time t dvwh t ds 45 45 50 50 ns data hold time t whdx t dh 0000ns address hold time t whax t ah 45 45 50 50 ns write enable pulse width high t whwl t wph 20 20 20 20 ns duration of byte programming operation t whwh1 16 16 16 16 m s sector erase time t whwh2 30 30 30 30 sec read recovery time before write t ghwl 0000ns v cc set-up time t vcs 50 50 50 50 m s chip programming time 50 50 50 50 sec output enable setup time t oes 0000ns output enable hold time (1) t oeh 10 10 10 10 ns chip erase time 120 120 120 120 sec 1. for toggle and data polling.
white microelectronics ? phoenix, az ? (602) 437-1520 7 flash modules 5 WF512K64-XG4WX5 fig. 3 ac waveforms for read operations addresses cs oe we outputs high z addresses stable t oe t rc output valid t ce t acc t oh high z t df
6 white microelectronics ? phoenix, az ? (602) 437-1520 7 flash modules WF512K64-XG4WX5 notes: 1. pa is the address of the memory location to be programmed. 2. pd is the data to be programmed at byte address. 3. d 7 is the output of the complement of the data written to each chip. 4. d out is the output of the data written to the device. 5. figure indicates last two bus cycles of four bus cycle sequence. fig. 4 write/erase/program operation, we controlled addresses cs oe we data 5.0 v 5555h pa pa t wc t cs pd d 7 d out t ah t wph t dh t ds data polling t as t rc t wp a0h t oe t df t oh t ce t ghwl t whwh1
white microelectronics ? phoenix, az ? (602) 437-1520 7 flash modules 7 WF512K64-XG4WX5 note: 1. sa is the sector address for sector erase. addresses cs oe we data v cc 5555h 2aaah 2aaah sa 5555h 5555h t wp t cs t vcs 10h/30h 55h 80h 55h aah aah t ah t as t ghwl t wph t dh t ds fig. 5 ac waveforms chip/sector erase operations
8 white microelectronics ? phoenix, az ? (602) 437-1520 7 flash modules fig. 6 ac waveforms for data polling during embedded algorithm operations WF512K64-XG4WX5 cs oe we t oe t ce t ch t oh d7 d7 = valid data high z d0-d6 = invalid d0-d7 valid data t df d7 d0-d6 t oeh t whwh 1 or 2 t oe data
white microelectronics ? phoenix, az ? (602) 437-1520 7 flash modules 9 notes: 1. pa represents the address of the memory location to be programmed. 2. pd represents the data to be programmed at byte address. 3. d 7 is the output of the complement of the data written to each chip. 4. d out is the output of the data written to the device. 5. figure indicates the last two bus cycles of a four bus cycle sequence. addresses we oe cs data 5.0 v 5555h pa pa t wc t ws pd d 7 d out t ah t cph t cp t dh t ds data polling t as t ghel a0h t whwh1 fig. 7 alternate cs controlled programming operation timings WF512K64-XG4WX5
10 white microelectronics ? phoenix, az ? (602) 437-1520 7 flash modules WF512K64-XG4WX5 v pp programming voltage 5 = 5v device grade: m = military screened -55 c to +125 c i = industrial -40 c to +85 c c = commercial 0 to + 70 c package type: g4w = 116 lead 40mm ceramic quad flat pack, cqfp (package 504) access time (ns) organization, 512k x 64 user configurable as 1m x 32, 2m x 16 or 4m x 8 flash prom white microelectronics ordering information package 504: 116 lead, ceramic quad flat pack, cqfp (g4w) all linear dimensions are millimeters and parenthetically in inches 38 (1.50) ref 4 places 0.38 (0.015) 0.08 (0.003) 68 places 1.27 (0.050) ref 5.1 (0.200) 0.25 (0.010) 4 places 39.6 (1.56) 0.38 (0.015) sq 12.7 (0.500) 0.5 (0.020) 4 places 5.1 (0.200) max 0.25 (0.010) 0.05 (0.002) 1.27 (0.050) 0.1 (0.005) pin 1 identifier pin 1 w f 512k64 - xxx g4w x 5


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