LS505 data sheet
features ? 72 db typical gain ? 0.2 to 2.0 ma of transducer current adjustment ? 43 db range of feedback volume control ? 1.0 to 1.6 v supply operating range ? schottky diodes provide symmetrical peak clipping ? requires only 4 external parts for operation standard packaging ? 8 pin minipac ? 8 pin micropac ? 8 pin plid ? ? 8 pin slt ? chip (56 x 55 mils) high gain class a amplifier with peak clipping description the LS505 is a low voltage, monolithic integrated circuit amplifier comprised of an operational amplifier driving a single transistor class a output stage with open collector. also included are a pair of complementary schottky diodes which provide the capability for symmetrical peak clipping in a feedback configuration. an internal negative feedback loop ensures a stable operating point for the output stage over the designed operating voltage. this also permits trimming of the output current with the use of a single external resistor. the input stage and microphone are biased by an internal 2.2 k w decoupling resistor to increase battery line signal rejection. revision date: january 1996 100 - + 7 4
33k 200 5 6 i/p gnd r vc 8
1 2.2k v b
mpo v mic 3 o/p r e
2 block diagram gennum corporation p.o. box 489, stn a, burlington, ontario, canada l7r 3y3 tel. (905) 632-2996 fax: (905) 632-5946 japan branch: a-302, m i yamae villa ge, 2C10C42 m i yamae, suginami Cku tokyo 168, japan tel. (03) 3334-7700 fax (03) 3247-8839 document no. 500 - 20 - 11 all resistors in ohms, all capacitors in farads unless otherwise stated.
500 - 20 - 11 2 parameter symbol condition min typ max units gain a cl v o = 0.707 v rms 68 72 76 db temperature coefficient of gain h a - 0.07 - db/ o c amplifier current i amp 180 210 280 m a temperature coefficient of current h i - -0.002 - ma/ o c transducer current i trans 1.3 1.5 1.9 ma total harmonic distortion thd v o = 0.707 v rms -25 % input referred noise irn nfb 0.2 to 10 khz at 12 db/oct - 1.2 2.0 m v rms battery resistance stability r b = 22 w --22 w volume control range r vc = 100 to 100.1 k w s1 open 36 43 - db input impedance (pin 6) r in -27- k w frequency response (-3 db) low - 100 - hz high - 5k - hz maximum output s2 closed 0.125 0.19 0.275 v rms gain dependence of rb - 0.16 - db/ w emitter bias voltage (pin 2) v re - 42.5 - mv absolute maximum ratings parameter value & units supply voltage 3 v power dissipation 25 mw operating temperature -10 to +40 c storage temperature -20 to +70 c caution class 1 esd sensitivity 1 4 5 8 r e i/p gnd v mic mpo o/p v b pin connection r vc electrical characteristics conditions: temperature 25 o c, supply voltage v b = 1.55 vdc all switches and parameters remain as shown in test circuit unless stated in condition column
500 - 20 - 11 3 + r s
3.9k 100 - + 1 5 4
8
33k 200 r e
33 2.2k 6 3 2 7 100 100k s1 10 + 0.033 10 + 10 s2 v b = 1.5 vdc
r b = 4.7
1k i l v o all resistors in ohms, all capacitors in m f unless otherwise stated fig. 1 test circuit all resistors in ohms, all capacitors in farads unless otherwise stated u.s. patent no. 4,034,306 - patented in other countries fig. 2 functional schematic mpo output v b r e gnd 200 33k volume
control input 100 v mic 30k 2.2k 27k 6 5 3 2 4 7 8 1
500 - 20 - 11 4 r
e 0.033 v
b 10 2 3 =1.35vdc +
100 8 5 6 7 1k 10 +
4 LS505
33k +
LS505 1 -
200 r vc 2.2k c mpo 56 r mpo 100k 10k 1.0 all resistors in ohms, all capacitors in farads unless otherwise stated fig. 3 typical hearing aid applications 47 46 45 44 43 42 41 40 10 50 100 500 1k 5k 10k fig. 4 volume control range vs r e external resistance ( w ) volume control range (db) fig. 5 gm vs r e w w gm ( ) w 7 6 5 4 3 2 1 0 10 50 100 500 1k 5k 10k external resistance r e ( w ) fig. 6 load current vs external resistance 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 load current i l (ma) 10 50 100 500 1k 5kk 10k r e w 130 120 110 100 90 80 fig. 7 i/o characteristics 30 40 50 60 70 80 90 100 110 diodes disconnected input (dbspl) output (dbspl)
500 - 20 - 11 5 fig. 8 relative voltage gain vs volume control resistance relative voltage gain (db) 1 10 100 battery resistance r b ( w ) r vc ( w ) fig. 9 relative voltage gain vs battery resistance 250 200 150 100 50 0 amplifier current ( m a) 0.8 1.0 1.2 1.4 1.6 1.8 supply voltage (v) fig. 10 amplifier current vs supply voltage 2.5 2.0 1.5 1.0 0.5 0 load current i l (ma) 0.8 1.0 1.2 1.4 1.6 1.8 supply voltage (v) fig. 11 load current vs supply voltage 0.8 1.0 1.2 1.4 1.6 1.8 supply voltage (v) relative voltage gain (db) fig. 12 gain vs supply voltage 74 72 70 68 66 64 0 -10 -20 -30 -40 -50 10 100 1k 10k gain (db) 6 5 4 3 2 1 gennum corporation assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement. ? copyright october 1977 gennum corporation. all rights reserved. printed in canada. revision notes au bump removed
500 - 20 - 11 6
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