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A8439-ds, rev. 1 the A8439 is a highly integrated ic that charges photoflash capacitors for digital and film cameras. an integrated mosfet switch drives the transformer in a flyback topology. it also features an integrated igbt driver that facilitates the flash discharge function and saves board space. the charge pin enables the A8439 and starts the charging of the output capacitor. when the designated output voltage is reached, the A8439 stops the charg- ing until the charge pin is toggled again. pulling the charge pin low stops the charging. the d o n e pin is an open-drain indicator of when the designated output voltage is reached. the peak current limit can be adjusted to eight dif- ferent levels between 270 ma to 1.4 a, by clocking the charge pin. this allows the user to operate the flash even at low battery voltages. the A8439 can be used with two alkaline/nimh/ nicad or one single-cell li+ battery connected to the transformer primary. connect the vin pin to a 3.0 to 5.5 v supply, which can be either the system rail or the li+ battery, if used. the A8439 is available in a very low profile (0.75 mm) 10-terminal 33 mm mlp/tdfn package, making it ideal for space-constrained applications. it is lead (pb) free, with 100% matte-tin leadframe plating. photoflash capacitor charger with igbt driver and refresh A8439 package ej: mlp/tdfn, 3 3 mm 0.75 mm nominal height features applications power with 1 li+ or 2 alkaline/nimh/nicad batteries adjustable output voltage autorefresh >75% efficiency eight-level, digitally-programmable current limit charge complete indication integrated igbt driver with trigger no primary-side schottky diode needed low-profile package (0.75 mm nominal height) digital camera flash film camera flash cell phone flash emergency strobe light approximate scale 1:1 figure 1. typical circuit with separate power supply to transformer figure 2. typical circuit with single power supply to igbt gate cout v out d1 t1 r1 r2 r3 one li+ battery or 3.0 to 5.5 v v batt c2 4.7 f c3 c1 0.1 f 100 k r4 A8439 charge gnd fb sw trigger igbtdrv done vin + to igbt gate cout v out d1 t1 r1 r2 r3 100 k r4 v batt two alkaline/nimh/nicad or one li+ battery or 1.5 to 5.5 v v bias 3.0to5.5v c2 4.7 f c1 0.1 f A8439 charge gnd fb sw trigger igbtdrv done vin c3
A8439-ds, rev. 1 worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. photoflash capacitor charger with igbt driver A8439 2 functional block diagram vin v in s w charge gnd cmp2 done fb q i lim decoder adjustable reference igbtdrv trigger 1.2 v 40 v dmos q q set clr s r cmp3 cmp1 1.2 v i lim comparator dcm comparator h l triggered timer control logic enable 18 s terminal list table ab so lute max i mum rat ings 10 9 8 7 6 nc fb done trigger sw 1 2 3 4 5 nc igbtdrv vin gnd charge device pin-out diagram r ja = 45 c/w, on a 4-layer board. additional information is available on the allegro web site. package thermal characteristics number name function 1,10 nc no connection 2 igbtdrv igbt driver gate drive output 3 vin power supply input 4 gnd device ground 5 charge charging enable and iswlim code input; set to low to power-off the A8439 6sw switch, internally connected to the dmos power fet drain 7 trigger strobe signal input 8 d o n e open drain, when pulled low by internal mosfet, indicates that charging target level has been reached 9 fb output voltage feedback input or output voltage sw pin, v sw ............................................................ ?0.3 to 40 v igbtdrv pin, v igbtdrv .............................. ?0.3 to v in + 0.3 v fb pin, v fb ............................................................... ?0.3 to v in all other pins, v x ...................................................... ?0.3 to 7 v operating ambient temperature, t a ................................ ?40c to 85c maximum junction temperature, t j(max) ........................................ 150c storage temperature, t s .............................................. ?55c to 150c
A8439-ds, rev. 1 worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. photoflash capacitor charger with igbt driver A8439 3 electrical characteristics typical values at t a = 25c and v in = 3.3 v (unless otherwise noted) characteristics symbol test conditions min. typ. max. units supply voltage* v in 3 ? 5.5 v supply current i in charging ? 1.5 ? ma charging done / refresh monitoring ? 300 600 a shutdown (v charge = 0 v, v trigger = 0 v) ? 0.01 1 a primary side current limit (ilim clock input at charge pin) i swlim1 1.2 1.4 1.6 a i swlim2 ? 1.2 ? a i swlim3 ? 1.0 ? a i swlim4 ? 0.86 ? a i swlim5 ? 0.7 ? a i swlim6 ? 0.55 ? a i swlim7 ? 0.4 ? a i swlim8 ? 0.27 ? a sw on resistance r ds(on)sw v in = 3.3 v, i d = 800 ma, t a = 25c ? 0.27 ? sw leakage current* i swlkg v sw = 35 v ? ? 1 a sw maximum off-time t off(max) ?18? s charge input current i charge v charge = v in ??1 a charge input voltage* v charge(h) 2??v v charge(l) ? ? 0.8 v ilim clock high time at charge pin t ilim(h) 0.2 ? ? s ilim clock low time at charge pin t ilim(l) 0.2 ? ? s total ilim setup time t ilim(su) ?60? s d o n e output leakage current* i donelkg ??1 a d o n e output low voltage* v done(l) 32 a into d o n e pin ? ? 100 mv fb voltage threshold* v fb 1.187 1.205 1.223 v fb input current i fb v fb = 1.205 v ? ?120 ? na uvlo enable threshold v uvlo v in rising 2.55 2.65 2.75 v uvlo hysteresis v uvlohys ? 150 ? mv igbt driver igbtdrv on resistance to vin r ds(on)i-v v in = 3.3 v, v igbtdrv = 1.5 v, v trigger = v in ?5? igbtdrv on resistance to gnd r ds(on)i-g v in = 3.3 v, v igbtdrv = 1.5 v, v trigger = 0 v ? 6 ? trigger input current i trigger v trigger = v in ??1 a trigger input voltage* v trigger(h) 2??v v trigger(l) ? ? 0.8 v propagation delay, rising t dr r gate =12 , c load = 6500 pf, v in = 3.3 v ? 30 ? ns propagation delay, falling t df r gate =12 , c load = 6500 pf, v in = 3.3 v ? 30 ? ns output rise time t r r gate =12 , c load = 6500 pf, v in = 3.3 v ? 70 ? ns output fall time t f r gate =12 , c load = 6500 pf, v in = 3.3 v ? 70 ? ns *guaranteed by design and characterization over operating temperature range, ?40c to 85c.
A8439-ds, rev. 1 worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. photoflash capacitor charger with igbt driver A8439 4 performance characteristics tests performed using application circuit shown in figure 8 with i swlim set to 1.4a (single rising edge on charge pin), unless otherwise noted charging waveforms symbol parameter units/division c1 v out 50 v c4 i batt(avg) 200 ma t time 1 s conditions parameter value v batt 2.5 v v bias 3.3 v c out 100 f symbol parameter units/division c1 v out 50 v c4 i batt(avg) 200 ma t time 1 s conditions parameter value v batt 3.6 v v bias 3.3 v c out 100 f symbol parameter units/division c1 v out 50 v c4 i batt(avg) 200 ma t time 1 s conditions parameter value v batt 4.2 v v bias 3.3 v c out 100 f t i batt v out c4 c1 t i batt v out c4 c1 t i batt v out c4 c1
A8439-ds, rev. 1 worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. photoflash capacitor charger with igbt driver A8439 5 v out (v) efficiency (%) v batt (v) charge time (s) 100 150 200 250 300 350 40 50 60 80 70 90 2.0 2.5 3.0 3.5 4.0 4.5 5.0 v out = 300 v v out = 320 v 5.5 6.0 v batt = 4.2 v v batt = 5.0 v 2 4 3 5 7 6 8 v batt = 3.0 v 2 3 4 5 6 7 8 2 2.5 3 3.5 4 4.5 5 5.5 6 v batt (v) charge time (s) v out = 300 v v out = 320 v charge time v bias = 3.3 v, c out = 100 f connect vbatt to a separate power supply efficiency v batt = v bias , t a = 25c typical switching waveform performance characteristics, continued tests performed using application circuit shown in figure 8 with i swlim set to 1.4a (single rising edge on charge pin), unless otherwise noted igbtdrv trigger t dr t r t df t f 50% 10% 90% 50% 10% 90% igbt drie timing definition symbol parameter unitsdiision c1 v out 50 v c2 v sw 10 v c3 v batt 5 v c4 i primary 500 ma t time 2 s conditions parameter value v out 300 v v batt v in t v batt v out c4 c1 c3 c2 v sw i primary
A8439-ds, rev. 1 worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. photoflash capacitor charger with igbt driver A8439 6 rising signal igbt drive performance symbol parameter units/division c2 v igbtdrv 1 v c3 v trigger 1 v t time 50 ns conditions parameter value t dr 22.881 ns t r 63.125 ns c load 6800 pf r gate 12 c3 c2 t v igbtdrv v trigger falling signal symbol parameter units/division c2 v igbtdrv 1 v c3 v trigger 1 v t time 50 ns conditions parameter value t df 27.427 ns t f 65.529 ns c load 6800 pf r gate 12 t r v igbtdrv v trigger t c3 c2 t f performance characteristics, continued tests performed using application circuit shown in figure 8 with i swlim set to 1.4a (single rising edge on charge pin), unless otherwise noted
A8439-ds, rev. 1 worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. photoflash capacitor charger with igbt driver A8439 7 functional description overview the A8439 is a photoflash capacitor charger control ic with adjustable input current limiting and automatic refresh. it also integrates an igbt driver for strobe operation of the flash tube, dramatically saving board space in comparison to discrete solu- tions for strobe flash operation. the control logic is shown in the functional block diagram. the charging operation of the A8439 is started by a low-to-high signal on the charge pin. the primary peak current is set by input clock signals from the charge pin. when a charging cycle is initiated, the transformer primary side current, i primary , ramps up linearly at a rate determined by the combined effect of the battery voltage, v batt , and the primary side inductance, l primary . when i primary reaches the current limit, i swlim , the internal mosfet is turned off immediately, allowing the energy to be pushed into the photoflash capacitor, c out , from the secondary winding. the secondary side current drops linearly as c out charges. the recharging cycle starts again, either after the transformer flux is reset, or after a predetermined time period, t off(max) (18 s), whichever occurs first. while the internal mosfet switch is turned off, the output voltage, v out , is sensed by a resistor string, r 1 through r 3 , con- nected between the anode of the output diode, d1, and ground. this resistor string forms a voltage divider that feeds back to the fb pin. the resistors must be sized to achieve a desired output voltage level based on a typical value of 1.205 v at the fb pin. as soon as v out reaches the desired value, the charging process is terminated. the A8439 automatically starts a new charging cycle when the internal voltage sensing circuit detects a 10 % drop in the output voltage. toggling the charge pin can also start a refresh operation. auto refresh the A8439 features autorefresh when the feedback resistor network is connected at the output. autorefresh initiates when the output voltage drops to 90 % of the set stop voltage of the resistor network. the operation is shown in figure 3. input current limiting the peak current limit can be adjusted to eight different levels, from 270 ma to 1.4 a, by clocking the charge pin. an internal digital circuit decodes the input clock signals to a counter, which sets the charging time. this flexible scheme allows the user to operate the flash circuit according to different battery input voltages. the battery life can be effectively extended by setting a lower current limit at low battery voltages. figure 4 shows the ilim clock timing scheme protocol. the total ilim setup time, t ilim(su) , denotes the time needed for the decoder circuit to receive ilim inputs and set i swlim , and has a typical duration of 60 s. figure 3. autorefresh waveform of A8439. feedback resistor network is connected at the output.
A8439-ds, rev. 1 worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. photoflash capacitor charger with igbt driver A8439 8 figure 5 shows the timing definition of the primary current limiting circuit. at the end of the setup period, t ilim(su) , primary current starts to ramp up to the set i swim . the i swlim setting remains in effect as long as the charge pin is high. to reset the ilim counter, pull the charge pin low before clocking in the new setting. after the first start-up or an ilim counter reset, each new current limit can be set by sending a burst of pulses to the charge pin. the first rising edge starts the ilim counter, and up to 8 rising edges will be counted to set the i swlim level. the charge pin will stay high afterwards. the user has a maximum of 32 s to clock in the input pulses. the four panels of figure 6 show examples of the pulse streams and the resulting current levels. t ilim(h) t ilim(l) t ilimsu clock input at charge pin figure 4. ilim clock timing definition charging action primary current charge shutdown reset ilim counter start ilim counter t off i lim t ilim(su) figure 5. current limiting waeforms. eample shows setting at i swlim4 . figure 6. ilim programming waeforms for ilim = 1.4 a 1.2 a 1.0 a and 0.86 a. (a) 1.4 a (b) 1.2 a (c) 1.0 a (d) 0.86 a
A8439-ds, rev. 1 worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. photoflash capacitor charger with igbt driver A8439 9 figure 7 shows the last charging cycle, when the charge pin is forced low before charging has been completed. the A8439 implements an adaptive off-time, t off , control. after the switch is turned off, a sensing circuit tracks the flyback voltage at the sw node. as soon as this voltage swings below 1.2 v, the switch is turned on again for the next charging cycle. however, when the photoflash capacitor charger circuit starts up at low output voltage, a timeout may be triggered to limit the maximum switch off-time to 20 s. figure 7. last charging cycle, when the charge pin is forced low before charging is complete.
A8439-ds, rev. 1 worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. photoflash capacitor charger with igbt driver A8439 10 transformer design turns ratio. the minimum transformer turns ratio, n, (secondary:primary) should be chosen based on the following formula: v batt v d _ drop v out n ? + 40 (1) where: v out (v) is the required output voltage level, v d_drop (v) is the forward voltage drop of the output diode(s), v batt (v) is the transformer battery supply, and 40 (v) is the rated voltage for the internal mosfet switch, representing the maximum allowable reflected voltage from the output to the sw pin. for example, if v batt is 3.5 v and v d_drop is 1.7 v (which could be the case when two high voltage diodes were in series), and the desired v out is 320 v, then the turns ratio should be at least 8.9. in a worst case, when v batt is highest and v d_drop and v out are at their maximum tolerance limit, n will be higher. taking v batt = 5.5 v, v d_drop = 2 v, and v out = 320 v 102 % = 326.4 v as the worst case condition, n can be determined to be 9.5. in practice, always choose a turns ratio that is higher than the calculated value to give some safety margin. in the worst case example, a minimum turns ratio of n = 10 is recommended. primary inductance . the A8439 has a minimum switch off-time, t off(min) , of 300 ns, to ensure correct sw node voltage sensing. as a loose guideline when choosing the primary inductance, l primary ( h), use the following formula: swlim i n v out primary l 9 10 300 ? . (2) ideally, the charging time is not affected by transformer primary inductance. in practice, however, it is recommended that a primary inductance be chosen between 10 h and 20 h. when l primary is less than 10 h, parasitic elements associated with flyback from the transformer lead to lower efficiency and longer charging time. when l primary is greater than 20 h, the rating of the transformer must be dramatically increased to handle the required power density, and the series resistances are usually higher. a design that is optimized to achieve a small footprint solution would have an l primary of 12 to 14 h, with minimized leakage inductance and secondary capacitance, and minimized primary and secondary series resistance. please refer to the table recommended components for more information. leakage inductance and secondary capacitance. the trans- former design should minimize the leakage inductance to ensure the turn-off voltage spike at the sw node does not exceed the 40 v limit. an achievable minimum leakage inductance for this application, however, is usually compromised by an increase in parasitic capacitance. furthermore, the transformer secondary capacitance should be minimized. any secondary capacitance is multiplied by n 2 when reflected to the primary, leading to high initial current swings when the switch turns on, and to reduced efficiency. applications information symbol rating c1 0.1 f, x5r or x7r, 10 v c2 4.7 f, x5r or x7r, 10 v c3 1 nf, x5r or x7r, 10 v d1 fairchild semiconductor bav23s (dual diode connected in series) t1 tokyo coil engineering t-16-024a, l primary = 12 h, n = 10.2 r1, r2 1206 resistor, 1 % r3 0603 resistor, 1 % r4 pull-up resistor + to igbt gate cout v out d1 t1 r1 r2 r3 100 k 4.99 m 4.99 m 39 k r4 v batt 1.5to5.5v two alkaline/nimh/nicad or one li + v bias 3.0to5.5v c2 4.7 f c3 1nf 303 v 1:10.2 100 f c1 0.1 f A8439 charge gnd fb sw trigger igbtdrv done vin figure 8. typical circuit for photoflash capacitor charging application.
A8439-ds, rev. 1 worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. photoflash capacitor charger with igbt driver A8439 11 adjusting output voltage the A8439 senses output voltage during switch off-time. this allows the voltage divider network, r1 through r3 (see figure 8), to be connected at the anode of the high voltage output diode, d1, eliminating power loss due to the feedback network when charging is complete. the output voltage can be adjusted by selecting proper values of the voltage divider resistors. use the following equation to calculate values for rx ( ): 3 2 1 ? = + fb v v out r r r 1 . (3) r1 and r2 together need to have a breakdown voltage of at least 300 v. a typical 1206 surface mount resistor has a 150 v breakdown voltage rating. it is recommended that r1 and r2 have similar values to ensure an even voltage stress between them. recommended values are: r1 = r2 = 4.99 m (1206) r3 = 39 k (0603) which together yield a stop voltage of 303 v. using higher resistance ratings for r1, r2, and r3 does not offer significant efficiency improvement, because the power loss of the feedback network occurs mainly during switch off-time, and because the off-time is only a small fraction of each charging cycle. output diode selection choose the rectifying diode(s), d1, to have small parasitic capacitance (short reverse recovery time) while satisfying the reverse voltage and forward current requirements. the peak reverse voltage of the diode, v d_peak , occurs when the internal mosfet switch is closed, and the primary-side current starts to ramp-up. it can be calculated as: batt . v n v out d _ peak v + = (4) the peak current of the rectifying diode, id_peak, is calculated as : . i primary_peak d _ peak i = n / (5) input capacitor selection ceramic capacitors with x5r or x7r dielectrics are recom- mended for the input capacitor, c2. it should be rated at least 4.7 f / 6.3 v to decouple the battery input, v batt , at the primary of the transformer. when using a separate bias, v bias , for the A8439 vin supply, connect at least a 0.1 f / 6.3 v bypass capacitor to the vin pin. layout guidelines key to a good layout for the photoflash capacitor charger circuit is to keep the parasitics minimized on the power switch loop (transformer primary side) and the rectifier loop (secondary side). use short, thick traces for connections to the transformer primary and sw pin. output voltage sensing circuit elements must be kept away from switching nodes such as sw pin. it is important that the d o n e signal trace and other signal traces be routed away from the transformer and other switching traces, in order to minimize noise pickup. in addition, high voltage isolation rules must be followed carefully to avoid breakdown failure of the circuit board. recommended components table component rating part number source c1, input capacitor 0.1 f, 10%, 16 v x7r ceramic capacitor (0603) grm188r71c104ka01d murata c2, input capacitor 4.7 f, 10%, 10 v, x5r ceramic capacitor (0805) lmk212bj475kg taiyo yuden cout, photoflash capacitor 20 to 180 f, 330 v chemi-con d1, output diode 2 x 250 v, 225 ma, 5 pf bav23s philips semiconductor, fairchild semiconductor r1, r2, fb resistors 4.99 m , 1 / 4 w 1% (1206) 9c12063a4994fkhft yageo r3, fb resistor 39.0 k 1 / 10 w 1% (0603) 9c06031a3902fkhft yageo t1, transformer 1:10.2, l primary = 14.5 h ldt565630t-002 tdk 1:10.2, l primary = 12 h t-16-024a tokyo coil engineering 1:10, l primary = 10.8 h st-532517a asatech
A8439-ds, rev. 1 worcester, massachusetts 01615-0036 (508) 853-5000 115 northeast cutoff, box 15036 www.allegromicro.com allegro microsystems, inc. photoflash capacitor charger with igbt driver A8439 12 package ej, 10-contact mlp/tdfn 1.64 nom .065 2.38 nom .094 0.30 0.18 .012 .007 0.50 0.30 .020 .012 0.80 0.70 .031 .028 0.05 0.00 .002 .000 3.15 2.85 .124 .112 3.15 2.85 .124 .112 0.20 ref .008 a b c seating plane c 0.08 [.003] 10x 0.50 .020 10x 0.10 [.004] m c a b 0.05 [.002] m c 10 10 2 1 2 1 a a terminal #1 mark area b exposed thermal pad (reference dimensions only, terminal #1 identifier appearance at supplier discretion) preliminary dimensions, for reference only (reference jedec mo-229 weed) dimensions in millimeters u.s. customary dimensions (in.) in brackets, for reference only dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown b 0.225 x 0.225 ref .009 x .009 the products described here are manufactured under one or more u.s. patents or u.s. patents pending. allegro microsystems, inc. reserves the right to make, from time to time, such de par tures from the detailed spec i fi ca tions as may be required to permit improvements in the per for mance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro products are not authorized for use as critical components in life-support devices or sys tems without express written approval. the in for ma tion in clud ed herein is believed to be ac cu rate and reliable. how ev er, allegro microsystems, inc. assumes no re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. copyright?2005 allegromicrosystems, inc. part number packaging A8439eejtr-t 7-in. reel, 1500 pieces/reel use the following complete part number when ordering:

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