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document number: mc34652 rev. 8.0, 2/2007 freescale semiconductor advance information * this document contains certain information on a new product. specifications and information herein are subject to change without notice. ? freescale semiconductor, in c., 2007. all rights reserved. 2.0 a negative voltage hot swap controller with enhanced programmability the 34652 is a highly integrated - 48 v hot swap controller with an internal power mosfet. it provides the means to safely install and remove boards from live - 48 v backplanes without having to power down the entire system. it regulates the inrush current, from the supply to the load?s filter capacitor, to a user-programmable limit, allowing the system to safe ly stabilize. a disabl e function allows the user to disable the 34652 manually or through a microprocessor and safely disconnect the load from the main power line. the 34652 has active high and active low power good output signals that can be used to directly enable a power module load. programmable under- and overvoltag e detection circuitry monitors the input voltage to check that it is within its operating range. a programmable start-up delay timer ensu res that it is safe to turn on the power mosfet and charge the load capacitor. a two-level current limit approach to controlling the inrush current and switching on the load limits the peak power dissipation in the power mosfet. both current limits are user programmable. features ? integrated power mosfet and control ic in a small outline package ? input voltage operat ion range from -15 v to - 80 v ? programmable overcurrent limit with auto retry ? programmable charging current limit independent of load capacitor ? programmable start-up and retry delay timer ? programmable overvoltage and undervoltage detection ? active high and low power good output signals ? thermal shutdown ? pb-free packaging designated by suffix code ef figure 1. 34652 simplified application diagram hot swap 34652 ordering information device temperature range (t a ) package mc34652ef/ r2 - 40c to 85c 16 soicn mcz34652ef/ r2 scale 2:1 ef suffix (pb-free) 98asb42566b 16-pin soicn 34652 disable vpwr uv ov ichg ilim vin vout pg pg timer gnd -48 v system power supply (backplane) optional external components optional external components load application dependent
analog integrated circuit device data 2 freescale semiconductor 34652 internal block diagram internal block diagram figure 2. 34652 simplifi ed internal block diagram timer pg disable vpwr uvlo 1.3 v 1.3 v 1.3 v 3.1 v 8.0 a uv ov ilim ichg thermal shutdown sensor mosfet power mosfet vout vin + - + - + - external resistors detection programmable current limit gate control driver logic referenced vpwr logic fixed oscillator adjustable oscillator and startup delay timer timer and external resistors detection pg vin uv ov
analog integrated circuit device data freescale semiconductor 3 34652 pin connections pin connections figure 3. 16-soicn pin connections table 1. 16-soicn pin definitions a functional description of each pin can be found in the functional pin description section beginning on page 10 . pin pin name formal name definition 1, 8, 9, 16 vin negative supply input voltage this is the most negative power supply input . all pins except disable are referenced to this input. 2 pg power good output (active high) this is an active high power good output si gnal. this pin is referenced to vin. 3 pg power good output (active low) this is an active low power good output si gnal. this pin is referenced to vin. 4, 5 vout output voltage this pin is the drain of the internal power mosfet and supplies a current limited voltage to the load. 6 timer start-up and retry delay timer this input is used to control the time bas e used to generate the timing sequences at start-up and the retry delay when the device experiences any fault. 7 nc no connect not connected. 10 ov overvoltage control this pin is used to set the upper limit of the input voltage operation range. 11 uv undervoltage control this pin is used to set the lower limit of the input voltage operation range. 12 vpwr positive supply input voltage this is the most-positive power supply i nput. the load connects between this pin and the vout pin. 13 disable disable input control this pin is used to easily disconnect or co nnect the load from the main power line by disabling or enabling the 34652. it can also be used to reset the fault conditions that cause a ?power no good? signal. this pin is referenced to vpwr. 14 ilim current limit control this pin is used to set the overcurrent limit during normal operation. 15 ichg charging current limit control this pin is used to set the load?s input capac itor charging current limit, hence limiting the inrush current to a known constant value. vin vin ichg ilim disable vpwr ov uv vin vin pg pg vout vout nc timer 8 2 3 4 5 7 6 9 16 15 14 13 12 10 11 1
analog integrated circuit device data 4 freescale semiconductor 34652 electrical characteristics maximum ratings electrical characteristics maximum ratings table 2. maximum ratings all voltages are with respect to ground unless otherwise no ted. exceeding these ratings may cause a malfunction or permanent damage to the device. ratings symbol value unit electrical ratings power supply voltage v pwr 85 v power mosfet energy capability e mosfet varies (1) mj continuous output current (2) i o (cont ) 2.0 a maximum voltage disable pin uv pin ov, ilim, ichg, and timer pins pg pin (v pg - v in ) pg pin (v pg - v in ) ? ? ? ? ? v in - 0.3 to v pwr + 5.5 7.0 5.0 85 85 v all pins minimum voltage ? - 0.3 v pg, pg maximum current ? internally limited a esd voltage, all pins (3) human body model machine model v esd3 v esd4 2000 200 v thermal ratings storage temperature t stg - 65 to 150 c operating temperature ambient (4) junction t a t j - 40 to 85 - 40 to 160 c notes 1. refer to the section titled power mosfet energy capability on page 23 for a detailed explanation on this parameter. 2. continuous output current capability so long as t j is 160 c. 3. esd1 testing is performed in accor dance with the human body model (c zap = 100pf, r zap = 1500 ? ), esd2 testing is performed in accordance with the machine model (c zap = 200 pf, r zap = 0 ? ). 4. the limiting factor is junction temperature, taking into account power dissipation, ther mal resistance, and heatsinking.
analog integrated circuit device data freescale semiconductor 5 34652 electrical characteristics maximum ratings peak package reflow temperature during reflow (5) , (6) t pprt note 6 c thermal resistance (7) , (8) junction-to-ambient, single-layer board (9) junction-to-ambient, four-layer board (10) r ja r jma 103 65 c/w notes 5. pin soldering temperature limit is for 10 seconds maximum dura tion. not designed for immersion so ldering. exceeding these lim its may cause malfunction or permanent damage to the device. 6. freescale?s package reflow capability m eets pb-free requirements for jedec standard j-std-020c. for peak package reflow temperature and moisture sensitivity levels (msl), go to www.freescale.com, search by part number [e.g. remove pref ixes/suffixes and enter the core id to view all orderable parts . (i.e. mc33xxxd enter 33xxx), and review parametrics. 7. refer to the section titled thermal shutdown on page 16 for more thermal resistance va lues under various conditions. 8. the vout and vin pins comprise the main heat conduction paths. 9. per semi g38-87 and jedec jesd51-2 with th e single-layer board (jesd51-3) horizontal. 10. per jedec jesd51-6 with the board (jesd51-7) horizontal. t here are no thermal vias connecting the package to the two planes in the board. table 2. maximum ratings (continued) all voltages are with respect to ground unless otherwise no ted. exceeding these ratings may cause a malfunction or permanent damage to the device. ratings symbol value unit electrical ratings
analog integrated circuit device data 6 freescale semiconductor 34652 electrical characteristics static electrical characteristics static electrical characteristics table 3. static electric al characteristics characteristics noted under conditions 15 v v pwr 80 v and - 40 c t a 85 c. all voltages are referenced to vin unless otherwise noted. characteristic symbol min typ max unit power supply pin (vpwr) supply voltage v pwr 15 ? 80 v supply current, device enabled, default mode, normal operation (11) i in ? 900 1400 a undervoltage lockout threshold (uvlo) rising falling hysteresis v uvlor v uvlof v uvlohy 7.0 6.0 ? 8.0 7.0 1.0 9.0 8.0 ? v undervoltage control uv threshold (default) rising falling hysteresis v uv(on) v uv(off) v uvhy ? ? ? 38 37 1.0 ? ? ? v uv comparator threshold rising hysteresis v uvc v uvchy ? ? 1.3 34 ? ? v mv uv input leakage current i uvlg ? ? 1.0 a maximum value of the series resistance between uv and vpwr pins ? ? ? 500 k ? overvoltage control ov threshold (default) rising falling hysteresis v ov (off) v ov (on) v ovhy ? ? ? 78 76 2.0 ? ? ? v ov comparator threshold rising hysteresis v ovc v ovchy ? ? 1.3 34 ? ? v mv ov input leakage current i ovlg ? ? 1.0 a maximum value of the series resistance between uv and vpwr pins ? ? ? 500 k ? notes 11. the supply current depends on operation mode and can be calculated as follows: ?start-up mode: i in = 539 a + 548 * i chg ( a) + 216 * i lim ( a) + v pwr (v) / 460(k ? ) ?normal mode: i in = 539 a + 240 * i lim ( a) + 288 * i load ( a) + v pwr (v) / 460(k ? ) ?overcurrent mode: i in = 539 a + 612 * i lim ( a) + v pwr (v) / 460(k ? ) ?disable mode: i in = 539 a + 240 * i lim ( a) + i dis ( a) + v pwr (v) / 460(k ? )
analog integrated circuit device data freescale semiconductor 7 34652 electrical characteristics static electrical characteristics disable input control pin (disable) (12) disable input voltage inactive state active state, positive signal active state, negative signal v disl v dishp v dishn v pwr - 1.2 v pwr + 2.0 ? ? ? ? v pwr + 1.2 ? v pwr - 2.0 v disable input current v dis = v pwr + 3.3 v v dis = v pwr - 3.3 v v dis = v in i dis 20 -20 - 50 60 - 60 -150 180 -180 - 250 a current limit control pins (ilim, ichg) overcurrent limit in steady state default maximum with external resistor minimum with external resistor i lim ? ? ? 1.0 2.25 0.35 ? ? ? a current limit during start-up default maximum with external resistor minimum with external resistor i chg ? ? ? 0.1 0.5 0.05 ? ? ? a short circuit current limit i short ? 5.0 ? a i lim current limit hysteresis i limhy ? 12 ? % i lim current limit accuracy i limcla -20 ? 20 % i chg current limit accuracy i chgcla - 35 ? 35 % ilim pin voltage v ilim ? 3.1 ? v i lim to r ilim setting constant i limcns ? 129 ? a * k ? i chg reference current i chgout ? - 8.0 ? a i chg to r ichg setting constant i chgcns ? 335 ? k ?/ a power good output pins (pg, pg ) (13) power good output low voltage i pg or i pg = 1.6 ma v pgl ? ? 0.5 v power good leakage current i pglg ? ? 10 a power good current limit v pg or v pg = 3.0 v i pgcl ? ? 7.0 ma notes 12. referenced to vpwr. 13. referenced to vin. table 3. static electrical characteristics (continued) characteristics noted under conditions 15 v v pwr 80 v and - 40 c t a 85 c. all voltages are referenced to vin unless otherwise noted. characteristic symbol min typ max unit
analog integrated circuit device data 8 freescale semiconductor 34652 electrical characteristics static electrical characteristics start-up and retry delay timer (timer) timer pin voltage v timer ? 1.3 ? v output voltage pin (vout) vout leakage current i outlg ? ? 50 a power mosfet on resistance @ 25 c r ds(on) ? 144 ? m ? thermal shutdown thermal shutdown temperature t sd ? 160 ? c thermal shutdown temperature hysteresis t sdhy ? 25 ? c table 3. static electrical characteristics (continued) characteristics noted under conditions 15 v v pwr 80 v and - 40 c t a 85 c. all voltages are referenced to vin unless otherwise noted. characteristic symbol min typ max unit
analog integrated circuit device data freescale semiconductor 9 34652 electrical characteristics dynamic electrical characteristics dynamic electrical characteristics table 4. dynamic electri cal characteristics characteristics noted under conditions 15 v v pwr 80 v and - 40 c t a 85 c. all voltages are referenced to vin unless otherwise noted. characteristic symbol min typ max unit undervoltage control uv active to gate low filter time t uval ? 1.0 ? ms overvoltage control ov active to gate low filter time t oval ? 1.0 ? ms disable input control pin (disable) (14) disable active to gate low filter time t disal ? 1.0 ? ms current limit control pins (ilim, ichg) short circuit protection delay t scpd ? ? 10 s overcurrent limit filter time t ocft ? 100 ? s overcurrent limit regulation time t oc ? 3.0 ? ms i chg rise time default adjustable with an external capacitor t ichgr ? 1.0 1.0 ? ? ? ms power good output pins (pg, pg ) (15) power good output delay time, from power mosfet enhancement to pg and pg asserted t pg 10 28 46 ms start-up and retry delay timer (timer) start-up and retry delay timer default maximum with external resistor minimum with external resistor t timer 130 ? ? 200 1000 100 270 ? ? ms notes 14. referenced to vpwr. 15. referenced to vin.
analog integrated circuit device data 10 freescale semiconductor 34652 functional description introduction functional description introduction most telecom and data transf er networks require that circuit boards be inserted and removed from the system without powering do wn the entire system. when a circuit board is inserted into or removed from a live backplane, the filter or bypass capacitors at the input of the board?s power module or switching power supply can cause large transient currents when being charged or discharged. these currents can cause severe and permanent damage to the boards, thus making the system unstable. figure 4 displays the inrush current to the filter capacitor if a hot swap device is absent. the inrush current reached an unsafe value of more than 55 a. figure 4. circuit board inser tion without a hot swap device, inrush current not limited the 34652 is an integrated negative voltage hot swap controller with an internal power mosfet. the 34652 resides on the plug-in boards and allows the boards to be safely inserted or removed by powering up the supply voltages in a controlled manner and regulating the inrush current to a user-programmable limit, thus allowing the system to safely stabilize (see figure 5 ). the 34652 provides protection against overcurrent , undervoltage, overvoltage, and overtemperature. furthermore, it protects the system from short circuits. figure 5. circuit board insertion with the hot swap device, inrush current limited by integrating the control circuitry and the power mosfet switch into a space-efficient package, the 34652 offers a complete, cost-effectiv e, and simple soluti on that takes much less board space than a similar part with an external power mosfet requires. the 34652 can be used in - 48 v telecom and networking systems, servers , electronic circuit breakers, - 48 v distributed power syst ems, negative power supply control, and central office switching. functional pin description negative supply input voltage (vin) the vin pin is the most negative power supply input. all pins except the disable pin ar e referenced to this input. power good output (active high) (pg) the pg pin is the active high power good output signal that is used to enable or disable a load. this signal goes active after a successful power-up sequence and stays active as long as the device is in normal operation and is not experiencing any faults. the signal is deactivated un der the following conditions: ? power is turned off. ? the device is disabled for more than 1.0 ms. ? the device exceeded its thermal shutdown threshold for more than 12 s. ? the device is in overvoltage or undervoltage mode for more than 1.0 ms. ? load current exceeded the overcurrent limit for more than 3.0 ms. this pin is referenced to vin.
analog integrated circuit device data freescale semiconductor 11 34652 functional description functional pin description power good output (active low) ( pg ) the pg pin is the active low power good output signal that is used to enable or disable a load. this signal goes active after a successful power-up sequence and stays active as long as the device is in normal operation and is not experiencing any faults. the signal is deactivated under the following conditions: ? power is turned off. ? the device is disabled for more than 1.0 ms. ? the device exceeded its thermal shutdown threshold for more than 12 s. ? the device is in overvoltage or undervoltage mode for more than 1.0 ms. ? load current exceeded the overcurrent limit for more than 3.0 ms. this pin is referenced to vin. output voltage (vout) the vout pin is the drain of the internal power mosfet and supplies a current-limited voltage to the load. the load connects between the vout and vpwr pins. start-up and retry delay timer (timer) this input is used to control the time-base used to generate the timing sequences at start-up and the retry delay when the device experiences any fault. the timer pin can be left unconnected for a de fault timer value of 200 ms or the user can connect a resistor between this pin and the vin pin to set the timer value externally. the timer value can vary between 100 ms and 1000 ms. overvoltage control (ov) the ov pin is used to set the upper limit of the input voltage operation range . if the ov pin voltage goes above the overvoltage threshold value, the device turns off the internal power mosfet and deactivates the two power good outputs, pg and pg . the power mosfet stays off until the ov drops below the threshold value. the overvoltage detection circuit has a 1.0 ms filter timer. the ov pin can be left unconnected for the typical default threshold value of 78 v or the user can set the threshold value externally with a simple voltage divider using resistors between the vpwr and vin pins. undervoltage control (uv) the uv pin is used to set the lower limit of the input voltage operation range. if the uv pin voltage goes below the undervoltage threshold value, t he device turns off the internal power mosfet and deactivates the two power good outputs, pg and pg . the power mosfet stays off until the uv rises above the threshold value. the undervoltage detection circuit has a 1.0 ms filter timer. the uv pin can be left unconne cted for the typical default threshold value of 37 v or the user can set the threshold value externally with a simple voltage divider using resistors between the vpwr and vin pins. positive supply voltage input (vpwr) the vpwr pin is the most-positive power supply input. the load connects between the vpwr and vout pins. disable input control (disable) the disable pin is used to easily disconnect or connect the load from the main power line by disabling or enabling the 34652. it can also be used to reset the fault conditions that cause a ?power no good? signal. if left open or connected to vpwr, the disable pin is inactive and the device is enabled. if a positive voltage (above v pwr ) or a negative voltage (below v pwr ) is applied to disable, it is active and the device is disabled. the disable function has a 1.0 ms filter timer. this pin is referenced to vpwr. current limit control (ilim) the ilim pin is used to set the overcurrent limit during normal operation. this pin can be left unconnected for a default overcurrent limit value of 1.0 a or the user can connect an external resistor between the ilim and vin pins to set the overcurrent limit value. this value can vary between 0.35 a and 2.25 a. the overcurrent detection circuit has a 100 s filter timer. charging current limit control (ichg) the ichg pin is used to set the current limit that is used to charge the load?s input capacitor, hence limiting the inrush current to a known constant value . this pin can be left unconnected for a default chargi ng current limit value of 0.1 a and a default i chg rise time of 1.0 ms. or the user can connect an external resistor between the ichg and vin pins to set the current limit value between 0.05 a and 0.5 a and an
analog integrated circuit device data 12 freescale semiconductor 34652 functional device operation operational modes functional device operation operational modes start-up sequence when power is first applied to the 34652 by connecting the vin pin to the negative voltage rail and the vpwr pin to the positive voltage rail, the 34652 keeps the power mosfet turned off, deactivates the po wer good output signals, and resets the retry counter. if the device is disabled, no further activities will occur and power-up would not start. if the device is enabled, it starts to establis h an internally regulated supply voltage required for the internal circuitry. the power mosfet will stay off until the st art of the charging process. after power-on reset (por) and once the undervoltage lockout (uvlo) threshold is cleared, the 34652 checks for external components on four pins ? the uv, the ilim , the ichg , and 128 s later the ov ? to set the levels of the undervoltage threshold, the overcurrent limit, the charging current limit, and the overvoltage threshold, respectively. the device also checks for ex ternal compo nents on the timer pin to decide on the start-up and retry delay timer value, and the device keeps checking the timer pin continuously throughout the operation. the device then initiates the start-up timer (point a in figure 6 ) and checks for the start-up conditions (see next paragraph). the duration of the timer is either a default or a user-programmable value. for undervoltage and overvoltage faults during power up the 34652 retries infinitely until normal input voltage is attained. if the die temperature ever increased beyond the thermal shutdown threshold or the device is disabled, then the start- up timer resets and the retry counter increments. if after 10 retries the die temperature is still high and the device is still disabled, the 34652 will not retry again and the power in t he device must be recycled or the device must be disabled to reset the retry counter. figure 6. start-up sequence start-up conditions the start-up conditions are as follows: ? input voltage is below the overvoltage turn-off threshold. this threshold is either a default or user-programmable value. ? input voltage is above the under voltage turn-off threshold. this threshold is either a default or user-programmable value. ? die temperature is less than thermal shutdown temperature. ? device is enabled. if the start-up conditions are satisfied for a time equal to the length of the start-up timer and the retry counter is less than or equal to 10, the device starts to turn on the power mosfet gradually to control the inrush current that charges up the load capacitor to eventu ally switch on the load (point b in figure 6 ). charging process when charging a capacitor from a fixed voltage source, a definite amount of energy will be dissipated in the control circuit, no matter what the contro l algorithm is. this energy is equal to the energy transferred to the capacitor ? ? cv 2 . with this in mind, the power mosfet in the 34652 cannot absorb this pulse of energy instantaneously, so the pulse must be dissipated over time. to limit the peak power dissipation in the power mosfet and to spread out the
analog integrated circuit device data freescale semiconductor 13 34652 functional device operation operational modes figure 7. power mosfet turn-o n and the gradual increase in the charging current from 0 a to i chg (2.0 ms in example) the i chg current charges up the load capacitor relatively slowly. when the load capacitor is fully charged, the power mosfet reaches its full enhanc ement, which triggers the current limit detection to change from i chg to i lim and the load current to decrease (point c in figure 6 , page 12 ). the current spike at point c in figure 6 is better displayed in figure 8 . we can see that when the ? v out - v in ? < 0.5 v, the power mosfet fully turns on to reach its full enhancement, charging the capacitor an additional 0.5 v with a higher current value that quickly ramp s down. this eliminates the need for a current slew rate control because the hazard for a voltage change is less than 0.5 v. the power good output signals activate after a 20 ms delay (point d in figure 6 ), which in turn enables the load. the 34652 is now in normal operation mode and the retry counter resets. figure 8. full power mosfet turn-on and current spike associated with it. end of charging process normal mode if one of the start-up conditions (list on page 12 ) is violated any time from the start of the power mosfet enhancement process and thereafter during normal operation, the power mosfet turns off and the power good output signals deactivate, disabling the load, and a new timer cycle starts as explained previously. the 34652 also monitors the load current to prevent any overload or short circuit conditions from happening in order to protect the load from damage. load current control when in normal operation mode, the 34652 monitors the load and provides two modes of current control as explained in the paragraphs below. overcurrent mode the 34652 monitors the load fo r overcurrent conditions. if the current going through the load becomes larger than the overcurrent limit for longer than the overcurrent limit filter timer of 100 s, the overcurrent signal is asserted and the gate of the power mosfet is discharged to try to regulate the current at the i lim value (point a in figure 9 ). the 34652 is in overcurrent mode for 3.0 ms . if after a 3.0 ms filter timer the device is still in overcurrent mode, the device turns off the power mosfet and deactivates the power good output signals (point b in figure 9 ). the 34652 then initiates another start-up timer and goes back through the enhancement process. if during the 3.0 ms timer the fault was cleared, then the 34652 goes back to the normal operation mode and the power good output signals stay activated as shown in figure 10 , page 14 . this way the device overcomes temporary overcurrent situatio ns and at the same time protects the load from a more severe overcurrent situation. figure 9. overcurrent mode for more than 3.0 ms
analog integrated circuit device data 14 freescale semiconductor 34652 functional device operation operational modes figure 10. overcurrent mode for less than 3.0 ms short circuit mode if the current going through the load becomes > 5.0 a, the power mosfet is discharged very fast (in less than 10 s) to try to regulate the current at the i lim value, and the 34652 is in the overcurrent mode for 3.0 ms. then it follows the pattern outlined in the overcu rrent mode paragraph above. disabling and enabling the 34652 when a negative voltage (< 1.8 v below v pwr ) is applied to the disable pin for more than 1.0 ms (point a in figure 11 ), the 34652 is disabled, the power mosfet turns off, and the power good output signals deactivate. the 34652 stays in this state until the voltage on the disable pin is brought to within 1.2 v of v pwr for more than 1.0 ms to enable the device (point b in figure 11 ). then a new start-up sequence initiates as described on page 12 . applying a positive voltage (> 1.8 v above v pwr ) would also disable the 34652 in the same manner. figure 11. disabling and enabling the 34652 figure 12 demonstrates that the 34652 must be enabled for the length of the start-up timer to start turning on the power mosfet. after the fourth disable signal, the 34652 was enabled for the length of the start-up timer. and because the retry counter is less than 10, the 34652 turns on the power mosfet and starts the charging process (refer to the charging process section, pages 12 ? 13 ). figure 12. start-up timer versus disable
analog integrated circuit device data freescale semiconductor 15 34652 functional device operation protection features board removal when the board is removed, its power ramps down. as soon as the 34652?s input vo ltage reaches the undervoltage turn-off threshold, the undervoltage detection circuit activates and the power mosfet turns off for having violated one of the start-up conditions (list on page 12 ). 34652 state machine diagram figure 13 is a representation of the 34652 behavior in different modes of operation. figure 13. state diagram protection features undervoltage when the voltage on the uv pin drops below the undervoltage falling threshold for more than 1.0 ms, an undervoltage fault is detected and one of the start-up conditions (list on page 12 ) is violated. the 34652 turns off the power mosfet and deactivates the power good output signals, disabling the load (point a in figure 14 ). the 34652 stays in this state until the voltage on the uv pin rises above the undervoltage rising threshold for more than 1.0 ms, signaling that the supply volt age is in the normal operation range (point b in figure 14 ). then a new start-up sequence initiates as described on page 12 . the undervoltage detection circuit is also equipped with a 1.0 v hysteresis when in default mode. the hyst eresis value depends on the undervoltage detection threshold and can be calculated as follows: v uvhy = v uv ( rising ) * [1 - (1.3 v - v uvchy ) / 1.3 v ] figure 14. undervoltage fault followed by a new start-up sequence mosfet off pg = 0 undervoltage mosfet off pg = 0 power off temp < 135c filter = 12 s v pwr < v uvlof filter = 1.0 ms a signal ?set? is generated to check resistors on uv, ilim, ichg, and timer pins and 128 s later the ov pin retry fault stop toggle disable or cycle power off then on to clear fault power good check and v ds < 500 mv for 20 ms charging mode n 10 turn off mosfet off pg = 0 pg = 1 n = 0 v pwr > v uvlor filter = 1.0 ms filter = 3.0 ms i load > i lim i load < i lim - i limhy short circuit detection fast gate discharge < 10 s i load > i short overcurrent for > 3.0 ms pass pg check fail pg check n > 10 for 100 s v pwr < v uv(off) filter = 1.0 ms mosfet off pg = 0 overvoltage v pwr < v ov(on) v pwr > v ov(off) filter = 1.0 ms filter = 1.0 ms pg = 0 mosfet off temp > 160c filter = 12 s thermal shutdown ext. resistor check por is generated n = 0 mosfet off pg = 0 disable por is generated n = 0 disable = 1 filter = 1.0 ms disable = 0 filter = 1.0 ms v pwr > v uv(on) filter = 1.0 ms if i load < i lim overcurrent mode normal operation v ds < 500 mv start-up conditions ? thermal shutdown < 160c filter = t timer ? v pwr > v uv(off) ? v pwr < v ov(off) n = n + 1 ? disable = 0
analog integrated circuit device data 16 freescale semiconductor 34652 functional device operation protection features figure 15 shows how the 34652 uses the start-up timer to make sure that the input voltage is above the undervoltage falling threshold. the 34652 was in normal operation before point a. at point a an undervoltage fault occurs. then the fault is cleared at point b, and the 34652 initiates a start-up sequence. before the end of the start-up timer another undervoltage fault occurs at point c, so the 34652 does not turn on the power mosfet. at point d the fault is cleared again for the length of the start-up timer. the 34652 turns on the power mosfet and starts the charging process (refer to charging process , pages 12 ? 13 ). figure 15. start-up timer prot ection against undervoltage faults overvoltage when the voltage on the ov pin exceeds the overvoltage rising threshold for more than 1.0 ms, an overvoltage fault is detected and one of the st art-up conditions (list on page 12 ) is violated. the 34652 turns off the power mosfet and deactivates the power good output signals, thus disabling the load. the 34652 stays in this state until the voltage on the ov pin falls below the overvoltage falling threshold for more than 1.0 ms, signaling that the supply voltage is in the normal operation range. then a new st art-up sequence initiates as described on page 12 . the overvoltage detection circuit is also equipped with a 2.0 v hysteresis when in default mode. the hysteresis value depends on the overvoltage dete ction threshold and can be calculated as follows: v ovhy = v ov ( rising ) * [1 - (1.3 v - v ovchy ) / 1.3 v ] the waveforms for an overvoltage fault are shown in figure 16 , page 16 . figure 16. overvoltage fault thermal shutdown the thermal shutdown feature helps protect the internal power mosfet and circuitry fr om excessive temperatures. during start-up and thereafter during normal operation, the 34652 monitors the temperature of the internal circuitry for excessive heat. if the temperat ure of the device exceeds the thermal shutdown temperature of 160 c, one of the start-up conditions (list on page 12 ) is violated, and the device turns off the power mosfet and deactivates the power good output signals. until the te mperature of the device goes below 135 c, a new start-up sequence will not be initiated. this feature is an advantage over solutions with an external power mosfet, because it is not easy for a device with an external mosfet to sense the temperature quickly and accurately. the thermal shutdown circuit is equipped with a 12 s filter. thermal design is critical to proper operation of the 34652. the typical r ds(on) of the internal power mosfet is 0.144 ? at room ambient temperat ure and can reach up to 0.251 ? at high temperatures. the thermal performance of the 34652 can vary depending on many factors, among them: ? the ambient operating temperature (t a ). ? the type of pc board?whether it is single layer or multi- layer, has heat sinks or not, etc.?all of which affects the value of the junction-to-ambient thermal resistance (r ja ). ? the value of the desired load current (i load ). when choosing an overcurrent limit, certain guidelines need to be followed to make su re that if the load current is running close to the overcurrent limit the 34652 does not go into thermal shutdown. it is good practice to set the parameters so that the re sulting maximum junction temperature is below the the rmal shutdown temperature by a safe margin. equation 1, on the following page can be used to calculate the maximum allowable overcurrent limit based on the maximum desired junction temperature or vice versa.
analog integrated circuit device data freescale semiconductor 17 34652 functional device operation protection features the power dissipation in the device can be calculated as follows: p = i 2 (load) * r ds(on) or p = [t j (max) - t a (max)] / r ja combining the two equations: i 2 (load) = [ t j (max) - t a (max)] / [r ja * r ds(on) ] eq 1 for example: t a (max) = 55c r ja = 51c/w for a four-layer board r ds(on) = 0.251 ? at high temperatures then: i 2 (load) = [ t j (max) - 55c] / [51c/w * 0.251 ? ] i 2 (load) = [ t j (max) - 55c] / 12.80c / a 2 so if the overcurrent limit is 2.0 a, then the maximum junction temperature is 106.2 c, which is well below the thermal shutdown temper ature that is allowed. the previous explanation applies to steady state power when the device is in normal operation. during the charging process, the power is dominated by the i * v across the power mosfet. when charging starts, the power in the power mosfet rises up and reaches a maximum value of i * v, then quickly ramps back down to the steady state level in a period governed by the size of the load? s input capacitor that is being charged and by the value of the charging current limit i chg . in this case the instantaneous power dissipation is much higher than the steady state case, but it is on for a very short time. for example: i chg = 100 ma, the default value c load = 400 f, a very la rge capacitor v pwr = 80 v, worst case then: the power pulse magnitude = i chg * v pwr = 8.0 w the power pulse duration = c load * v pwr / i chg = 320 ms figure 17 displays the temperatur e profile of the device under the instantaneous power pulse during the charging process. table 5 depicts thermal resistance values for different board configurations. figure 17. instantaneous temperature rise of an 8.0 w 0.0 10.0 20.0 30.0 40.0 50.0 60.0 0 100 200 300 40 0 tim e (m illisec) temperature rise time (ms) temperature rise (c) table 5. thermal resistance data type condition symbol value unit junction to ambient single-layer board (1s), per jedec j esd51-2 with board (jesd51-3) horizontal r ja 103 c/w junction to ambient four-layer board (2s2p), per jedec j esd51-2 with board (jesd51-3) horizontal r jma 65 c/w junction to ambient single-layer board with a 300 mm 2 radiator pad on its top surface, not standard jedec ? 69 c/w junction to ambient single-layer board with a 600 mm 2 radiator pad on its top surface, not standard jedec ? 65 c/w junction to ambient four-layer board with a via for eac h thermal lead, not standard jedec ? 51 c/w junction to ambient four-layer board with a 300 mm 2 radiator pad on its top surface and a full array of vias between radiator pad and top surface, not standard jedec ? 47 c/w junction to ambient four-layer board with a 600 mm 2 radiator pad on its top surface and a full array of vias between radiator pad and top surface, not standard jedec ? 47 c/w junction to board thermal resistance between die and board per jedec jesd51-8 r jb 29 c/w junction to case thermal resistance between die and case top r jc 33 c/w junction to package top temperature difference between package top and junction per jedec jesd51-2 jt 12 c/w junction to lead thermal resistance between junction and thermal lead, not standard jedec r jl 33 c/w
analog integrated circuit device data 18 freescale semiconductor 34652 typical applications typical applications the 34652 resides on the plug-in board (see figures 18 and 19 ), allowing the board to be safely inserted or removed without damaging electrical equipment. the 34652 can be operated with no external components other than the power good output signal pull-up resistor if the default mode was selected for all the programmabl e features. this is one of the great advantages of t he 34652: it operates with minimal user interface and minimal external component count and still offers complete hot swapping functionality with all the necessary protection features, from undervoltage/ overvoltage detection, to current limiting, to short circuit protection and power good output signaling. the default values were chosen to be sufficient for many standard applications. figure 18 is a typical application diagram depicting the default mode and using the power good output signal pull-up resistor. refer to the static and dynamic electrical characteristics tables on pages 6 through 9 for the various default values. figure 18. typical application diagram with default settings and minimal external components the 34652 can be also programmed for different values of the overcurrent limit, the charging current limit, the start- up and retry delay timer, and the uv / ov detection threshold s using external components connected to the device. figure 19 shows the 34652 with the required external components that allow access to all programmable features in the device. figure 19. typical application diagram with external components necessary to program the device undervoltage and overvoltage detection the uv and ov pins are used to monitor the input voltage to ensure that it is within the operating range and that there are no overvoltage or undervolt age conditions, and to quickly turn off the power mosfet if there are. the pins are connected to internal comparat ors that compare the voltages at the uv and ov pins with a reference voltage. the uv and ov pins can be left unconnected for the default threshold values of their trip point or the user can set the threshold values externally with a simple voltage divider using resistors between vpwr and vin (resistors r 1 , r 2 , and r 3 in figure 19 ). for the default mode, the 34652 is equipped with an internal resistor divider that acts the same as the external one. the typical default values of 37 v for the uv turn-off threshold (falling threshold) and 78 v for the ov turn-off threshold (rising threshold) will give a typical operating range of 38 v to 76 v . this range is suitable for telecom industry standards. when the device passes the uvlo threshold, it checks if there is any external resistor divider connected to the ov and uv pins. if there is, it dete rmines the value of the uv/ov thresholds accordingl y. if there is not, it defaults to the internal resistor divider. it then uses the uv/ov detection circuits to check the input supply levels before turning on the power mosfet during the start-up timer delay and thereafter. as long as the volt age on the uv pin is above its falling threshold and the voltage on the ov pin is below its rising threshold, the supply is within operating range and the power mosfet is allowed to turn on and stay on. if the uv pin drops below its falling threshold or the ov pin rises above its rising threshold, then one of the start-up conditions (refer to page 12 for list) is violated and the power mosfet turns off, the power good signals deactivate, and a new start-up vpwr uv vin timer ichg ilim vout (2) pg pg 33652 (4) gnd -48 v live backplane dc/dc converter application dependent enable/enable c load 44 k ? plug-in card disable ov vpwr uv vin timer ichg ilim vout (2) pg 33652 (4) r ichg r ilim c ichg r timer gnd -48 v live backplane dc/dc converter application dependent enable/enable c load 44 k ? plug-in card disable ov r 2 r 1 r 3 pg
analog integrated circuit device data freescale semiconductor 19 34652 typical applications timer initiates. the uv and ov detection circuits are equipped with a 1.0 ms filter to filter out momentary input supply dips. filter capacitors between the uv and vin pins and between the ov and vin pins could also be added to adjust the uv/ov filter time an d prevent more transients from affecting the device?s operation, especially if the input supply has a lot of noise. guidelines for choosing resistor divider values the total current flowing in the resistors is equal to the supply voltage divided by the total series resistance. the supply voltage can reach up to 80 v and the device will still be in normal operation, the re sistors connected and drawing current. so the resistor values should be chosen high enough to allow for a reasonable current to pass through them and not dissipate a lot of power or cause input noise that would trip the uv / ov detection circuit. another consideration is whether or not the values of the resistors are readily available. the tolerance of the resistors should be 1% or better to get an accurate reading. note accuracy requirements are application dependent. to demonstrate the importance of the accuracy of the resistors, let?s look at a syst em with an operat ing range of 40 v for uv falling to 75 v for ov rising as an example. this operating range will be scaled down for the device?s internal circuitry to operate the uv/ov detection circuits. the scale factor is 31.6 for uv and 57.1 for the ov. taking overvoltage as an example, this means that every 5.0 mv change on the ov pin represents a 0.29 v change for the ov trip point on the supply. which says that an error of 5.0 mv due to the resistors not being accurate will result in an error of 0.29 v for the trip point, and depending on how close we are operating to the ov rising threshold the device might detect an ov condition and turn off the power mosfet prematurely. the same argument applies to the uv pin. example of calculations for resistor values the following equations are examples of calculating resistor values using the same operating range as in the previous paragraph: r 3 = 1.3 * r 1 * v uv (rising) / ( v ov (rising) ( v uv (rising) - 1.3)) r 2 = r 3 (v ov (rising) / v uv (rising) - 1) where v ov (rising) = 75 v and v uv (rising) = 41 v note some iteration may be required to get the right values and also standard resistor values. the recommended maximum value of the series resistance between the uv/ov pins and vpwr pin is 500 k ?. here we have two equations and three unknowns. if we select a value for r 1 of 487 k ? , then from the first equation: r 3 = 8.72 k ? and the closest 1% standard resistor value is 8.66 k ? . now, from the second equations we can solve for r 2 : r 2 = 7.18 k ? and the closest 1% standard resistor value is 7.15 k ? . if the three-resistor divider, which is the recommended approach, could not produce acc eptable resistor values, the user can consider two separate resistor dividers, one divider for each pin from vpwr to vin. an advantage of the two- resistor dividers approach is that the user can set the trip points of the uv and ov thresholds independently. timer the timer pin on the 34652 gives the user control over the time base used to generate the timing sequences at start- up. the same timer controls the retry delay when the device experiences any fault. the timer pin can be left unconnected for a default timer value of 200 ms or the user can connect an external resistor (r t imer ) between the timer and vin pins, as shown in figure 19 , page 18 , to set the timer value externally. after the device passes the uvlo threshold and continuously after that, the 34652 checks the timer pin for any external components to dete rmine the value of the timer. during start-up and if any fault occurred, this timer value is used when initiating a start-up sequence. choosing the external resistor r timer value the user can change the value of the start-up delay timer (t timer ) by adding a resistor (r timer ) between the timer and vin pins, as shown in figure 19 , page 18 . the timer value ranges between 100 ms and 1000 ms, with a default value of 200 ms. table 6 lists examples of r timer for different values of the t timer and figure 20 , page 20 , shows a plot of r timer versus t timer . it is recommended that the closest 1% standard resistor value to the actual value be chosen. note accuracy requirements are application dependent. to calculate the value of the r timer resistor we use the following equations: t timer (ms) = 20 (ms) + 2.0 * [r timer (k ? ) + 1.0 k ?] r timer (k ? ) = [t timer (ms) - 20 (ms) ] / 2.0 - 1.0 k ? table 6. r timer values for some desired t timer values t timer (ms) r timer (k ? ) t timer (ms) r timer (k ? ) 100 39 600 289 150 64 650 314 200 89 700 339 250 114 750 364 300 139 800 389 350 164 850 414 400 189 900 439 450 214 950 464 500 239 1000 489 500 264 ? ?
analog integrated circuit device data 20 freescale semiconductor 34652 typical applications figure 20. external resistor (r timer ) value versus start-up and retry de lay timer value (t timer ) power good output signals the power good pins pg and pg are output pins that are used to directly enable a power module load. the device has active high and active low power good output signals. choosing which power good active signal depends on the enable signal requirement of th e load. this feature allows the 34652 to adapt to different app lications and a wide variety of loads. the power good output signal is active if the power mosfet is fully enhanced and the device is in normal operation. the signal goes active after a typical 20 ms delay. the signal deactivates if one of the following occurs: ? power is turned off. ? the device is disabled for more than 1.0 ms. ? the device exceeded its thermal shutdown threshold for more than 12 s. ? the device is in overvoltage or undervoltage mode for more than 1.0 ms. ? load current exceeded the overcurrent limit for more than 3.0 ms. when the power good output signal becomes inactive, it disables the load, protecting it from any faults or damage. these loads are usually dc/ dc converters, depicted in figure 19 , page 18 . an led can also be connected to pg to indicate that the power is good. the pg and pg pins are referenced to vin and require a pull-up resistor connected to vpwr ( figures 18 and 19 , page 18 ). disabling and enabling the 34652 the disable contro l input (disable) provides two functions: ? external enable/disable control. ? manual resetting of the device and the retry counter after a fault has occurred. using the disable pin, a user can enable /disable the 34652 device, which facilitates easy access to connect the load to or disconnect it from the main power rail. when power is firs t applied, the disable pin must be inactive in order for the 34652 to initiate a start-up sequence. if the disable pin is active , the device makes no further steps until the pin is inactive . if the disable pin is activated at any point during the star t-up and thereafter during normal operation, then the retry count er resets, the power mosfet turns off, and the power good output signals deactivate. the disable circuit is equipped with a 1.0 ms filter to filter out any glitches or transients on the disable input and prevent the power mosfet from turning off prematurely. the disable pin is referenced to vpwr . if left open or connected to vpwr, meaning the volt age at the disable pin is between v pwr + 1.2 v and v pwr - 1.2 v, it is inactive and the device is enabled. if a positive voltage (1.8 v above v pwr ) or a negative voltage (1.8 v below v pwr ) is applied to disable, it is active a nd the device is disabled. charging current limit when the device passes the uvlo threshold, it checks if there is any external resistor or external capacitor connected to the ichg pin. if there is, then it determines the value of the charging current limit value and the charging current limit rise time accordingly. if there is not, it uses the default charging current limit value of 100 ma and rise time of 1.0 ms. note users are allowed to connect an external capacitor to the ichg pin only if an external resistor is also connected. during the external components? check, a capacitor produces an impulse of current and an external resistor will be detected, even it the exte rnal resistor is absent. when the power mosfet is turned on, the current limit is set gradually from 0 a to i chg . this current charges up the load capacitor relatively slowly. when the load capacitor is fully charged, the power mosfet reaches its full enhancement, which triggers the current limit to change from i chg to i lim and the load current to decrease. the power good output signals activate after a 20 ms delay, which in turn enables the load. the 34652 is now in normal operation mode and the retry counter resets. 0 50 100 150 200 250 300 350 400 450 500 550 0 200 400 600 800 1000 1200 ttimer ( ms ) rtimer (kohm)r r timer (k ? ) t timer (ms)
analog integrated circuit device data freescale semiconductor 21 34652 typical applications the low charging current value of i chg is intended to limit the temperature increase during the load capacitor charging process, and the gradual rise to i chg is to prevent transient dips in the input voltage due to sharp increases in the limit current. this prevents the input voltage from drooping due to current steps acting on the input line inductance, and that in turn prevents a premature activation of the uv detection circuit. choosing the external resistor r ichg value the user can change the value of the charging current limit by adding a resistor (r ichg ) between the ichg and vin pins, as shown in figure 19 , page 18 . the charging current value ranges between 50 ma and 500 ma, with a default value of 100 ma. table 7 lists examples of r ichg for different values of i chg and figure 21 shows a plot of r ichg versus i chg . it is recommended that the closest 1% standard resistor value to the actual value be chosen. note accuracy requirements are application dependent. to calculate the value of the r ichg resistor we use the following equations: i chg (a) = [ r ichg (k ? ) + 1.4 k ? ] / 335 r ichg (k ? ) = 335 * i chg (a) - 1.4 k ? table 7. r ichg values for some desired i chg values figure 21. external resistor (r ichg ) value versus charging current limit value (i chg ) choosing the exte rnal capacitor c ichg value the user can also change the charging current rise time by adding a capacitor (c ichg ) between the ichg and vin pins , as shown in figure 19 , page 18 . the charging current rise time ranges between 1.0 ms (default value) and a recommended maximum of 10 ms. table 8 lists examples of c ichg for different values of t ichgr and figure 22 shows a plot of c ichg versus t ichgr . to calculate the value of the c ichg capacitor we use the following equation: c ichg (nf) = 1000 * t ichgr (ms) / [ 3 * r ichg (k ? ) ] i chg (a) r ichg (k ? ) 0.05 15.35 0.1 32.10 0.15 48.85 0.2 65.60 0.25 82.35 0.3 99.10 0.35 115.85 0.4 135.60 0.45 149.35 0.5 166.10 table 8. c ichg values for some desired t ichgr values at a specific i chg value t ichgr (ms) c ichg (nf) i chg = 0.05 a c ichg (nf) i chg = 0.1 a c ichg (nf) i chg = 0.5 a 1.0 21.72 10.38 2.01 2.0 43.43 20.77 4.01 3.0 65.15 31.15 6.02 4.0 86.86 41.54 8.03 5.0 108.58 51.92 10.03 6.0 130.29 62.31 12.04 7.0 152.01 72.69 14.05 8.0 173.72 83.07 16.05 9.0 195.44 93.46 18.06 10 217.16 103.84 20.07 0 20 40 60 80 100 120 140 160 180 0 0.1 0.2 0.3 0.4 0.5 0.6 ichg (a) richg (kohm) r ichg (k ? ) i chg (a)
analog integrated circuit device data 22 freescale semiconductor 34652 typical applications figure 22. charging current external capacitor (c ichg ) versus charging current rise time (t ichgr ) overcurrent limit when in normal operation mode, the 34652 monitors the load and compares (with a hysteresis) the current going through a sensor mosfet with a reference current value generated in reference to the current limit value i lim . if the current going through the sensor mosfet becomes larger than the reference current for more than 100 s, the overcurrent signal is asserted, the gate of the power mosfet is discharged fast (in less than 10 s) to try to regulate the current, and the 34652 is in overcurrent mode for 3.0 ms . if after a 3.0 ms filter time the device is still in overcurrent mode, the device turns off the power mosfet and deactivates the power good output signals. the 34652 then initiates another start-up timer and goes back through the enhancement process. if during the 3.0 ms timer the fault was cleared where the load current was less than i lim minus the hysteresis value, which is 12% of i lim value, then the 34652 goes back to the normal operation mode and the power good output signals stay activated. this way the device overcomes temporary overcurrent situations and at the same time protects the load from more severe overcurrent situations. when the device passes the uvlo threshold, it checks if there is any external resistor connected to the ilim pin. if there is, it determines the value of the overcurrent limit. if there is not, it uses the default overcurrent limit value of 1.0 a. it then uses the sensor mosfet to monitor the load for any overcurrent conditions during operation as explained in the previous paragraph. choosing the external resistor r ilim value the user can change the current limit by adding a resistor (r ilim ) between the ilim and vin pins, as shown in figure 19 , page 18 . this way the 34652 device is adaptable to different requirements and operating environments. the overcurrent value ranges between 0.35 a and 2.25 a, with a default value of 1.0 a. table 9 lists examples of r ilim for different values of i lim and figure 23 shows a plot of r ilim versus i lim . it is recommended that the closest 1% standard resistor value to the actual value be chosen. note accuracy requirements are application dependent. to calculate the value of the r ilim resistor we use the following equations: i lim (a) = 129 / [ r ilim (k ? ) + 1.4 k ? ] r ilim (k ? ) = [ 129 / i lim (a)] - 1.4 k ? figure 23. external resistor (r ilim ) value versus current limit value (i lim ) 0 20 40 60 80 100 120 140 160 180 200 220 01234567891011 tichgr (ms) cichg (nf ) ichg = 0.05 a ichg = 0.1 a ichg = 0.5 a i chg i chg i chg t ichgr (ms) c ichg (nf) table 9. r ilim values for some desired i lim values i lim (a) r ilim (k ? ) i lim (a) r ilim (k ? ) 0.35 367.65 1.5 84.71 0.4 321.52 1.6 79.33 0.5 256.93 1.7 74.58 0.6 213.88 1.8 70.36 0.7 183.12 1.9 66.58 0.8 160.06 2.0 63.18 0.9 142.12 2.1 60.11 1.0 127.77 2.2 57.31 1.1 116.02 2.25 56.01 1.2 106.24 ? ? 1.3 97.96 ? ? 1.4 90.86 ? ? 0 50 100 150 200 250 300 350 400 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.4 ilim (a) rilim (kohm))
analog integrated circuit device data freescale semiconductor 23 34652 typical applications short circuit detection if the current going through the load becomes > 5.0 a, the power mosfet is discharged very fast (in less than 10 s) to try to regulate the current, and the 34652 is in the overcurrent mode for 3.0 ms. then it follows the pattern outlined in the overcurrent limit paragraph above. power mosfet energy capability figure 24 shows a projected energy capability of the device?s internal power mosfet under a drain to source voltage of 82 v and an ambient temperature of 90c. it is compared to the energy levels required for the capacitive loads of 100 f, 200 f, and 400 f at 80 v for the discharge periods of 16 ms, 32 ms, and 64 ms, respectively. it is clear that the power mosfet well exceeds the required energy capability for all three cases with a sufficient margin. for example, the 400 f capacitor load with a 64 ms discharge time requires an energy capability of about 1540 mj, which is well below the power mosfet capability of about 3500 mj. as a result of this analysis, the 33652 is expected to more than m eet all energy capability requirements for the possible capacitive loads. figure 24. projected energy capability of the power mosfet compared to the re quired energy levels of 400 f 200 f 100 f estimated for area =1.7 mm 2 0 500 1000 1500 2000 2500 3000 3500 time (ms) energy (mj) 0204060
analog integrated circuit device data 24 freescale semiconductor 34652 packaging package dimensions packaging package dimensions important for the most current revision of the package, visit www.freescale.com and perform a keyword search on the ?98a? drawing number below: ef suffix (pb-free) 16-pin soic narrow body plastic package 98asb42566b issue m
analog integrated circuit device data freescale semiconductor 25 34652 revision history revision history revision date description of changes 6.0 2/2006 ? changed document order no. 7.0 6/2006 ? changed max on disable input current ? changed overcurrent limit in steady state and in the text on page 11 and page 22 ? updated package dimensions on page 24 8.0 2/2007 ? updated to the current freescale format and style ? added part number mcz34652 in the ordering information ? removed peak package reflow temperature during reflow (solder reflow) parameter from maximum ratings on page 5 . ? added note freescale?s package reflow capability meets pb-free requirements for jedec standard j-std-020c. for peak package reflow temperature and moisture sensitivity levels (msl), go to www.freescale.com, search by par t number [e.g. remove prefixes/suffixes and enter the core id to view all orderable parts. (i.e. mc33xxxd enter 33xxx), and review parametrics. on page 5
mc34652 rev. 8.0 2/2007 information in this document is provided solely to enable system and software implementers to use freescale semiconduc tor products. there are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. freescale semiconductor reserves the right to make changes without further notice to any products herein. freescale semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does freescale semiconductor assume any liability ar ising out of the application or use of any product or circuit, and specifically discl aims any and all liability, including without limitation consequential or incidental damages. ?typical? parameters that may be provided in freescale semiconductor data s heets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals?, must be validated for each customer application by customer?s technical experts. freescale se miconductor does not convey any license under its patent rights nor the rights of others. freescale semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the fa ilure of the freescale semiconductor product could create a situation where personal injury or death may occur. should buyer purchase or use freescale semiconductor products for any such unintended or unauthorized application, buyer shall indemni fy and hold freescale semiconductor and its officers, employees, subsidiaries, affili ates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that freescale semiconductor was negligent regarding the design or manufacture of the part. freescale? and the freescale logo are trademarks of freescale semiconductor, inc. all other product or service names are the property of their respective owners. ? freescale semiconductor, inc., 2007. all rights reserved. how to reach us: home page: www.freescale.com web support: http://www.freescale.com/support usa/europe or locations not listed: freescale semiconductor, inc. technical information center, el516 2100 east elliot road tempe, arizona 85284 +1-800-521-6274 or +1-480-768-2130 www.freescale.com/support europe, middle east, and africa: freescale halbleiter deutschland gmbh technical information center schatzbogen 7 81829 muenchen, germany +44 1296 380 456 (english) +46 8 52200080 (english) +49 89 92103 559 (german) +33 1 69 35 48 48 (french) www.freescale.com/support japan: freescale semiconductor japan ltd. headquarters arco tower 15f 1-8-1, shimo-meguro, meguro-ku, tokyo 153-0064 japan 0120 191014 or +81 3 5437 9125 support.japan@freescale.com asia/pacific: freescale semiconductor hong kong ltd. technical information center 2 dai king street tai po industrial estate tai po, n.t., hong kong +800 2666 8080 support.asia@freescale.com for literature requests only: freescale semiconductor literature distribution center p.o. box 5405 denver, colorado 80217 1-800-441-2447 or 303-675-2140 fax: 303-675-2150 ldcforfreescalesemiconductor@hibbertgroup.com

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