features q 14-, 16-bit resolution q 200, 400 khz; or 1 mhz throughput q dual channel dma controller q 8 differential inputs q expandability up to 256 channels q voltage & current input protection q excellent cmrr q dynamically set gain per channel on dvx 2502 & 2503 every cycle on dvx 2504 q variable sampling rate q multiple sample clock sources q precision internal clock q versatile trigger unit q seven level interrupt q vxi support q dc to dc converter, powered by +5v only q self-test capability q software drivers available applications q real time data acquisition q precision instrumentation q automatic test equipment q monitoring and control q audio q sonar dvx 25xx series multichannel data acquisition/ digitizer systems the dvx 25xx series of high resolution, multichannel data acquisition/ digitizer systems combines the superior precision of 14-, or 16-bit measurements with the high throughput of 200 khz, 400 khz, and 1 mhz, and the compactness of a dual eurocard (6u) vme format (vxi size b). fully compatible with the vme specification rev. c1, and vxi specification rev. 1.3, the dvx 25xx series occupies a single slot in a vme chassis and provides unparalleled price/performance ratio when used either alone or in combination with other vxi/vme based boards (multiplexers, digital-to-analog converters) of the analogic dvx 2xxx family of cards. reflecting analogic? experience in precision instru- mentation, the dvx 25xx series has been designed to meet the strin- gent demands of fast and accurate measurements associated with multi- channel data acquisition applications. eight shielded, differential inputs are provided with both voltage and current protection. each unit is directly expandable to 256 channels with the analogic family of dvx multiplexer boards. the eight input signals are multiplexed via an instrumentation amplifier and a programmable gain amplifier, with four software selectable gains, into an ultrafast, high resolution, sampling analog-to-digital converter. the front-end switching and settling time of the dvx 25xx series have been opti- mized to support the high performance of the a/d converter. the dvx 25xx series provides a powerful 2-channel on-board dma controller as a standard feature. the dma controller executes fast trans- fers over the vmebus sending data directly to system memory, signifi- cantly enhancing total system performance by dramatically reducing the i/o overhead of the bus. once initialized by the host computer, the dma controller operates in transparent mode. three flexible trigger sources are available: a user supplied external trig- ger, an internal trigger, and a data-dependent trigger produced by the occurrence of a prespecified event on a selected channel. before begin- ning the data acquisition, trigger information, as well as channel selec- tion inside a scan, and gain setting are downloaded into the timing and control unit resident on the dvx 25xx series of cards. for ease of inte- gration, fully compatible software drivers are available. no coding is required; all necessary commands are included in the drivers.
call (508) 977-3000, ext. 3876 analog inputs dxv 2502 dvx 2503 dvx 2504 number of channels 8 differential, 8 differential, 8 differential, expandable to 256 expandable to 256 expandable to 256 input ranges gain 1 ?v, ?0v, 0 to +10v ?v, ?0v, 0 to +10v ?0v gain 2 ?.5v, ?v, 0 to +5v ?.5v, ?v, 0 to +5v ?v gain 4 ?.25v, ?.5v, 0 to +2.5v ?.25v, ?.5v, 0 to +2.5v ?.5v gain 8 ?.625v, ?.25v, 0 to +1.25v ?.625v, ?.25v, 0 to +1.25v ?.25v input bias current 5 na max. 5 na max. 5 na max. input resistance 100 m typ. 100 m typ. 100 m typ. input capacitance 70 pf max. 70 pf max. 70 pf max. common mode voltage ?0v max. ?0v max. ?0v max. input overvoltage protection ?5v max. ?5v max. ?5v max. input current protection 50 ma max. 50 ma max. 25 ma max. clock/trigger inputs logic levels, lsttl/cmos compatible logic ? 0.8v max. 0.8v max. 0.8v max. logic ? 2.0v min. 2.0v min. 2.0v min. termination 50 50 50 amplifier characteristics gain 1, 2, 4, 8 (?.02% max.) 1, 2, 4, 8 (?.02% max.) 1, 2, 4, 8 (?.02% max.) offset voltage ?0 mv max. ?0 mv max. ?5 mv max slew rate 12 v/? min. 80 v/? min. 18 v/? min. cmrr 100 db @ 60 hz typ. 100 db @ 60 hz typ. 86 db @ 60 hz min. full power bandwidth 200 khz 400 khz 0.6 mhz settling time (10v step, gain = 1) 1.5 ? typ. to ?.001% 1.5 ? typ. to ?.001% 0.9 ? typ. to ?.008% dynamic characteristics maximum sampling rate 204.8 khz 409.6 khz 1.024 mhz noise (0.5 lsb + 30 ?) rms (0.5 lsb + 50 ?) rms 800 ? rms max. (@ unity gain) (referred to input and measured over 700 khz equivalent noise bandwidth) differential crosstalk ?6 db (@ 1 khz) typ. ?0 db (@ 1 khz) typ. ?3 db (@ 20 khz) max. s/h aperture delay 25 ns typ. 25 ns typ. 20 ns typ. s/h aperture jitter ?00 ps rms max. ?00 ps rms max. ?00 ps rms max. s/h feedthrough ?0 db (@ 1 khz) typ. ?0 db (@ 1 khz) typ. ?5 db (@ 20 khz) typ. peak distortion (2,4) ?6 db typ. (@ 10 khz) ?1 db typ. (@ 10 khz) ?2 db typ. (@ 50 khz) total harmonic distortion (3,4) ?1 db typ. (@ 10 khz) ?0 db typ. (@ 10 khz) ?0 db typ. (@ 50 khz) transfer characteristics resolution 16 bits 16 bits 14 bits quantization error ?.5 lsb max. ?.5 lsb max. ?.5 lsb max. integral non-linearity ?.003% fsr max. ?.003% fsr max. ?.006% fsr max. no missing codes guaranteed from guaranteed from guaranteed from 0? to +50? 0? to +50? 0? to +50? monotonicity guaranteed guaranteed guaranteed specifications 1
dxv 2502 dvx 2503 dvx 2504 stability (0? to +50?) required warm-up time (for ultimate specifications) 15 minutes 15 minutes 15 minutes offset tempco 50 ?/? max. 50 ?/? max. 200 ?/? max. gain tempco 20 ppm fsr/? max. 20 ppm fsr/? max. 20 ppm fsr/? max. differential non-linearity tempco ? ppm fsr/? max. ? ppm fsr/? max. ? ppm/? max. precision clock ?0 ppm, 0-50? ?0 ppm, 0-50? ?0 ppm, 0-50? recommended recalibration 6 months 6 months 6 months trigger (start/stop) modes internal software write to register. software write to register software write to register. automatically synchronized automatically synchronized automatically synchronized with on-board precision clock. with on-board precision clock. with on-board precision clock. external (ttl active low) via front panel bnc via front panel bnc via front panel bnc data dependent generated at the occurrence generated at the occurrence generated at the occurrence of a predefined value, at a of a predefined value, at a of a predefined value, at a monitored channel monitored channel monitored channel sample clock dvx 2502 dvx 2503 dvx 2504 internal via programmable internal via programmable internal via programmable divider and 3.6864 mhz divider and 3.6864 mhz divider and 3.072 mhz ?.001% clock. ?.001% clock. ?.001% clock. produces 3.6k samples/sec produces 3.6k samples/sec produces 3.0k samples/sec to 204.8k samples/sec in to 409.6k samples/sec in to 1024k samples/sec in 1006 steps. 1015 steps. 1021 steps. external, 2.5 mhz to 4.0 mhz, external, 2.5 mhz to 4.0 mhz, external, 2.5 mhz to 4.0 mhz, ttl, 50% duty cycle clock via ttl, 50% duty cycle clock via ttl, 50% duty cycle clock via front panel bnc connector & front panel bnc connector & front panel bnc connector & internal, programmable 10-bit internal, programmable 10-bit internal, programmable 10-bit divider. min. sample rate = divider. min. sample rate = divider. min. sample rate = 2.5 mhz 1023 = 2.4k 2.5 mhz 1023 = 2.4k 2.5 mhz 1023 = 2.4k samples/sec. samples/sec. samples/sec. external, 0 to 204.8 khz external, 0 to 409.6 khz external, 0 to 1024 khz sample clock via front panel sample clock via front panel sample clock via front panel bnc connector or p2 bnc connector or p2 bnc connector or p2 ttltrg line per vxi spec. ttltrg line per vxi spec ttltrg line per vxi spec clock signal is ttl active clock signal is ttl active clock signal is ttl active low, edge triggered with low, edge triggered with low, edge triggered with low period = 150-200 ns. low period = 150-200 ns. low period = 150-200 ns. master/slave(s) for master/slave(s) for master/slave(s) for sychronizing multiple sychronizing multiple sychronizing multiple modules via p2 ttltrg modules via p2 ttltrg modules via p2 ttltrg line per vxi spec. line per vxi spec. line per vxi spec. data transfer output coding binary, offset binary, two? binary, offset binary, two? binary, offset binary, two? complement complement complement via vmebus 16-bit word transfer via 16-bit word transfer via 16-bit word transfer via on-card dma using a 1k on-card dma using a 1k on-card dma using a 1k word fifo buffer word fifo buffer word fifo buffer interrupts fifo status or fifo status or fifo status or dma buffer filled dma buffer filled dma buffer filled via vxi local bus 2 successive bytes 2 successive bytes 2 successive bytes transfer to adjacent slot transfer to adjacent slot transfer to adjacent slot vxi/vme compliance vxi register based, register based, register based, local bus user local bus user local bus user vme a24/16, d16, i1, slave a24/16, d16, i1, slave a24/16, d16, i7, slave a24, d16 master (dma) a24, d16 master (dma) a24, d16, rwd, master (dma)
cal l (978) 977-3000, ext. 3876 dxv 2502 dvx 2503 dvx 2504 scan sequence controller number of steps 1024 1024 1024 gain change capability every scan list entry. every scan list entry. once per scan sequence cycle. rated performance rated performance all entries within a scan list maintained. maintained. must be at same gain maxi. no. of multiplexed channels 256 256 256 front panel indicators pass/fail led green/red green/red green/red busy led red red red channel selection green green green power required +5v supply +4.75v min., +5.25v max. +4.75v min., +5.25v max. +4.75v min., +5.25v max. power consumption 20w max. 20w max. 22w max. environmental and mechanical temperature range rated performance 0? to +50? 0? to +50? 0? to +50? storage ?5? to +75? ?5? to +75? ?5? to +75? relative humidity 0 to 85% non-condensing 0 to 85% non-condensing 0 to 85% non-condensing up to +40? up to +40? up to +40? recommended forced air cooling 1 0 cubic feet per minute 10 cubic feet per minute 10 cubic feet per minute dimensions 6u ( b vxi) 6u ( b vxi) 6u ( b vxi) front panel potential chassis ground chassis ground chassis ground weight 1.75 lb/.79 kg 1.75 lb/.79 kg 1.75 lb/.79 kg notes: 1. unless otherwise noted all specifications apply at +2 5 ?. 2. peak distortion represents the ratio between the highest spurious frequency component below the nyquist rate and the signal. 3. total harmonic distortion represents the ratio between the rms sum of all harmonics up to the 20th harmonic and the rms value of the signal. 4. ?0v input signal. 5. single gain setting per scan . specifications subject to change without notice. ordering guide dvx 2502 16-bit, 200 khz das/digitizer dvx 2502 ?b0 5 ?bipolar, ?v dvx 2502 ?b1 0 ?bipolar, ?0v dvx 2502 ?u1 0 ?unipolar, 0 to ?0v dvx 2503 16-bit, 400 khz das/digitizer dvx 2503 ?b0 5 ?bipolar, ?v dvx 2503 ?b1 0 ?bipolar, ?0v dvx 2503 ?u1 0 ?unipolar, 0 to ?0v dvx 2504-b10 14-bit, 1 mhz das/digitizer 82-5041 dvx 2502 manual 82-5059 dvx 2503 manual 82-5085 dvx 2504 manual
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