View STA533WF_1258097.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

july 2010 doc id 17658 rev 1 1/15 15 STA533WF 18-volt, 3-amp, quad power half bridge features ? multipower bcd technology ? low input/output pulse width distortion ? 200-m ? r dson complementary dmos output stage ? cmos-compatible logic inputs ? thermal protection ? thermal warning output ? undervoltage protection ? short-circuit protection description the STA533WF is a monolithic quad half-bridge stage in multipower bcd technology. the device can be used as a dual bridge or reconfigured, by connecting pin config to pins vdd, as a single bridge with double-current capability. the device is designed for the output stage of a stereo full flexible amplifier (ffx?). it is capable of delivering 10 w x 4 channels into 4- ? loads with 10% thd at v cc =18v in single-ended configuration. it can also deliver 20 w + 20 w into 8- ? loads with 10% thd at v cc = 18 v in btl configuration or, in single parallel btl configuration, 40 w into a 4- ? load with 10% thd at v cc = 18 v. the input pins have a threshold proportional to the voltage on pin vl. the STA533WF comes in a 36-pin powersso package with exposed pad down (epd). powersso36 package with exposed pad down table 1. device summary order code temperature range package packaging STA533WF 0 to 70 c powersso36 epd tube STA533WF13tr 0 to 70 c powersso36 epd tape and reel www.st.com
pin description STA533WF 2/15 doc id 17658 rev 1 1 pin description figure 1. pin out table 2. pin list pin name type description 1 gndsub pwr substrate ground 2, 3 out2b o output half bridge 2b 4 vcc2b pwr positive supply 5 gnd2b pwr negative supply 6 gnd2a pwr negative supply 7 vcc2a pwr positive supply 8, 9 out2a o output half bridge 2a 10, 11 out1b o output half bridge 1b 12 vcc1b pwr positive supply 13 gnd1b pwr negative supply 14 gnd1a pwr negative supply 15 vcc1a pwr positive supply 16, 17 out1a o output half bridge 1a 18 n.c. - no internal connection 19 gndclean pwr logical ground 20 gndreg pwr filtering for regulator; this is an internally generated ground for v dd 21, 22 vdd pwr 5-v regulator referred to ground 23 vl pwr high logical state setting voltage, v l vccsig vccsig vss vss in2b in2a in1b in1a thwarn fault tristate pwrdn config vl vdd vdd gndreg gndclean gndsub out2b out2b vcc2b gnd2b gnd2a vcc2a out2a out2a out1b out1b vcc1b gnd1b gnd1a vcc1a out1a out1a n.c. 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 STA533WF
STA533WF pin description doc id 17658 rev 1 3/15 24 config i configuration pin: 0: normal operation 1: bridges in parallel, see parallel-output and high-current operation on page 8 25 pwrdn i stand-by pin: 0: low-power mode 1: normal operation 26 tristate i hi-z pin: 0: all power amplifier outputs in high-impedance state 1: normal operation 27 fault o fault pin advisor (open-drain device, needs pull-up resistor): 0: fault detected (short circuit or thermal, for example) 1: normal operation 28 thwarn o thermal-warning advisor (open-drain device, needs pull-up resistor): 0: temperature of the ic >130 o c 1: normal operation 29 in1a i input of half bridge 1a 30 in1b i input of half bridge 1b 31 in2a i input of half bridge 2a 32 in2b i input of half bridge 2b 33, 34 vss pwr 5-v regulator referred to +v cc 35, 36 vccsig pwr filtering for regulator, this is an internally generated supply for v ss table 2. pin list (continued) pin name type description
electrical characteristics STA533WF 4/15 doc id 17658 rev 1 2 electrical characteristics unless otherwise stated, the test conditions for ta bl e 6 below are v l = 3.3 v, v cc = 18 v, r l =8 ? , f sw = 384 khz and t amb = 25 c. table 3. absolute maximum ratings symbol parameter value unit v cc dc supply voltage (pins 4, 7, 12, 15) 23 v v lmax voltage on pin 23 4.0 v v inputs voltage on pins 25, 26, 29 to 32 -0.3 to v l + 0.3 v v config voltage on pins 24 -0.3 to v dd + 0.3 v t stg , t j storage and junction temperature -40 to 150 c table 4. recommended operating conditions symbol parameter min typ max unit v cc dc supply voltage (pins 4, 7, 12, 15) 5.0 - 18 v v l input logic reference 2.7 3.3 3.6 v t amb ambient temperature 0 - 70 c table 5. thermal data symbol parameter min typ max unit t j-case thermal resistance junction to case (thermal pad) - - 1.5 c/w t jsd thermal shut-down junction temperature - 150 - c t warn thermal warning temperature - 130 - c t hsd thermal shut-down hysteresis - 25 - c table 6. electrical characteristics symbol parameter test conditions min typ max unit p out output power in btl mode thd+n > 10% - 20 - w r dson power p-channel/n-channel mosfet on resistance i dd = 1 a - 180 230 m ? i dss power p-channel/n-channel leakage - --10 a g n power p-channel r dson matching i dd = 1 a 95--% g p power n-channel r dson matching i dd = 1 a 95--% dt_s low current dead time (static) see figure 2 - 5 10 ns
STA533WF electrical characteristics doc id 17658 rev 1 5/15 dt_d high current dead time (dynamic) l = 22 h, c = 470 nf r l = 8 ? , i dd = 2.0 a see figure 3 - 1020ns t d_on turn-on delay time resistive load - 40 60 ns t d off turn-off delay time resistive load - 40 60 ns t r rise time resistive load see figure 2 - 8 10 ns t f fall time resistive load see figure 2 - 8 10 ns v in-low half-bridge input, low-level voltage - - - v l / 2 - 300 mv v v in-high half-bridge input, high-level voltage - v l / 2 + 300 mv - - v i in-h high-level input current v in = v l -1- a i in-l low-level input current v in = 0.3 v - 1 - a i pwrdn-h high level pwrdn pin input current v l = 3.3 v - 35 - a v low low logical state voltage (pins pwrdn, tristate) v l = 3.3v --0.8v v high high logical state voltage (pins pwrdn, tristate) v l = 3.3 v 1.7 - - v i vcc- pwrdn supply current from v cc in power down mode v pwrdn = 0 v --10a i fault output current on pins fault, thwarn with fault condition v pin = 3.3v -1-ma i vcc-hiz supply current from v cc in 3-state v tristate = 0 v - 22 - ma i vcc supply current from v cc in operation (both channels switching) input pulse width = 50% duty, switching frequency = 384 khz, no lc filters -50-ma i ocp overcurrent protection threshold (short-circuit current limit) -3.04.0-a v uvp undervoltage protection threshold --3.54.3v t pw_min output minimum pulse width no load 70 - 150 ns table 6. electrical characteristics (continued) symbol parameter test conditions min typ max unit
electrical characteristics STA533WF 6/15 doc id 17658 rev 1 test circuits figure 2. test circuit figure 3. current dead time test circuit table 7. logic truth table pin pwrdn pin tristate inputs as per figure 3 transistors as per figure 3 output mode inxa inxb q1 q2 q3 q4 0 0 x x off off off off hi z 1 1 0 0 off off on on dump 1 1 0 1 off on on off negative 1 1 1 0 on off off on positive 1 1 1 1 on on off off not used low current dead time = max(dtr,dtf) outxy vcc (3/4)vcc (1/2)vcc (1/4)vcc t dtf dtr duty cycle = 50% inxy outxy gnd +vcc r 8 ? + - vdc = vcc/2 d03au1458 high current dead time for bridge application = abs(dtout(a)-dtin(a))+abs(dtout(b)-dtin(b)) +v cc rload=8 ? q2 outxb dtout(b) dtin(b) dtout(a) 470nf 470nf 470nf iout iout q4 q1 q3 inxb d00au1162_00 inxa dtin(a) duty cycle=a duty cycle=b duty cycle a and b: fixed to have dc output current of iout in the direction shown in figure 22 22 outxa
STA533WF applications information doc id 17658 rev 1 7/15 3 applications information the STA533WF is a dual-channel h-bridge audio power amplifier that can deliver 20 w per channel into 8 ? with 10% thd at v cc = 18 v with high efficiency. the STA533WF converts both ffx and binary-logic-controlled pwm signals into audio power at the load. it includes a logic interface, integrated bridge drivers, high-efficiency mosfet outputs and thermal and short-circuit protection circuitry. in ffx mode, two logic-level signals per channel are used to control the high-speed mosfet switches which drive the speaker load in a bridge configuration, according to the damped ternary modulation operation. in binary mode, both full-bridge and half-bridge modes are supported. the STA533WF includes overcurrent and thermal protection as well as an undervoltage lockout with automatic recovery. a therma l warning status is also provided. figure 4. block diagram for ffx or binary modes figure 5. block diagram for binary half-bridge mode logic interface and decode the STA533WF power outputs are controlled using one or two logic-level timing signals. in order to provide a proper logic interface, pin vl must have the same voltage as the pwm input signal. logic interface and decode outpl outnl left h-bridge protection circuit regulators outpr outnr right h-bridge inl[1,2] vl pwrdn tristate fault thwarn inr[1,2] outpl left a bridge logic interface and decode protection circuit regulators inl[1,2] vl pwrdn tristate fault thwarn inr[1,2] outnl left b bridge outpr right a bridge outnr right b bridge
applications information STA533WF 8/15 doc id 17658 rev 1 protection circuits the STA533WF includes protection circuitry for overcurrent and thermal overload conditions. a thermal warning pin (thwarn) is activated low (open-drain mosfet) when the ic temperature exceeds 130 c, which is in advance of the thermal shutdown protection. when a fault condition is detected an internal fault signal acts to immediately disable the output power mosfets, placing both h-bridges in the high-impedance state. at the same time an open-drain mosfet connected to pin fault is switched on. there are two possible modes subsequent to activating a fault: z shutdown mode: with pins fault (with pull-up resistor) and tristate independent, an activated fault disables the device, signalling low at pin fault. the device may subsequently be reset to normal operation by toggling pin tristate from high to low and back to high using an external logic signal. z automatic recovery mode: this is shown in the applications circuit in figure 6 and figure 7 on page 10 . pins fault and tristate are shorted toge ther and connected to a time constant circuit comprising r59 and c58. an activated fault forces a reset on pin tristate causing normal operation to resume following a delay determined by the time constant of the circuit. if the fault condition is still present this operation contin ues to repeat until the fault condition is removed. an increase in the time constant of the circuit produces a longer recovery interval. care must be taken in the overall system design so as not to exceed the protection thresholds under normal operation. power outputs the STA533WF power and output pins are duplicated to provide a low-impedance path for the device bridged outputs. all duplicated po wer, ground and output pins must be connected for reliable operation. pins pwrdn or tristate should be used to set all mosfets to the high-impedance state during power-up and until the logic power supply on pin vl has settled. parallel-output and high-current operation when using ffx mode, the STA533WF outputs can be connected in parallel to increase the output current capability. in this configuration the devi ce can provide 40 w into 4 ? . this mode of operation is enabled with pin config connected to v dd . the inputs must be combined to give inla = inlb and inra = inrb, then the corresponding outputs can be shorted together to give outla = outlb and outra = outrb. the snubber rc network shown in the applications figures must be placed as close as possible to the output pins. this reduces ringing, over- and undervoltage effects, and improves the audio quality and emi performance.
STA533WF applications information doc id 17658 rev 1 9/15 supply decoupling capacitors to meet the performance figures given in this datasheet the STA533WF power supply must be adequately filtered. for this purpose capacitors connected from pi ns vcc1 to gnd1 and from vcc2 to gnd2 must be placed as close as possi ble to the related ic pins. for reliability and optimum performance the following capacitors are suggested: z 100-nf ceramic capacitor with lead length less than 2 mm, connected to the ground plane and as close as possible to the gnd pin z 1-uf x7r (low esr) capacitors. pin gndreg is used to filter the internal reference voltage v dd ; this pin must not be connected to other ground pins, it is an internally generated supply. pin vccsig is used to filter the internal reference voltage v ss ; this pin must not be connected to other supply pins, it is an internally generated supply. output filter a passive 2nd-order filter is used on the STA533WF power outputs to reconstruct an analog audio signal. the system perform ance can be significantly affected by the output filter design and choice of passive components. filter designs for 4- ? and 8- ? loads are shown in the applications circuits below. applications circuits figure 6 below shows a typical full-bridge circuit for supplying 20 w + 20 w into 8- ? speakers with 10% thd when v cc = 18 v. figure 7 below shows a single-btl configuration capable of supplying 40 w into a 4- ? load at 10% thd when v cc = 19 v. this result was obtained with peak power for <1 s using the sta308+STA533WF+sta 50x demo board. for both applications circuits a pwm modulator is required as driver.
applications information STA533WF 10/15 doc id 17658 rev 1 figure 6. applications circuit for stereo full-bridge configuration figure 7. applications circuit for single-btl configuration c38 1nf c39 1nf l5 22uh l6 22uh c40 1nf c41 1nf c42 100nf c43 100nf c44 470nf c45 330pf c46 100nf r11 22 1 2 j3 left 8ohm c47 100nf r12 6.2 r13 6.2 l3 22uh l4 22uh c35 1nf c37 1nf c28 100nf c20 100nf c24 470nf c26 330pf c27 100nf r6 22 1 2 j2 right 8ohm c21 100nf r7 6.2 r9 6.2 + c36 1000uf/25v th w 3v3 r10 10k right_b vcc right_a r8 10k c31 100nf c22 100nf gndsub 1 out2b 2 out2b 3 vcc2b 4 gnd2b 5 gnd2a 6 vcc2a 7 out2a 8 out2a 9 out1b 10 out1b 11 vcc1b 12 gnd1b 13 gnd1a 14 vcc1a 15 out1a 16 out1a 17 nc 18 gndclean 19 gndreg 20 vdd 21 22 vl 23 config 24 pwrdn 25 tristate 26 fault 27 thwarn 28 in1a 29 in1b 30 in2a 31 in2b 32 vss 33 vss 34 vccsig 35 vccsig 36 u2 STA533WF left_b 3v3 c30 100nf c29 100nf c25 1uf 25v c23 100nf c33 1uf 25v c32 100nf eapd left_a vdd c10 220nf r4 3r3 r2 3r3 c7 220nf c9 1nf + c19 1000uf/25v c18 100nf th w 1 2 j1 out 4ohm r3 10 c8 1uf c4 220nf r5 10k c3 680pf c11 220nf vcc r1 10k c14 100nf c2 100nf gndsub 1 out2b 2 out2b 3 vcc2b 4 gnd2b 5 gnd2a 6 vcc2a 7 out2a 8 out2a 9 out1b 10 out1b 11 vcc1b 12 gnd1b 13 gnd1a 14 vcc1a 15 out1a 16 out1a 17 nc 18 gndclean 19 gndreg 20 vdd 21 vdd 22 vl 23 config 24 pwrdn 25 tristate 26 fault 27 thwarn 28 in1a 29 in1b 30 in2a 31 in2b 32 vss 33 34 vccsig 35 vccsig 36 u1 STA533WF 3v3 c13 100nf c12 100nf c6 1uf 25v c1 100nf l1 10uh c17 1uf 25v l2 10uh c15 100nf eapd c5 1nf c16 1nf input_a input_b vss 3v3
STA533WF heatsink requirements doc id 17658 rev 1 11/15 4 heatsink requirements using the STA533WF mounted on a double-layer pcb having 2 copper ground areas of 3x3cm 2 and with 16 via holes the junction to ambient thermal resistance is approximately 24 c/w in natural air convection. figure 8. double-layer pcb with copper ground areas and 16 via holes with the dissipated power within the device depending primarily on the supply voltage, the load impedance and the output modulation level, the maximum estimated dissipated power, pdmax, for the STA533WF is: 4 w for 2 x 20 w into 8 ? at 18 v < 5 w for 2 x 10 w into 8 ? + 1 x 20 w into 4 ? at 18 v. the figure below shows the power derating curve for the powersso36 epd package on pcbs with copper areas of 2 x 2 cm 2 and 3 x 3 cm 2 . figure 9. power derating curves for pcb used as heatsink 0 1 2 3 4 5 6 7 8 0 20 40 60 80 100 120 140 160 pd (w) tamb ( c) copper area 2x2 cm and via holes tda7491p psso36 copper area 3x3 cm and via holes STA533WF powersso36
package mechanical data STA533WF 12/15 doc id 17658 rev 1 5 package mechanical data the STA533WF comes in a 36-pin powersso package with exposed pad down (epd). figure 10 below shows the package outline and ta bl e 8 gives the dimensions. in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. table 8. powersso36 epd dimensions symbol dimensions in mm dimensions in inches min typ max min typ max a 2.15 - 2.47 0.085 - 0.097 a2 2.15 - 2.40 0.085 - 0.094 a1 0.00 - 0.10 0.000 - 0.004 b 0.18 - 0.36 0.007 - 0.014 c 0.23 - 0.32 0.009 - 0.013 d 10.10 - 10.50 0.398 - 0.413 e 7.40 - 7.60 0.291 - 0.299 e - 0.5 - - 0.020 - e3 - 8.5 - - 0.335 - f - 2.3 - - 0.091 - g- - 0.10 - - 0.004 h 10.10 - 10.50 0.398 - 0.413 h- - 0.40 - - 0.016 k 0 - 8 degrees 0 - 8 degrees l 0.60 - 1.00 0.024 - 0.039 m - 4.30 - - 0.169 - n - - 10 degrees - - 10 degrees o - 1.20 - - 0.047 - q - 0.80 - - 0.031 - s - 2.90 - - 0.114 - t - 3.65 - - 0.144 - u - 1.00 - - 0.039 - x 4.10 - 4.70 0.161 - 0.185 y 6.50 - 7.10 0.256 - 0.280
STA533WF package mechanical data doc id 17658 rev 1 13/15 figure 10. powersso36 epd outline drawing h x 45
revision history STA533WF 14/15 doc id 17658 rev 1 6 revision history table 9. document revision history date revision changes 02-jul-2010 1 initial release.
STA533WF doc id 17658 rev 1 15/15 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2010 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

▲Up To Search▲

Price & Availability of STA533WF

	To Download STA533WF Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .