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| BF 1009 Silicon N-Channel MOSFET Tetrode For low noise, high gain controlled input stages up to 1GHz Operating voltage 9 V Integrated stabilized bias network Drain AGC HF Input G2 G1 HF Output + DC 3 4 2 1 VPS05178 Storage temperature Channel temperature Thermal Resistance Channel - soldering point Rthchs Note: It is not recommended to apply external DC-voltage on Gate 1 in active mode. GND EHA07215 ESD: Electrostatic discharge sensitive device, observe handling precaution! Type BF 1009 Maximum Ratings Parameter Drain-source voltage Marking JKs 1=S Pin Configuration 2=D 3 = G2 4 = G1 Package SOT-143 Unit V mA V mW C Symbol VDS ID IG1/2SM +VG1SE 76 C0 Ptot Tstg Tch Value 12 25 10 3 200 -55 ... 150 150 Continuos drain current Gate 1/gate 2 peak source current Gate 1 (external biasing) Total power dissipation, TS 370 K/W 1 May-05-1999 BF 1009 Electrical Characteristics at T A = 25C, unless otherwise specified. Symbol Values Parameter min. DC characteristics Drain-source breakdown voltage I D = 300 A, V G1S = 0 V, V G2S = 0 V Gate 1 - source breakdown voltage +I G1S = 10 mA, VG2S = 0 V, V DS = 0 V Gate 2 source breakdown voltage I G2S = 10 mA, VG1S = 0 V, V DS = 0 V Gate 1 source current VG1S = 6 V, V G2S = 0 V Gate 2 source leakage current V G2S = 8 V, VG1S = 0 V, V DS = 0 V Drain current VDS = 9 V, V G1S = 0 , V G2S = 6 V Operating current (selfbiased) VDS = 9 V, V G2S = 6 V Gate 2-source pinch-off voltage VDS = 9 V, ID = 100 A VG2S(p) 0.9 I DSS I DSO 8 10 500 I G2SS 50 +I G1SS 60 V (BR)G2SS 9 12 +V (BR)G1SS 8 12 V(BR)DS 16 typ. max. Unit V A nA A mA V AC characteristics Forward transconductance (self biased) VDS = 9 V, VG2S = 6 V Gate 1-input capacitance (self biased) VDS = 9 V, VG2S = 6 , f = 1 MHz Output capacitance (self biased) VDS = 9 V, VG2S = 6 , f = 100 MHz Power gain (self biased) VDS = 9 V, VG2S = 6 , f = 800 MHz Noise figure (self biased) VDS = 9 V, VG2S = 6 , f = 800 MHz VDS = 9 V, VG2S = 6 ... 0V, f = 800 MHz 2 gfs Cg1ss Cdss Gps F800 Gps 40 24 2.1 0.9 22 1.4 50 2.5 - mS pF dB Gain control range (self biased) May-05-1999 BF 1009 Total power dissipation Ptot = f (TS ) Drain current ID = f (VG2S) 300 11 mA mW 9 8 P tot 200 ID 150 100 50 0 0 120 C 7 6 5 4 3 2 1 20 40 60 80 100 150 0 0.0 1.0 2.0 3.0 4.0 V 6.0 TS VG2S Insertion power gain | S21 | 2 = f (VG2S ) 10 dB Forward transfer admittance | Y 21 | = f (V G2S) 26 mS 22 -5 20 -10 -15 -20 -25 -30 -35 -40 -45 -50 -55 -60 -65 0.0 1.0 2.0 3.0 4.0 V | S21 |2 |Y21| 18 16 14 12 10 8 6 4 2 6.0 0 0.0 1.0 2.0 3.0 4.0 V 6.0 VG2S VG2S 3 May-05-1999 BF 1009 Gate 1 input capacitance Cg1ss = f (Vg2s) f = 200MHz 3.2 pF Output capacitance C dss = f (V G2S) f = 200MHz 3.2 mA 2.4 2.4 Cg1ss 2.0 Cdss V 2.0 1.6 1.6 1.2 1.2 0.8 0.8 0.4 0.4 0.0 0.0 1.0 2.0 3.0 4.0 6.0 0.0 0.0 1.0 2.0 3.0 4.0 V 6.0 VG2S VG2S 4 May-05-1999 |
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