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 S3C9614/P9614
PRODUCT OVERVIEW
1
PRODUCT OVERVIEW
SAM87RI PRODUCT FAMILY
Samsung's SAM87RI family of 8-bit single-chip CMOS microcontrollers offer fast and efficient CPU, a wide range of integrated peripherals, and supports OTP device. A dual address/data bus architecture and bit- or nibble-configurable I/O ports provide a flexible programming environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating modes are included to support real-time operations.
S3C9614/P9614 MICROCONTROLLER
The S3C9614/P9614 microcontroller with USB function can be used in a wide range of general purpose applications. It is especially suitable for mouse or joystick controller and is available in 20-pin DIP and 24-pin SOP package. The S3C9614/P9614 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is built around the powerful SAM87RI CPU core. Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register space, the size of the internal register file was logically expanded. The S3C9614/P9614 has 4K-bytes of program memory on-chip and 208 bytes of RAM including 16 bytes of working register. Using the SAM87Ri design approach, the following peripherals were integrated with the SAM87Ri core: -- Two configurable I/O ports (11 pins) -- 7 bit-programmable pins for external interrupts -- 8-bit timer/counter with two operating modes
OTP
The S3C9614 microcontroller is also available in OTP (One Time Programmable) version, S3P9614. S3P9614 microcontroller has an on-chip 4K-byte one-time-programmable EPROM instead of masked ROM. The S3P9614 is comparable to S3C9614, both in function and in pin configuration.
1-1
PRODUCT OVERVIEW
S3C9614/P9614
FEATURES
1-2
S3C9614/P9614
PRODUCT OVERVIEW
CPU * SAM87RI CPU core
Timer/Counter * One 8-bit basic timer for watchdog function and programmable oscillation stabilization interval generation function One 8-bit timer/counter with Compare/Overflow counter
Memory * * * 4K-byte internal program memory (ROM) 208-byte RAM 16 bytes of working register *
USB Serial Bus * * Compatible to USB low speed (1.5 Mbps) device 1.0 specification. Serial bus interface engine (SIE) -- Packet decoding/generation -- CRC generation and checking -- NRZI encoding/decoding and bit-stuffing * Two 8-byte receive/transmit USB buffer
Instruction Set * * 41 instructions IDLE and STOP instructions added for powerdown modes
Instruction Execution Time * 1.0 s at 6 MHz fOSC
Interrupts * * 12 interrupt sources with one vector One level, one vector interrupt structure
Operating Temperature Range * - 40C to + 85C
Operating Voltage Range * 4.0 V to 5.25 V
Oscillation Circuit Options * * 6 MHz crystal/ceramic oscillator External clock source
Package Types * * 20-pin DIP 24-pin SOP
General I/O * 11 bit-programmable I/O pins
Comparator * * 4-channel mode, 4-bit resolution 3-channel mode, external reference low EMI design
1-3
S3C9614/P9614
PRODUCT OVERVIEW
BLOCK DIAGRAM
RESET TEST I/O PORT AND INTERRUPT CONTROL OSC
XIN XOUT
PORT 1/ COMPARATOR
P1.0/CIN0/SCLK P1.1/CIN1/SDAT P1.2/CIN2 P1.3/CIN3 P1.4/INT1 P1.5/INT1 P1.6/INT1 P1.7/INT1
BASIC TIMER
SAM87RI CPU
PORT 0
P0.0/INT0 P0.1/INT0 P0.2/INT0
TIMER 0
4-KB ROM
208-BYTE REGISTER
USB SIE
D+ D3.3Vout
Figure 1-1. Block Diagram
1-5
PRODUCT OVERVIEW
S3C9614/P9614
PIN ASSIGNMENTS
VSS XOUT XIN TEST P0.0/INT0 P0.1/INT0 RESET P0.2/INT0 P1.7/INT1 P1.6/INT1
1 2 3 4 5 6 7 8 9 10
20 19 18 17
VDD P1.0/CIN0 P1.1/CIN1 P1.2/CIN2 P1.3/CIN3 P1.4/INT1 P1.5/INT1 3.3 VOUT D+ D-
S3C9614 20-DIP
(Top View)
16 15 14 13 12 11
Figure 1-2. Pin Assignment Diagram (20-Pin DIP Package)
1-6
S3C9614/P9614
PRODUCT OVERVIEW
VSS XOUT XIN NC TEST P0.0/INT0 P0.1/INT0 RESET NC P0.2/INT0 P1.7/INT1 P1.6/INT1
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20
VDD P1.0/CIN0 P1.1/CIN1 NC P1.2/CIN2 P1.3/CIN3 P1.4/INT1 P1.5/INT1 NC 3.3 VOUT D+ D-
S3C9614 24-SOP
(Top View)
19 18 17 16 15 14 13
Figure 1-3. Pin Assignment Diagram (24-Pin SOP Package)
1-7
PRODUCT OVERVIEW
S3C9614/P9614
PIN DESCRIPTIONS
Table 1-1. S3C9614/P9614 Pin Descriptions Pin Names P0.0-P0.2 Pin Type I/O Pin Description Bit-programmable I/O port for Schmitt trigger input or push-pull output. Pull-up resistors are individually assignable to input pins by software and are automatically disable for output pins. Port0 can be individually configured as external interrupt inputs. Bit-programmable I/O port for Schmitt trigger input or push-pull output. Pull-up resistors are individually assignable to input pins by software. Port1.0-1.3 can be configured as comparator input Bit-programmable I/O port for Schmitt trigger input or push-pull output. Pull-up resistors are individually assignable to input pins by software and are automatically disabled for output pins. Port1.4-1.7 can be individually configured as external interrupt inputs. Only used as USB tranceive/receive port. Internal regulator 3.3 V output pin for referencing the voltage System clock input and output pin (crystal/ceramic oscillator, or external clock source) External interrupt for bit-programmable port0. External interrupt for bit-programmable port1 RESET signal input pin. Test signal input pin (for factory use only; must be connected to VSS) Power input pin VSS is a ground power for CPU core. Circuit Number D Pin Numbers 5, 6, 8 Share Pins INT0
P1.0-P1.3
I/O
F-8
19-16
CIN0- CIN3
P1.4-P1.7
I/O
D
15, 14, 10, 9
INT1
D+/D3.3VOUT XIN, XOUT
I/O O -
- - -
12-11 13 3-2
- - -
INT0 INT1 RESET TEST VDD VSS
I I I I - -
D D - - - -
5, 6, 8 9, 10, 14, 15 7 4 20 1
Port0 Port1 - - - -
1-8
S3C9614/P9614
PRODUCT OVERVIEW
Pin Circuits Table 1-2. Pin Circuit Assignments for the S3C9614/P9614 Circuit Number C D F-8 Circuit Type O I/O I/O Port0, Port1.4-1.7, INT0, INT1 Port1.0-1.3 S3C9614/P9614 Assignments
NOTE: Diagrams of circuit types C-D, and F-8 are presented below.
VDD
VDD
DATA OUT
PULL-UP ENABLE DATA CIRCUIT TYPE C
OUTPUT DISABLE
OUTPUT DISABLE
IN/OUT
Figure 1-4. Pin Circuit Type C
Figure 1-5. Pin Circuit Type D
1-9
PRODUCT OVERVIEW
S3C9614/P9614
VDD
PULL-UP ENABLE VDD DATA OUTPUT DISABLE CIRCUIT TYPE C IN/OUT
ANALOG/ EXTERNAL VREF INPUT
Figure 1-6. Pin Circuit Type F-8
1-10
S3C9614/P9614
PRODUCT OVERVIEW
Right Button
KS86P6104 S3C9614
CON_B XIN XOUT P0.0/INT0 1
Button 23
Left Button Button
VDD C3 VSS C4 V3.3 USB Cable 5 4 3 2 1 R2 RESET P1.1/CIN1 C1 R3 P0.2/INT0 C2 5 4 3 2 1 P1.0/CIN0 R1 P1.7/INT1 P0.1/INT0
1
2
3
2 DD+ P1.2/CIN2 P1.3/CIN3 1 2 3 1 2 1 2 3 1 + +
Figure 1-7. USB Mouse Circuit Diagram
Array 4
1-11
S3C9614/P9614
ELECTRICAL DATA
13
OVERVIEW
-- I/O capacitance
ELECTRICAL DATA
In this section, the following S3C9614/P9614 electrical characteristics are presented in tables and graphs: -- Absolute maximum ratings -- D.C. electrical characteristics -- A.C. electrical characteristics -- Input timing for RESET -- Oscillator characteristics -- Operating voltage range -- Oscillation stabilization time -- Clock timing measurement points at XIN -- Data retention supply voltage in Stop mode -- Stop mode release timing when initiated by a RESET -- Stop mode release timing when initiated by an external interrupt -- Characteristic curves -- Comparator Electrical Characteristics
13-1
ELECTRICAL DATA
S3C9614/P9614
Table 13-1. Absolute Maximum Ratings (TA = 25C) Parameter Supply voltage Input voltage Output voltage Output current high Output current low Operating temperature Storage temperature Symbol VDD VIN VO I OH I OL TA TSTG All in ports All output ports One I/O pin active All I/O pins active One I/O pin active Total pin current for ports 0, 1 - - Conditions - Rating - 0.3 to + 6.5 - 0.3 to VDD + 0.3 - 0.3 to VDD + 0.3 - 18 - 60 + 30 + 100 - 40 to +85 - 65 to + 150
C C
Unit V V V mA mA
13-2
S3C9614/P9614
ELECTRICAL DATA
Table 13-2. D.C. Electrical Characteristics (TA = - 40C to + 85C, VDD = 4.0 V to 5.25 V) Parameter Input highvoltage Symbol VIH1 VIH2 Input low voltage VIL1 VIL2 Output high voltage VOH XIN All input pins except VIL2, D+, D- XIN VDD = 4.5 V - 5.5 V IOH = - 200 A All output ports except D+, D- VDD = 4.5 V - 5.5 V IOL = 2 mA All output ports except D+, D- VIN = VDD All inputs except ILIH2 except D+, D- VIN = VDD XIN, XOUT VIN = 0 V All inputs except ILIL2 except D+, D- VIN = 0 V XOUT, XIN VOUT = VDD All output pins except D+, D- VOUT = 0 V All output pins except D+, D- VIN = 0 V; VDD = 5.0 V, VIN = 0 V; VDD = 5.0 V, RESET only Supply current (note) IDD1 IDD2 IDD3 Normal operation mode 6-MHz CPU clock Idle mode; 6-MHz CPU clock Stop mode; oscillator stop
-
Conditions All input pins except VIH2, D+, D-
Min 0.8 VDD VDD - 0.5 - - VDD - 1.0
Typ -
Max VDD VDD 0.2 VDD 0.4 -
Unit V
- - -
V
V
Output low voltage
VOL
-
-
0.4
V
Input high leakage current
ILIH1
-
-
3
A
ILIH2 Input low leakage current ILIL1
- -
- -
20 -3 A
ILIL2 Output high leakage current Output low leakage current Pull-up resistors ILOH ILOL RL1 RL2
- - - 25 100
- - - 50 220 6.5 4 150
- 20 3 -3 100 400 15 8 300 mA mA A A A K
- -
NOTES: 1. Supply current does not include current drawn through internal pull-up resistors or external output current load. 2. This parameter is guaranteed, but not tested (include D+, D-). 3. Only in 4.2 V to 5.25 V, D+ and D- satisfy the USB spec 1.0.
13-3
ELECTRICAL DATA
S3C9614/P9614
Table 13-3. Input/Output Capacitance (TA = - 40C to + 85C, VDD = 0 V) Parameter Input capacitance Output capacitance I/o capacitance Symbol CIN COUT CIO Table 13-4. A.C. Electrical Characteristics (TA = - 40C to + 85C, VDD = 4.0 V to 5.25 V) Parameter Noise filter RESET input low width Symbol tNF2 tRSL Conditions RESET only (RC delay) Input Min 100 - 10 Typ - 800 - Max 200 - - s Unit ns tNF1H, tNF1L P1 (RC delay) Conditions f = 1 MHz; unmeasured pins are connected to VSS Min - Typ - Max 10 Unit pF
t NF1L
t NF1H
t NF2
0.8 V DD 0.2 V DD
0.5 V DD
t RSL
RESET
0.5VDD
Figure 13-1. Input Timing for RESET
13-4
S3C9614/P9614
ELECTRICAL DATA
Table 13-5. Oscillator Characteristics (TA = - 40C + 85C) Oscillator Main crystal Main ceramic (fOSC) Clock Circuit
XIN
C1
Test Condition Oscillation frequency VDD = 4.0 V - 5.25 V
Min -
Typ 6.0
Max -
Unit MHz
C2
XOUT
External clock
XIN XOUT
Oscillation frequency VDD = 4.0 V - 5.25 V
-
6.0
-
Table 13-6. Oscillation Stabilization Time (TA = - 40C + 85C, VDD = 4.0 V to 5.25 V) Oscillator Main crystal Main ceramic Oscillator stabilization wait time Test Condition VDD = 4.5 V to 5.5 V, fOSC > 6.0 MHz (Oscillation stabilization occurs when VDD is equal to the minimum oscillator voltage range.) tWAIT stop mode release time by a reset Min - Typ - Max 10 Unit ms
-
216/fOSC
-
tWAIT stop mode release time by an interrupt
-
-
-
NOTE: The oscillator stabilization wait time, tWAIT, when it is released by an interrupt, is determined by the setting in the basic timer control register, BTCON.
13-5
ELECTRICAL DATA
S3C9614/P9614
1 / f OSC
tXL
tXH
XIN
VDD - 0.5 V
0.4 V
Figure 13-2. Clock Timing Measurement Points at XIN
Table 13-7. Data Retention Supply Voltage in Stop Mode (TA = 0C to + 70C) Parameter Data retention supply voltage Data retention supply current Symbol VDDDR IDDDR Conditions Stop mode Stop mode; VDDDR = 2.0 V Min 2.0 - Typ - - Max 6 5 Unit V A
13-6
S3C9614/P9614
ELECTRICAL DATA
INTERNAL RESET
STOP MODE DATA RETENTION MODE
IDLE MODE (BASIC TIMER ACTIVE)
VDD
VDDDR RESET EXECUTION OF STOP 0.5 V DD t WAIT
NORMAL OPERATING MODE
Figure 13-3. Stop Mode Release Timing When Initiated by a RESET
STOP MODE DATA RETENTION MODE
IDLE MODE (BASIC TIMER ACTIVE)
VDD
VDDDR EXTERNAL INTERRUPT EXECUTION OF STOP INSTRUCTION 0.8 VDD 0.2 VDD tWAIT
NORMAL OPERATING MODE
Figure 13-4. Stop Mode Release Timing When Initiated by an External Interrupt
13-7
ELECTRICAL DATA
S3C9614/P9614
Table 13-8. Comparator Electrical Characteristics (TA = - 40C to + 85C, VDD = 4.0 V to 5.25 V) Parameter Conversion time (1) Symbol tCON Conditions - Min - Typ 4 x 24 or 4 x 27 - 1000 - - - 1 0.5 100 Max - Unit FCPU
Comparator input voltage Comparator input impedance Comparator reference voltage Comparator input current Reference input current Comparator block current (2)
VICN RCN VREF ICIN IREF ICOM VDD = 5 V VDD = 5 V VDD = 5.5 V VDD = 4.5 V
- - -
VSS 2 1.8 -3 -3 -
VDD - VDD 3 3 2 1 500
V M V A A mA mA nA
VDD = 5 V (when power down mode)
NOTES: 1. Conversion time is the time required from the moment a conversion operation starts until it ends. 2. ICOM is an operating current during conversion.
13-8
S3C9614/P9614
ELECTRICAL DATA
Table 13-9. Low Speed Source Electrical Characteristics (USB) (TA = - 40C to + 85C, Voltage Regulator Output V33out = 2.8 V to 3.5 V, typ 3,3 V) Parameter Transition Time: Rise Time Fall Time Rise/Fall Time Matching Output Signal Crossover Voltage Voltage Regulator Output Voltage Symbol Tr Tf Trfm Vcrs Conditions CL = 50 pF CL = 350 pF CL = 50 pF CL = 350 pF (Tr/Tf) CL = 50 pF CL = 50 pF Min 75 - 75 - 70 1.3 2.8 Max - 300 - 300 130 2.0 3.5 % V V Unit ns
V33OUT with V33OUT to GND 0.1 F capacitor
Test Point S/W D.U.T R1 CL
2.8V R2
10%
90%
90%
MEASUREMENT POINTS
10%
Tr
Tf
R1 = 15 K R2 = 1.5 K CL = 50pF-350pF
DM: S/W ON DP: S/W OFF
Figure 13-5. USB Data Signal Rise and Fall Time
DP Vcrs
3.3 V MAX: 2.0 V MIN: 1.3 V
DM
0V
Figure 13-6. USB Output Signal Crossover Point Voltage
13-9
S3C9614/P9614
MECHANICAL DATA
14
OVERVIEW
-- Pad diagram
MECHANICAL DATA
This section contains the following information about the device package: -- Package dimensions in millimeters
#20 6.40 0.2
#11
0-15
7.62
#1
#10
26.40 0.2
0.46 0.1 (1.77) 1.52 0.1 2.54
NOTE: Dimensions are in millimeters.
Figure 14-1. 20-DIP0300A Package Dimensions
3.30 0.3
0.51MIN
5.08MAX
26.80 MAX
3.25 0.2
0.25 +0.1
20-DIP-300A
- 0.05
14-1
MECHANICAL DATA
S3C9614/P9614
0-8 #24 #13
10.30 0.3
7.50 0.2
9.53
+0.10
24-SOP-375
#1
#12
0.15 - 0.05
15.34 0.2
(0.69)
0.38 0.1
1.27
NOTE: Dimensions are in millimeters.
Figure 14-2. 24-SOP-375 Package Dimensions
14-2
0.05MIN
2.70MAX
15.74 MAX
2.30 0.2
0.10 MAX
0.850.20
S3C9614/P9614
S3P9614 OTP
15
OVERVIEW
S3P9614 OTP
The S3P9614 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the S3C9614 microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is accessed by serial data format. The S3P9614 is fully compatible with the S3C9614, both in function and in pin configuration. Because of its simple programming requirements, the S3P9614 is ideal for use as an evaluation chip for the S3C9614.
VSS/VSS XOUT XIN TEST/TEST P0.0/INT0 P0.1/INT0 RESET /RESET P0.2/INT0 P1.7/INT1 P1.6/INT1
1 2 3 4 5 6 7 8 9 10
20 19 18 17
VDD/VDD P1.0/CIN0/SCLK P1.1/CIN1/SDAT P1.2/CIN2 P1.3/CIN3 P1.4/INT1 P1.5/INT1 3.3 VOUT D+ D-
S3P9614 20-DIP
(Top View)
16 15 14 13 12 11
Figure 15-1. S3P9614 Pin Assignments (20-DIP Package)
15-1
S3P9614 OTP
S3C9614/P9614
VSS/VSS XOUT XIN NC TEST/TEST P0.0/INT0 P0.1/INT0 RESET/RESET NC P0.2/INT0 P1.7/INT1 P1.6/INT1
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20
VDD/VDD P1.0/CIN0/SCLK P1.1/CIN1/SDAT NC P1.2/CIN2 P1.3/CIN3 P1.4/INT1 P1.5/INT1 NC 3.3 VOUT D+ D-
S3P9614 24-SOP
(Top View)
19 18 17 16 15 14 13
Figure 15-2. S3P9614 Pin Assignments (24-SOP Package)
15-2
S3C9614/P9614
S3P9614 OTP
Table 15-1. Descriptions of Pins Used to Read/Write the EPROM Main Chip Pin Name P1.0 (Pin 18) Pin Name SDAT Pin No. (20 DIP) 18 During Programming I/O I/O Function Serial Data Pin (Output when reading, Input when writing) Input and Push-pull Output Port can be assigned Serial Clock Pin (Input Only Pin) 0V : OTP write and test mode 5V : Operating mode Chip Initialization and EPROM Cell Writing Power Supply Pin (Indicates OTP Mode Entering) When writing 12.5V is applied and when reading. Logic Power Supply Pin.
P1.1 (Pin 19) TEST RESET
SCLK VPP (TEST) RESET
19 4 7
I/O I I
VDD/VSS
VDD/VSS
20/1
I
Table 15-2. Comparison of S3P9614 and S3C9614 Features Characteristic Program Memory Operating Voltage (VDD) OTP Programming Mode Pin Configuration EPROM Programmability 4.0 V to 5.25 V VDD = 5 V, VPP (RESET)=12.5V 20 DIP/24 SOP User Program 1 time 20 DIP/24 SOP Programmed at the factory S3P9614 4 K byte EPROM S3C9614 4 K byte mask ROM 4.0 V to 5.25 V
15-3
S3P9614 OTP
S3C9614/P9614
OPERATING MODE CHARACTERISTICS When 12.5 V is supplied to the VPP (RESET) pin of the S3P9614, the EPROM programming mode is entered. The operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in Table 14-3 below. Table 15-3. Operating Mode Selection Criteria VDD 5V VPP (RESET RESET) 5V 12.5 V 12.5 V 12.5 V REG/ MEM 0 0 0 1 Address (A15-A0) 0000H 0000H 0000H 0E3FH R/W 1 0 1 0 EPROM read EPROM program EPROM verify EPROM read protection Mode
NOTE: "0" means Low level; "1" means High level.
Table 15-4. D.C. Electrical Characteristics (TA = - 40C to + 85C, VDD = 4.0 V to 5.25 V) Parameter Supply Current (note) Symbol IDD1 IDD2 IDD3
NOTE:
Conditions Normal mode; 6 MHz CPU clock Idle mode; 6 MHz CPU clock Stop mode; oscillator stop
Min -
Typ 6.5 4 150
Max 15 8 300
Unit mA
A
Supply current does not include current drawn through internal pull-up resistors or external output current loads.
15-4
S3C9614/P9614
S3P9614 OTP
START
Address= First Location
VDD =5V, V PP=12.5V
x=0
Program One 1ms Pulse
Increment X
YES
x = 10
NO FAIL
Verify Byte
Verify 1 Byte
FAIL
Last Address
NO
Increment Address
VDD = VPP= 5 V
FAIL
Compare All Byte
PASS
Device Failed
Device Passed
Figure 15-3. OTP Programming Algorithm
15-5


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