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APL6535
Two-Channel Supervisory IC
Features
* * * * * * * 2.6V to 5.5V Input Voltage Range Low Quiescent Current : less than 50A High Accuracy Detection Threshold : 1.6% Adjustable Undervoltage Lockout for Each Supply Active high PGOOD Output Guaranteed PGOOD Valid to Falling VCC < 1V VMON Glitch Immunity : 30s Lead Free Available (RoHS Compliant)
General Description
The APL6535 is a two channel supervisory IC designed to monitor voltage supplies in mP and digital system. This IC can supervise any positive voltage using an external resistor divider to translate to a lower voltage for comparison to the internal 0.633V reference. Once any VMON input falls below 0.633V the PGOOD output is pulled low, the hysteresis of the internal reference is 15mV. The PGOOD pin has an internal 20kW pull-up to VCC making an external pull-up resistor unnecessary. Each rail' VMON point is independently s
*
Applications
* * * * * * Graphics Cards Portable Battery-Powered Equipment P Voltage Monitoring Set-Top Boxes Notebook Computer Multiple Supply System
adjustable with a resistor divider. The PGOOD output is guaranteed to be valid with IC bias lower than 1V. This IC is designed to reject fast line transient glitches 30ms on VMON input. The PGOOD output is an opendrain to allow ORing of multiple signals. If less than four voltages are being monitored, connect the unused VMON pins to VCC. The ENABLE input pin provides for a reset of the PGOOD output when it is pulled down below 0.5V. With an internal 10mA pull-up to
Pinouts
SOT-23-5 Top View
Vcc GND PGOOD 1 2 3 4 VMON2 5 VMON1
VCC, it can be signaled with common logic or pulled to ground with a push button switch. APL6535 come in a miniature SOT-23-5 package.
APL6535
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. Copyright (c) ANPEC Electronics Corp. Rev. Rev. A.1 - May., 2005 1 www.anpec.com.tw
APL6535
Ordering and Marking Information
APL6535
Lead Free Code Handling Code Temp. Range Package Code A PL6535 : 535X Package Code B : SOT-23-5 Temp. Range I : -40 to 85 C Handling Code TU : Tube TR : Tape & Reel Lead Free Code L : Lead Free Device Blank : Original Device X - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte in plate termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classification at lead-free peak reflow temperature.
Pin Function Description
PIN No. 1 3 2 Name VCC PGOOD GND VMON1 VMON2 O I/O Supply Voltage PGOOD is the AND function of all the VMON inputs being satisfied. This is an open drain output and can be pulled high to the appropriate level with an external resistor. Additionally a 20kO pull up to VCC is provided internally. Ground Connection These inputs provide for a programmable monitored voltage threshold referenced to an internal 0.633V reference. These inputs have a 30s glitch filter to prevent transient upsets from being recognized by PGOOD. Description
4, 5
I
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APL6535
Block Diagram
VC C(2.6~5.5V)
10uA
20k[
VMON1 PGOOD Falling Edge Glitch Filter 1M [
VMON2
0.633V
Absolute Maximum Ratings
Symbol VCC VMON1, 2 PGOOD TJ TSTG TS ESD
Note: 1.Human body model: C=100pF, R=1500, 3 positives pulse plus 3 negative pulses.
Parameter Input Voltage All Input Pins Output Pin Maximum Junction Temperature Storage Temperature Soldering Temperature (10 seconds) Electrostatic Discharge
Rating 6.5 -0.3V to VCC+0.3V -0.3V to VCC+0.3V 150 -65 to +150 260 -3000 to 3000*
1
Unit V V V C C C V
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APL6535
Electrical Characteristics
Unless Otherwise noted these specifications apply over full temperature, Vcc = 3.3V, TJ =- 40 C to 85C Typical values refer to TJ =25C
Symbol B BIAS ICC ICC VCC_L2H VCC_POR PGOOD PGpd PGpu
Parameter
Test condition
APL6535 Unit Min. Typ. Max. 40 400 A 230 2000 A 50 500 A 50 500 A 2.6 V 2.4 V 10 20 0 3 2 10 mA K 100 mV s s ns
Supply Current (EN enable) Supply Current (EN disable) VCC Power On VCC Power On Reset Pull-Down Current Pull-Up Resistance
VMON > VMON_L2H VMON < VMON_H2L VMON > VMON_L2H VMON < VMON_H2L VCC low to high VCC high to low VPGOOD=0.5V VCC = 1V Last valid input =Vth to PG release EN high to PG release EN low to PG pulling low TJ=25C TJ=-40C to 85C
VPGI Output Low TPG del Delay From VMON Rising VMON TPG del ENR Delay From EN Rising TPG del ENF Delay From EN Falling VMON Input VMON_H2L Falling Threshold Voltage Falling Threshold Temperature Coeff. VVMON_HYS Hysteresis Voltage VVMON_RNG Range TFIL Glitch Filter Duration VMON_TC
0.623 0.633 0.643 V 100 15 10 V/C mV mV s
VMON glitch to PGOOD low filter
30
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APL6535
Electrical Characteristics
Unless Otherwise noted these specifications apply over full temperature, Vcc = 5V, TJ =- 40 C to 85C Typical values refer to TJ =25C
APL6535 Unit Min. Typ. Max. 50 500 A 230 2000 A 60 600 A 60 600 A 2.6 V 2.4 V 10 20 0 5 2 10 mA K 100 mV s s ns
Symbol B BIAS ICC ICC
Parameter
Test condition
Supply Current (EN Enable) Supply Current (EN Disable)
VCC_L2H VCC Power On VCC_POR VCC Power On Reset PGOOD PGpd Pull-Down Current PGpu Pull-Up Resistance VPGI Output Low TPG del Delay From VMON Rising VMON TPG del ENR Delay From EN Rising TPG del ENF Delay From EN Falling VMON Input VMON_H2L Falling Threshold Voltage Falling Threshold VMON_TC Temperature Coeff. VVMON_HYS Hysteresis Voltage VVMON_RNG Range TFIL Glitch Filter Duration
VMON > VMON_L2H VMON < VMON_H2L VMON > VMON_L2H VMON < VMON_H2L VCC low to high VCC high to low VPGOOD=0.5V VCC = 1V Last valid input = Vth to PG release EN high to PG release EN low to PG pulling low TJ=25C TJ=-40C to 85C
0.623 0.633 0.643 V 100 15 10 30 V/C mV mV s
VMON glitch to PGOOD low filter
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APL6535
Application Circuit
3.3V
12V 22k[
APL6535
Vcc PGOOD Output
*10K 1 VCC 2 GND 3 PGOOD
10k[
VMON1 5
VMON2 4
4.7k[ 0.47uF 1uF
* Optional
1.5k[
Timing Diagram
Vth VMON TFIL PGOOD EN
Vth
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APL6535
Typical Characteristics
Supply Current vs. Supply Voltage
400 350 300 250 200 150 100 50 0 2.6
Supply Current vs. Temperature
70
VMON>VMON_L2H VMON60
Supply Current(A)
Supply Current(A)
50 40 30 20 10 0
VCC=5V
VCC=3.3V
VMON>VMON_L2H
3.1
3.6
4.1
4.6
5.1
5.6
-40
-20
0
20
40
60
80
100
120
Supply Voltage(V)
Temperature(C)
VMON_H2L vs. Temperature
0.638 0.636 0.634 0.632
VMON Threshold vs. Supply Voltage
0.651
VCC=5V
0.648
VMON Threshold(V)
0.645 0.642 0.639 0.636
VMON_L2H
VMON_H2L(V)
0.630 0.628 0.626 0.624 0.622 0.620 0.618 -40 -20 0 20 40 60 80 100 120
VCC=3.3V
VMON_H2L
0.633 0.630 2.6 3.1 3.6 4.1 4.6 5.1 5.6
Temperature(C)
Supply Voltage(V)
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APL6535
Typical Characteristics (Cont.)
EN High to PGOOD
VCC=3.3V
VMON High to PGOOD
VCC=3.3V
EN(2V/div)
VMON(1V/div)
PGOOD(2V/div) PGOOD(2V/div)
Time(1us/div)
Time(4us/div)
EN Low to PGOOD
VCC=3.3V
VMON Low to PGOOD
VCC=3.3V
EN(2V/div)
VMON(1V/div)
PGOOD(2V/div)
PGOOD(2V/div)
Time(10ns/div)
Time(20s/div)
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APL6535
Application Information
PGOOD
The APL6535 is a four channel supervisory IC designed to monitor multiple voltages greater than 0.7V. This IC is suitable for both microprocessors or industrial system applications. Once biased to 2.6V and enabled the IC continuously monitors from one to four voltages independently through external resistor dividers comparing each VMON pin voltage to an internal 0.633V reference. The PGOOD output is an opendrain to allow ORing of the signals and interfacing to a wide range of logic levels. If less than four voltages are being monitored, connect the unused VMON pins to VCC. The PGOOD pin has an internal 20kW pull-up to VCC making an external pull-up resistor unnecessary.
Falling Edge Glitch Filter
Once any VMON input falls below 0.633V the PGOOD output is pulled low, the VMON inputs are designed to reject fast transients (30us).
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APL6535
Package Information
SOT-23-5
e1
5
4 E1 E
1
2
3
e
b
D
A2
A
a
L1
A1
L2
L
Dim A A1 A2 b D E E1 e e1 L L1 L2 N
Millimeters Min. 0.95 0.05 0.90 0.30 2.8 2.6 1.5 0.95BSC 1.90BSC 0.35 0.20 BSC 0.5 5 0 10 0 0.7 0.020 0.55 0.014 Max. 1.45 0.15 1.30 0.50 3.00 3.00 1.70 Min. 0.037 0.002 0.035 0.011 0.110 0.102 0.059
Inches Max. 0.057 0.006 0.051 0.019 0 . 118 0 . 118 0.067 0.037BSC 0.07 4BSC 0.022 0.008 BSC 0.028 5 10
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APL6535
Physical Specifications
Terminal Material Lead Solderability Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition
TP
(IR/Convection or VPR Reflow)
tp Critical Zone T L to T P
Ramp-up
Temperature
TL Tsmax
tL
Tsmin Ramp-down ts Preheat
25
t 25 C to Peak
Time
Classification Reflow Profiles
Profile Feature Average ramp-up rate (TL to TP) Preheat - Temperature Min (Tsmin) - Temperature Max (Tsmax) - Time (min to max) (ts) Time maintained above: - Temperature (TL) - Time (tL) Peak/Classificatioon Temperature (Tp) Time within 5C of actual Peak Temperature (tp) Ramp-down Rate Sn-Pb Eutectic Assembly 3C/second max. 100C 150C 60-120 seconds 183C 60-150 seconds See table 1 10-30 seconds Pb-Free Assembly 3C/second max. 150C 200C 60-180 seconds 217C 60-150 seconds See table 2 20-40 seconds
6C/second max. 6C/second max. 6 minutes max. 8 minutes max. Time 25C to Peak Temperature Notes: All temperatures refer to topside of the package .Measured on the body surface.
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(mm)
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APL6535
Classification Reflow Profiles(Cont.)
Table 1. SnPb Entectic Process - Package Peak Reflow Temperature s 3 3 Package Thickness Volume mm Volume mm <350 350 <2.5 mm 240 +0/-5C 225 +0/-5C 2.5 mm 225 +0/-5C 225 +0/-5C
Table 2. Pb-free Process - Package Classification Reflow Temperatures 3 3 3 Package Thickness Volume mm Volume mm Volume mm <350 350-2000 >2000 <1.6 mm 260 +0C* 260 +0C* 260 +0C* 1.6 mm - 2.5 mm 260 +0C* 250 +0C* 245 +0C* 2.5 mm 250 +0C* 245 +0C* 245 +0C* *Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the stated classification temperature (this means Peak reflow temperature +0C. For example 260C+0C) at the rated MSL level.
Reliability Test Program
Test item SOLDERABILITY HOLT PCT TST ESD Latch-Up Method MIL-STD-883D-2003 MIL-STD-883D-1005.7 JESD-22-B,A102 MIL-STD-883D-1011.9 MIL-STD-883D-3015.7 JESD 78 Description 245C, 5 SEC 1000 Hrs Bias @125C 168 Hrs, 100%RH, 121C -65C~150C, 200 Cycles VHBM > 2KV, VMM > 200V 10ms, 1 tr > 100mA
Carrier Tape & Reel Dimensions
t P P1 D
Po E
F W
Bo
Ao
Ko D1
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APL6535
Carrier Tape & Reel Dimensions(Cont.)
T2
J C A B
T1
Application
A 1781
B 72 1.0 D 1.5 +0.1
C
J
T1 8.4 2 P1
T2 1.5 0.3 Ao
13.0 + 0.2 2.5 0.15 D1 1.5 +0.1 Po 4.0 0.1
W 8.0+ 0.3 - 0.3 Bo 3.2 0.1
P 4 0.1 Ko 1.4 0.1
E 1.75 0.1 t 0.20.03
SOT-23-5
F 3.5 0.05
2.0 0.1 3.15 0.1
(mm)
Cover Tape Dimensions
Application SOT- 23 Carrier Width 8 Cover Tape Width 5.3 Devices Per Reel 3000
Customer Service
Anpec Electronics Corp. Head Office : 5F, No. 2 Li-Hsin Road, SBIP, Hsin-Chu, Taiwan, R.O.C. Tel : 886-3-5642000 Fax : 886-3-5642050 Taipei Branch : 7F, No. 137, Lane 235, Pac Chiao Rd., Hsin Tien City, Taipei Hsien, Taiwan, R. O. C. Tel : 886-2-89191368 Fax : 886-2-89191369
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