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TELEFUNKEN Semiconductors
U4292B
FM-IF IC for the DYNAS 1) System
Description
The U42922B is a bipolar integrated FM-IF circuit, which is controlled by software. It performs all the function of the DYNAS system. The device is designed for car radio and home receiver applications. DYNAS is a complete new system of FM-IF processing. It uses bandpass filters with a bandwidth down to about 20 kHz compared to 160 kHz for a conventional bandpass filter, and tracks the resonant frequency to the actual frequency. Implementation of the DYNAS system drastically enhances both of the basic, classic characteristics of radio reception: selectivity and reception sensitivity. DYNAS ensures enhancement up to levels which until now were not considered physically feasible. A complete system description can be found in "DYNAS system & it's application in car radios" (Jan. 1992).
Features
D In comparison to conventional FM-IF systems:
- More than 26 dB better selectivity in case of directly (100 kHz) adjacent transmitters - Higher sensitivity of typical 6 dB due to the reduction of the effective noise bandwidth
D Higher flexibility by software D Easy adaption of RDS (Radio data system) and Noise
Blanker
Block Diagram
Q1 Q2 VCC1 FIL1 FIL2 VCEN FIL3 FIL4 BUOUT BUIN FIT CDC1 CDC2 GND3 A8 Oscillator 10 MHz A4 Mixer 1 S8b Mixer 2 S3a Field strength indicator S3b Amplifier detector Level A2 CAGC Control unit CREF Voltage regulator + 8 Bit serial SR A13 A15 Lineari- zation circuit S4a S4b S6 S7 A14 S8c FM detector CDEM CDEM AFOU AFOU HP11 HP12 AFIN2 AFIN A16 A3 A17 A10 BUC1 BUC2 A5 A6 A7 VCC3 A9
VIN1 VIN2
A1
S5
S8a
A11
LA
GND1
RSSI
VREF
COSC DATA LOAD
CL
PL VCC2
GND2
MPX EQU BMPX TRVO IAFC
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1)
DYNAS stands for dynamic selectivity.
Figure 1.
Rev. A1: 19.08.1996
Preliminary Information
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U4292B
Pin Description
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 Symbol CAGC CREF VREF COSC DATA LOAD CL PL VCC 2 GND 2 BUIN EQU MPX BMPX TRVO IAFC HP 12 HP 11 AFIN 1 AFIN 2 AFOUT 2 AFOUT 1 BUC 2 CDEM 2 CDEM 1 BUC 1 VCC 3 GND 3 FIT CDC 2 FIL 4 CDC 1 FIL 3 VCEN FIL 2 BUOUT FIL 1 VCC 1 GND 1 VIN 1 VIN 2 RSSI Q2 Q1
TELEFUNKEN Semiconductors
Function Time constant for the AGC mixer Noise filter for internal reference Reference voltage 5 V Time constant for MPX limiting during adjacent channel carry over Data input for DYNAS filter status. 7-bit serial data. TTL-CMOS input synchronic to CL Load input data, TTL-CMOS input Clock signal for data transmission (frequency see Electrical Characteristics table) Input of the comparator for adjacent channel carry over (plop-noise) Supply voltage for logic and audio circuits Ground for logic and audio circuits Buffer input of filter tracking for bandpass filter Input for high pass filtering and equalizing of MPX. Use of capacitors U 2 J (N 750) for temperature compensation are recommended, as indicated in the circuit diagram. Output of MPX-signal Output buffer of the unequalized MPX-signal Tracking voltage for filter circuits Current source/sink output for tuning control. Connect to VREF if not used Highpass filter in order to pre-emphasize the tracking voltage Highpass filter in order to pre-emphasize the tracking voltage Input of the AF processing network Input of the AF processing network Differential amplifier output of the demodulator Differential amplifier output of the demodulator Buffer output for driving quadrature capacitor of the demodulator (Use of TC - 220 ppm/_C for the capacitor 1.2 nF is recommended) Resonant circuit for the demodulator (Use of TC - 220 ppm/_C for the capacitor 120 pF is recommended) Resonant circuit for the demodulator (Use of TC - 220 ppm/_C for the capacitor 120 pF is recommended) Buffer output for driving quadrature capacitor of the demodulator (Use of TC - 220 ppm/_C for the capacitor 1.2 nF is recommended) Supply voltage for demodulator and filter circuit Ground of demodulator and filter circuit Test output for adjustment of the filter circuits Low passfilter for the offset cancellation of the limiting amplifier Resonant circuit 4, L4 166 uH TOKO 0555, Varicap TOKO KV 1234Z or equivalent Low passfilter for the offset cancellation of the limiting amplifier Resonant circuit 3, L3 157 uH TOKO 0555, Varicap TOKO KV 1234Z or equivalent Center voltage 2.5 V for filter circuits Resonant circuit 2, L2 112 uH TOKO 0554, Varicap TOKO KV 1234Z or equivalent Buffer output of filter tracking voltage for bandpass filter Resonant circuit 1, L1 143 uH TOKO 0555, Varicap TOKO KV 1234Z or equivalent Supply voltage for mixer, oscillator, IF detector Ground for mixer, oscillator, IF detector IF input 10.7 MHz Center voltage for the input 10.7 MHz Signal fieldstrength 0 to 100 mA to ground X'tal 10 MHz X`tal 10 MHz
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Preliminary Information
Rev. A1: 19.08.1996
TELEFUNKEN Semiconductors
U4292B
In case of a reasonable desired signal level and no or weak interference signal level, as shown in figure 3, the system has to be switched to the wide I.F. bandwidth. Therefore, the usual high-fidelity stereo performance is achieved.
System Description
DYNAS is a completely new system of intermediatefrequency signal processing in order to reduce interference in FM radio reception. The principle function of the system is shown in figure 2, 3 and 4. It describes the relationship between the receiving signal condition and the system's reaction.
Signal Level Narrow B.W. of I.F. Filter
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Signal Level
Narrow B.W. of I.F.Filter
Signal Frequency Desire Signal
Frequency Signal Low Level Desired Signal S/N Ratio
High Level Adjacent Channel Signal
Time
With DYNAS
Signa Leve
Time
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Figure 4.
Figure 2.
Figure 2 shows a very high adjacent channel interference. In this case, the system has to be switched to the narrow bandwidth and the resonant frequency of the IF-filter will track the desired signal frequency. Because of the narrow bandwidth, the undesired signal cannot interfere with the desired channel. In this way, DYNAS avoids channel interference, the stereo reception will change to mono, which minimizes the interference noise.
Signal Level Normal B.W. of I.F. Filter
Figure 4 shows DYNAS's reaction to very low desired signal level. In this case, the system has to be switched to "mixed" narrow I.F. bandwidth in order to reduce the noise level feeding the FM discriminator. This increases the sensitivity of the receiver as seen from the S/N curve in figure 4. Certainly, because of the low signal and narrow bandwidth, only mono reception is possible. The DYNAS system using the U4292B provides 8 different I.F. bandpass characteristics, which are controlled by software according to the receiving conditions. Some of these characteristics have a "mixed" structure of narrow bandpass and wide bandpass characteristics.
Signal Frequenc Desired Signal Low Level Adjacent Channel Signal
Time Figure 3.
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Rev. A1: 19.08.1996
Preliminary Information
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U4292B
Tracking S1 Tracking S2
TELEFUNKEN Semiconductors
Signal input
Wide B.P.F.
Signal output
S3 ABC Bandwidth control
Narrow B.P.F.
D
E
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Figure 5.
Receiving Conditions Desired Signal Adjacent Channel Signal Strong No
Characteristic BYP ACH0 ACH1 ACH2 ACH3 ACH4 F1 F2
Figure 6.
System Bandwidth Bypassed 100 kHz 70 kHz Mixed 23 kHz 18 kHz Mixed Mixed
"""" """ "" " " "
Weak
" "" """ """"
Strong Weak Weak
Switch Position S1 S2 S3 On Off Off Off On Off Off On Off Off On On Off Off On Off Off On Off On On Off On On
Figure 5 shows the structure of the DYNAS filter block, which mainly consists of 2 tracking bandpass filters: the "wide" bandpass filter and the "narrow" bandpass filter. The bandwidth of these bandpass filters can be changed by damping of the filter tanks. The signal path can be switched by the "symbolic" switches S1 to S3. The table of figure 6 shows all possible bandpass characteristics of the system which can be achieved by combining of filter damping and signal path switching depending on the condition of the receiving signals (desired signal and adjacent channel signal). If the desired signal is strong and there is no or very low adjacent channel interference, the system has to be switched in the "Bypass-Mode", which allows a maximum of bandwidth.
In some special situation of multipath reception or common channel interference, the system's filter structure should be switched to the wide band characteristic BYP. The characteristics ACH2, F1 and F2 ( mixed mode) are obtained by adding the signals of the wide band and the narrow band signal paths (S2 and S3 are switched on). In this case a wide bandpass filter characteristic with a added "peak" of a narrow bandpass filter characteristic is achieved. Certainly characteristics like these cannot be characterized by a normal 3 dB bandwidth value in the table. Such "step bandwidth" characteristics are useful for given signal conditions where the advantage of the narrow band pass characteristic is required but on the other side its disadvantages should be minimized by superimposing the signal from the wide band signal path as mentioned above.
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Preliminary Information
Rev. A1: 19.08.1996
TELEFUNKEN Semiconductors
U4292B
is a normal Quad-Demodulator. The demodulated signal is fed out at AFOUT 1 and AFOUT 2 to an external bandpass filter and reenters at AFIN 1 and AFIN 2, where it is fed to the buffer amplifier A 15 and the linearization circuit. The MPX signal is available at output MPX. The tracking signal for the DYNAS filters is derived from the linearization circuit and it is available at output TRVO. Depending on the condition of the tuned signal, the filter characteristics of the DYNAS IC U4292B are controlled by software according to figure 7. Data
Functional Description
Figure 1 shows the block diagram of the U4292B. In the BYP mode (bypass function) the signal of mixer 2 is fed to the summing amplifier A 10, bypassing the DYNAS filters FIL 1, FIL 2, FIL 3 and FIL 4. In the other modes, the incoming signal is fed via a gain controlled amplifier A1 to the mixer 1. The filter characteristics are set according to the condition of the incoming signal by switches S 3 to S 8 which are controlled by software. The 700 kHz DYNAS IF signal is available at output FIT for test and alignment purposes. In addition it is fed via the limiting amplifier LA to the FM DETECTOR which Condition MSB 8 0 1 1 1 1 1 1 1 7 0 0 0 0 0 0 1 1 6 0 0 1 1 1 1 0 0
Figure 7.
BYP ACH 0 ACH 1 ACH 2 ACH 3 ACH 4 F1 F2
5 0 0 0 1 1 1 0 0
4 0 0 0 0 1 1 0 0
3 0 0 0 0 0 1 0 0
2 0 0 0 0 0 0 0 1
LSB 1 x x x x x x x x
The U4292B has a 8-bit-shift register which is controlled by software via a 3 wire bus consisting of Clock, Data and Load. The timing diagrams of the bus are shown in figure 8. The system can be forced directly to the bypass function by switching Load, Clock and Data to "low" and it remains as long as Load and Data are "low" (see figure 9). After releasing these conditions, the system will go back
tCYC tCLH CLOCK tS tH DATA 1 tCLL 2 f CYC t 1 CYC 3 4
to the previous status of the shift register. Only in the ACH 4 -status, a "Plop"-recognition is possible. During this time, the Load is internally disabled and a data-transfer cannot be executed. The signal at BMPX is fed via a low pass filter to the "Plop"-comparator. The internal switching threshold is 20% and the MPX signal is determined at 400 mVPP limited to 500 mVpp (see figure 10).
"
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5
6
7
8
tS LOAD tLO
Figure 8.
Rev. A1: 19.08.1996
Preliminary Information
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U4292B
LOAD
TELEFUNKEN Semiconductors
DATA tBYP
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Figure 9.
PLOP recognition
Tracking voltage TRVO
VREF
MPX Signal
approx. 200 ms
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Figure 10.
Absolute Maximum Ratings
Parameters Supply voltage Power dissipation Storage temperature range Ambient temperature range Junction temperature Electrostatic handling Symbol VCC Ptot Tstg Tamb Tj
ESD
"V
Value 13 750 - 50 to + 125 - 30 to + 85 125 2000
Unit V mW _C _C _C V
Thermal Resistance
Parameters Thermal resistance Symbol RthJA Value 120 Unit K/W
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Preliminary Information
Rev. A1: 19.08.1996
TELEFUNKEN Semiconductors
U4292B
"75
Electrical Characteristics
VS = 8.2 V, Tamb = 25_C, VIN1 = 30 mV, 10.7 MHz, FM = kHz deviation, fmod = 1 kHz, unless otherwise specified. Ve is the input voltage of the front end imitation (FEI) with 40 dB voltage gain and 6 dB noise figure. The voltage Ve is defined under a termination of 50 W. VIN1 is the applied input voltage at pin VIN1 of the U4292B, reference point is ground, de-emphasis is 75 ms, normally out. AF bandwidth for audio measurement is 30 kHz. Parameters Supply voltage Test Conditions / Pins Pins 38, 27 and 9 Symbol VCC1 VCC2 VCC3 ICC VREF ROUT IL Pin 34 VCEN ROUT IL Pins 22 and 21 ROUT Pin 15 VBIAS Pin 40 VIN1 RIN VAGC 200 1.2 130 mV kW 5 V 2.4 kW 2.3 2.5 1 - 1.4 2.7 1 4.7 Min. 7.5 Typ. 8.2 Max. 9 Unit V
Supply quiescent current Reference voltage output Reference voltage Output resistance Load current TC Center voltage output Center voltage Output resistance Load current TC Demodulator outputs Output resistance Tracking voltage output Bias voltage IF input Input voltage (rms) Input resistance AGC-threshold input voltage MPX output Recovered audio output voltage (rms) THD without de-emphasis
Pins 38, 27 and 9 ICC = ICC1 + ICC2 + ICC3 Pin 3
63 5 2.5 0.1
75 5.3 10
mA
W
mA mV/_C
V
W
mA mV/_C
V
Mode F1 Pin 13 22.5 kHz deviation 75 kHz deviation Mode BYP Ve = 60 dBmV 1 kHz, 22.5 kHz deviation 8 kHz, 22.5 kHz deviation 1 kHz, 75 kHz deviation Mode ACH0 Ve = 30 dBmV 1 kHz, 22.5 kHz deviation 8 kHz, 22.5 kHz deviation 1 kHz, 75 kHz deviation Mode ACH0 Ve = 30 dBmV 1 kHz, 22.5 kHz deviation Mode F1 Ve = 10 dBmV 1 kHz, 22.5 kHz deviation
mV
VOUT
180 600
mV
0.31 0.70 0.63
%
THD without de-emphasis
0.65 0.90 1.00
%
THD with de-emphasis
0.13
%
THD with de-emphasis
0.8
% 7 (13)
Rev. A1: 19.08.1996
Preliminary Information
U4292B
Electrical Characteristics
Parameters (S +N)/N ratio with de-emphasis Test Conditions / Pins Mode BYP Ve = 60 dBmV 22.5 kHz deviation 75 kHz deviation Mode ACH0 Ve = 30 dBmV 22.5 kHz deviation 75 kHz deviation Mode F1 Ve = 60 dBmV 22.5 kHz deviation 75 kHz deviation VIN1 = 5 mV, 90 % modulation 22.5 kHz deviation SINAD = 30 dB, Desired signal: fIF = 10.7 MHz, Ve = 10 dBmV, fmod = 1 kHz, deviation = 35 kHz, Adjacent signal: fmod = 400 kHz, deviation = 35 kHz f = 10.5 MHz f = 10.6 MHz f = 10.8 MHz f = 10.9 MHz 40 kHz deviation and input voltage Ve -3 dBmV Ve = 10 dBmV and SINAD = 26 dB fmod = 1 kHz fmod = 8 kHz (de-emphasis on) Mode BYP, ACH0, ACH1 or ACH2 f = 1 kHz ,without mute Pin 16 IAFC vs. frequency deviation Pins 43 and 44 VOSC Pin 14 f = 1 kHZ Symbol
TELEFUNKEN Semiconductors
Min.
Typ.
Max.
Unit
75 85
dB
(S +N)/N ratio with de-emphasis
61 72
dB
(S +N)/N ratio with de-emphasis
AM suppression
42 53 - 38
dB dB
Adjacent channel selectivity
84 44 40 83 30
dBmV
Usable sensitivity Tracking range
dB
>75 50 12.5
kHz
Voltage gain V MPX V BMPX AFC output Output current sensitivity Oscillator Oscillator 10 MHz voltage swing BMPX output V BMPX Voltage gain
dB
DfIF
I AFC
0.2
mA/kHz
VPP
0.8
DVAFIN
0
dB
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Preliminary Information
Rev. A1: 19.08.1996
TELEFUNKEN Semiconductors
U4292B
Symbol Min. Typ. 12.6 10.2 0 Max. Unit dB
Electrical Characteristics
Parameters Tracking voltage output V TRVO Voltage gain Test Conditions / Pins Pin 15 Mode ACH3, ACH4 other modes, f = 1 kHz Pin 36 f = 1 kHz dB
DVAFIN
Buffer output Voltage gain
V BUOUT V BUIN Field strength output RSSI Pin 42 Output voltage RLOAD = 10 kW VIN1 = 100 mV VIN1 = 100 mV Deviation of RSSI from VIN1 = 1 mV linearity (RSSI vs. input VIN1 = 10 mV voltage level in dB), with respect to the ideal value on a straight line connecting the start and end values defined before Test output Pin 29 Voltage swing VIN1 = 5 mV, without modulation Input Data, Load, Clock Pins 5, 6 and 7 Input voltage High Low Input current High Low Transfer clock cycle time Transfer clock high level width Transfer clock low level width Transfer Load low level width Data set up time Data hold time
VO
0.2 0.85 -6 -6
0.45 1.35 6 6
V %
85
mVPP
VIH VIL ISOURCE ISINK fCYC tCLH tCLL tLO tS tH
2.5 0 +1 -1 1 1 1 1 100
5 0.8 +5 -5 300*1
V
mA
kHz
ms ms ms ms
ns
*1
Frequencies between 200 and 266 kHz are not allowed.
Rev. A1: 19.08.1996
Preliminary Information
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U4292B
Application Circuit
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VCC 1 C22 C23 100 nF C41 R41 1.5 kW D3 C40 C20 150 pF R20 39 kW L2 L4 C5 C6 220nF C7 220 nF 4.7 m F 112 m H 157 m H 15 kW L3 ** C50 56 pF R30 R40 166 mH FIT VCC3 C30 D4 47 nF 22 nF C11 22 nF C31 100 nF 4.7 mF D1 56 W 56 W C10 150 pF 39 pF 15 kW ** N220 120 pF ** C52 72 m H 1.2 nF L5 470 W R50 R11 R12 C21 D2 C3 100 nF L1 C4 R10 143 m H 39 kW ** C51 1.2 nF
VIN
R4 22 kW
R5 330 W
470 pF
C1
BC 849 B 470 pF
R1 390 W
R2 3.3 kW
R3 100 W
10 MHz
RSSI
C42
470 pF
Figure 11.
40 37 36 34 33 35 32 31 30 39 38 29 28
44
43
42
41
27
26
25
24
23
U 4292 B
5 6
VCC2 R61 CL C64 BUS 33 nF C68 4.7 mF C65 2.2 k W 10 nF 2.2 kW R62 C69 R60 10 kW BMPX 1.5 nF 6.8 nF R64 10 kW R66 680 pF 390 W MPX C70
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Preliminary Information
7
C66 * C67 100 pF 10 kW R63 C71 C77 680 pF R65 10 nF
1 8 10 11
2
3
4
9
12
13
14
15
16
100 W IAFC
17
C72
18
19
20
C75 6.8 nF
21
22
C60
C61
C63
470 nF 100 nF DATA LOAD
220 nF
C73 2.2 m F
2.2 m F *C76 *C74 1.5 nF 1.5 nF * N 750
C62
TELEFUNKEN Semiconductors
4.7 mF
Rev. A1: 19.08.1996
VREF
VOUT
TELEFUNKEN Semiconductors
U4292B
An alternative procedure is: 4b. 5b. Set the generator to 10.7 MHz - 16 kHz ("filter offset) Tune L 1 to resonance Set the generator to 10.7 MHz + 16 kHz ("filter offset) Tune L 2 to resonance
Filter Adjustment Procedure
Connect the generator to input VIN and an oscilloscope to output FIT. Connect a dc current meter (this may be a DVM in connection with a 100 kW resistor) between pins IAFC and VREF. 1. Set the IF center frequency of the FM-front end to 10.7 MHz ("filter offset) with a signal level of approx. 1 mV and adjust L 3 and L 4 to the maximum voltage at output FIT. 2. Reduce the generator output voltage until the AGC switches off and VFIT decreases. 3. Tune L 2 and L 1 to resonance whilst maintain a low signal at FIT to prevent AGC action. 4. Note a value V of VFIT at a given generator output voltage. 5. Increase the generator output voltage by about 7 dB and adjust L 1 to a lower frequency until the value Va is reached again. 6. Increase the generator output voltage by about 7 dB and adjust L 2 to a higher frequency until the value Va is reached once again. 7. Tune L 5 until IIAFC = 0
6b. 7b.
This procedure appears more accurate then the first. Temperature compensation of the demodulator circuit: Low TC of the demodulator centre frequency requires about TC-220 ppm of the capacitors C 50, C 51, C 52.
Specification of external elements
Crystal 10 MHz Frequency tolerance at 25_C: ppm TC of frequency: < 5 ppm/C Equivalent series resistance: < 80 W Varactors D1 to D4: TOKO KV 1234Z is recommended Coils: L2, L5: Q > 110, TOKO 0554 is recommended L3, L4, L1: Q > 120, TOKO 0555 is recommended
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Rev. A1: 19.08.1996
Preliminary Information
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U4292B
Ordering and Package Information
Extended Type Number U4292B-AFS Package SSO44
TELEFUNKEN Semiconductors
Remarks
Dimensions in mm
Package: SSO44
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Preliminary Information
Rev. A1: 19.08.1996
TELEFUNKEN Semiconductors
U4292B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423
Rev. A1: 19.08.1996
Preliminary Information
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